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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Vinod Koul <vkoul@kernel.org>, Viresh Kumar <vireshk@kernel.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Dan Williams <dan.j.williams@intel.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>, Arnd Bergmann <arnd@arndb.de>,
	Rob Herring <robh+dt@kernel.org>, <linux-mips@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <dmaengine@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v2 4/6] dmaengine: dw: Print warning if multi-block is unsupported
Date: Fri, 8 May 2020 13:53:02 +0300	[thread overview]
Message-ID: <20200508105304.14065-5-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20200508105304.14065-1-Sergey.Semin@baikalelectronics.ru>

Multi-block support provides a way to map the kernel-specific SG-table so
the DW DMA device would handle it as a whole instead of handling the
SG-list items or so called LLP block items one by one. So if true LLP
list isn't supported by the DW DMA engine, then soft-LLP mode will be
utilized to load and execute each LLP-block one by one. A problem may
happen for multi-block DMA slave transfers, when the slave device buffers
(for example Tx and Rx FIFOs) depend on each other and have size smaller
than the block size. In this case writing data to the DMA slave Tx buffer
may cause the Rx buffer overflow if Rx DMA channel is paused to
reinitialize the DW DMA controller with a next Rx LLP item. In particular
We've discovered this problem in the framework of the DW APB SPI device
working in conjunction with DW DMA. Since there is no comprehensive way to
fix it right now lets at least print a warning for the first found
multi-blockless DW DMAC channel. This shall point a developer to the
possible cause of the problem if one would experience a sudden data loss.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org

---

Changelog v2:
- This is a new patch created instead of the dropped one:
  "dmaengine: dw: Add LLP and block size config accessors"
---
 drivers/dma/dw/core.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 8bcd82c64478..e4749c296fca 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1197,6 +1197,21 @@ int do_dma_probe(struct dw_dma_chip *chip)
 		 */
 		if (dwc->block_size > block_size)
 			block_size = dwc->block_size;
+
+		/*
+		 * It might crucial for some devices to have the hardware
+		 * accelerated multi-block transfers supported. Especially it
+		 * concerns if Tx and Rx DMA slave device buffers somehow
+		 * depend on each other. For instance an SPI controller may
+		 * experience Rx buffer overflow error if Tx DMA channel keeps
+		 * pushing data to the Tx FIFO, while Rx DMA channel is paused
+		 * to initialize the DW DMA controller with a next Rx LLP item.
+		 * Since there is no comprehensive way to fix it right now lets
+		 * at least print a warning that hardware LLPs reloading is
+		 * unsupported.
+		 */
+		if (dwc->nollp)
+			dev_warn_once(chip->dev, "No hardware LLP support\n");
 	}
 
 	/* Clear all interrupts on all channels. */
-- 
2.25.1


  parent reply	other threads:[~2020-05-08 10:53 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-06 13:10 [PATCH 0/5] dmaengine: dw: Take Baikal-T1 SoC DW DMAC peculiarities into account Sergey.Semin
2020-03-06 13:29 ` Andy Shevchenko
2020-03-06 13:30   ` Andy Shevchenko
2020-03-06 13:43     ` Vinod Koul
     [not found]     ` <20200306135050.40094803087C@mail.baikalelectronics.ru>
2020-03-09 21:45       ` Sergey Semin
     [not found]   ` <20200306133756.0F74C8030793@mail.baikalelectronics.ru>
2020-03-06 13:47     ` Sergey Semin
2020-03-06 14:11       ` Andy Shevchenko
     [not found]       ` <20200306141135.9C4F380307C2@mail.baikalelectronics.ru>
2020-03-09 22:08         ` Sergey Semin
2020-05-08 10:52 ` [PATCH v2 0/6] " Serge Semin
2020-05-08 10:52   ` [PATCH v2 1/6] dt-bindings: dma: dw: Convert DW DMAC to DT binding Serge Semin
2020-05-18 17:50     ` Rob Herring
2020-05-08 10:53   ` [PATCH v2 2/6] dt-bindings: dma: dw: Add max burst transaction length property Serge Semin
2020-05-08 11:12     ` Andy Shevchenko
2020-05-11 20:05       ` Serge Semin
2020-05-11 21:01         ` Andy Shevchenko
2020-05-11 21:35           ` Serge Semin
2020-05-12  9:08             ` Andy Shevchenko
2020-05-12 11:49               ` Serge Semin
2020-05-12 12:38                 ` Andy Shevchenko
2020-05-15  6:09                   ` Vinod Koul
2020-05-15 10:51                     ` Andy Shevchenko
2020-05-15 10:56                       ` Vinod Koul
2020-05-15 11:11                         ` Serge Semin
2020-05-17 17:47                           ` Serge Semin
2020-05-18 17:30                             ` Rob Herring
2020-05-18 19:30                               ` Serge Semin
2020-05-19 17:13                             ` Vinod Koul
2020-05-21  1:33                               ` Serge Semin
2020-05-08 10:53   ` [PATCH v2 3/6] dmaengine: dw: Set DMA device max segment size parameter Serge Semin
2020-05-08 11:21     ` Andy Shevchenko
2020-05-08 18:49       ` Vineet Gupta
2020-05-08 18:49         ` Vineet Gupta
2020-05-11 21:16       ` Serge Semin
2020-05-12 12:35         ` Andy Shevchenko
2020-05-12 17:01           ` Serge Semin
2020-05-15  6:16           ` Vinod Koul
2020-05-15 10:53             ` Andy Shevchenko
2020-05-17 18:22               ` Serge Semin
2020-05-08 10:53   ` Serge Semin [this message]
2020-05-08 11:26     ` [PATCH v2 4/6] dmaengine: dw: Print warning if multi-block is unsupported Andy Shevchenko
2020-05-08 11:53       ` Mark Brown
2020-05-08 19:06         ` Andy Shevchenko
2020-05-11  3:13           ` Serge Semin
2020-05-11 14:03             ` Andy Shevchenko
2020-05-11  2:10         ` Serge Semin
2020-05-11 11:58           ` Mark Brown
2020-05-11 13:45             ` Serge Semin
2020-05-11 13:58               ` Andy Shevchenko
2020-05-11 17:48                 ` Mark Brown
2020-05-11 18:25                   ` Serge Semin
2020-05-11 19:32                 ` Serge Semin
2020-05-11 21:07                   ` Andy Shevchenko
2020-05-11 21:08                     ` Andy Shevchenko
2020-05-12 12:42                       ` Serge Semin
2020-05-15  6:30                         ` Vinod Koul
2020-05-17 19:23                           ` Serge Semin
2020-05-19 17:02                             ` Vinod Koul
2020-05-21  1:40                               ` Serge Semin
2020-05-11 17:44               ` Mark Brown
2020-05-11 18:32                 ` Serge Semin
2020-05-11 21:32                   ` Mark Brown
2020-05-08 10:53   ` [PATCH v2 5/6] dmaengine: dw: Introduce max burst length hw config Serge Semin
2020-05-08 11:41     ` Andy Shevchenko
2020-05-12 14:08       ` Serge Semin
2020-05-12 19:12         ` Andy Shevchenko
2020-05-12 19:47           ` Serge Semin
2020-05-15 11:02             ` Andy Shevchenko
2020-05-15  6:39           ` Vinod Koul
2020-05-17 19:38             ` Serge Semin
2020-05-19 17:07               ` Vinod Koul
2020-05-21  1:47                 ` Serge Semin
2020-05-08 10:53   ` [PATCH v2 6/6] dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config Serge Semin
2020-05-08 11:43     ` Andy Shevchenko

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