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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Serge Semin <fancer.lancer@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, Viresh Kumar <vireshk@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>, Arnd Bergmann <arnd@arndb.de>,
	Dan Williams <dan.j.williams@intel.com>,
	linux-mips@vger.kernel.org, dmaengine@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/6] dt-bindings: dma: dw: Add max burst transaction length property
Date: Tue, 12 May 2020 00:01:38 +0300	[thread overview]
Message-ID: <20200511210138.GN185537@smile.fi.intel.com> (raw)
In-Reply-To: <20200511200528.nfkc2zkh3bvupn7l@mobilestation>

On Mon, May 11, 2020 at 11:05:28PM +0300, Serge Semin wrote:
> On Fri, May 08, 2020 at 02:12:42PM +0300, Andy Shevchenko wrote:
> > On Fri, May 08, 2020 at 01:53:00PM +0300, Serge Semin wrote:
> > > This array property is used to indicate the maximum burst transaction
> > > length supported by each DMA channel.
> > 
> > > +  snps,max-burst-len:
> > > +    $ref: /schemas/types.yaml#/definitions/uint32-array
> > > +    description: |
> > > +      Maximum length of burst transactions supported by hardware.
> > > +      It's an array property with one cell per channel in units of
> > > +      CTLx register SRC_TR_WIDTH/DST_TR_WIDTH (data-width) field.
> > > +    items:
> > > +      maxItems: 8
> > > +      items:
> > 
> > > +        enum: [4, 8, 16, 32, 64, 128, 256]
> > 
> > Isn't 1 allowed?
> 
> Burst length of 1 unit is supported, but in accordance with Data Book the MAX
> burst length is limited to be equal to a value from the set I submitted. So the
> max value can be either 4, or 8, or 16 and so on.

Hmm... It seems you mistakenly took here DMAH_CHx_MAX_MULT_SIZE pre-silicon
configuration parameter instead of runtime as described in Table 26:
CTLx.SRC_MSIZE and DEST_MSIZE Decoding.

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2020-05-11 21:02 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-06 13:10 [PATCH 0/5] dmaengine: dw: Take Baikal-T1 SoC DW DMAC peculiarities into account Sergey.Semin
2020-03-06 13:29 ` Andy Shevchenko
2020-03-06 13:30   ` Andy Shevchenko
2020-03-06 13:43     ` Vinod Koul
     [not found]     ` <20200306135050.40094803087C@mail.baikalelectronics.ru>
2020-03-09 21:45       ` Sergey Semin
     [not found]   ` <20200306133756.0F74C8030793@mail.baikalelectronics.ru>
2020-03-06 13:47     ` Sergey Semin
2020-03-06 14:11       ` Andy Shevchenko
     [not found]       ` <20200306141135.9C4F380307C2@mail.baikalelectronics.ru>
2020-03-09 22:08         ` Sergey Semin
2020-05-08 10:52 ` [PATCH v2 0/6] " Serge Semin
2020-05-08 10:52   ` [PATCH v2 1/6] dt-bindings: dma: dw: Convert DW DMAC to DT binding Serge Semin
2020-05-18 17:50     ` Rob Herring
2020-05-08 10:53   ` [PATCH v2 2/6] dt-bindings: dma: dw: Add max burst transaction length property Serge Semin
2020-05-08 11:12     ` Andy Shevchenko
2020-05-11 20:05       ` Serge Semin
2020-05-11 21:01         ` Andy Shevchenko [this message]
2020-05-11 21:35           ` Serge Semin
2020-05-12  9:08             ` Andy Shevchenko
2020-05-12 11:49               ` Serge Semin
2020-05-12 12:38                 ` Andy Shevchenko
2020-05-15  6:09                   ` Vinod Koul
2020-05-15 10:51                     ` Andy Shevchenko
2020-05-15 10:56                       ` Vinod Koul
2020-05-15 11:11                         ` Serge Semin
2020-05-17 17:47                           ` Serge Semin
2020-05-18 17:30                             ` Rob Herring
2020-05-18 19:30                               ` Serge Semin
2020-05-19 17:13                             ` Vinod Koul
2020-05-21  1:33                               ` Serge Semin
2020-05-08 10:53   ` [PATCH v2 3/6] dmaengine: dw: Set DMA device max segment size parameter Serge Semin
2020-05-08 11:21     ` Andy Shevchenko
2020-05-08 18:49       ` Vineet Gupta
2020-05-08 18:49         ` Vineet Gupta
2020-05-11 21:16       ` Serge Semin
2020-05-12 12:35         ` Andy Shevchenko
2020-05-12 17:01           ` Serge Semin
2020-05-15  6:16           ` Vinod Koul
2020-05-15 10:53             ` Andy Shevchenko
2020-05-17 18:22               ` Serge Semin
2020-05-08 10:53   ` [PATCH v2 4/6] dmaengine: dw: Print warning if multi-block is unsupported Serge Semin
2020-05-08 11:26     ` Andy Shevchenko
2020-05-08 11:53       ` Mark Brown
2020-05-08 19:06         ` Andy Shevchenko
2020-05-11  3:13           ` Serge Semin
2020-05-11 14:03             ` Andy Shevchenko
2020-05-11  2:10         ` Serge Semin
2020-05-11 11:58           ` Mark Brown
2020-05-11 13:45             ` Serge Semin
2020-05-11 13:58               ` Andy Shevchenko
2020-05-11 17:48                 ` Mark Brown
2020-05-11 18:25                   ` Serge Semin
2020-05-11 19:32                 ` Serge Semin
2020-05-11 21:07                   ` Andy Shevchenko
2020-05-11 21:08                     ` Andy Shevchenko
2020-05-12 12:42                       ` Serge Semin
2020-05-15  6:30                         ` Vinod Koul
2020-05-17 19:23                           ` Serge Semin
2020-05-19 17:02                             ` Vinod Koul
2020-05-21  1:40                               ` Serge Semin
2020-05-11 17:44               ` Mark Brown
2020-05-11 18:32                 ` Serge Semin
2020-05-11 21:32                   ` Mark Brown
2020-05-08 10:53   ` [PATCH v2 5/6] dmaengine: dw: Introduce max burst length hw config Serge Semin
2020-05-08 11:41     ` Andy Shevchenko
2020-05-12 14:08       ` Serge Semin
2020-05-12 19:12         ` Andy Shevchenko
2020-05-12 19:47           ` Serge Semin
2020-05-15 11:02             ` Andy Shevchenko
2020-05-15  6:39           ` Vinod Koul
2020-05-17 19:38             ` Serge Semin
2020-05-19 17:07               ` Vinod Koul
2020-05-21  1:47                 ` Serge Semin
2020-05-08 10:53   ` [PATCH v2 6/6] dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config Serge Semin
2020-05-08 11:43     ` Andy Shevchenko

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