From: Lyude Paul <lyude@redhat.com> To: nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: Ben Skeggs <bskeggs@redhat.com>, David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, Ilia Mirkin <imirkin@alum.mit.edu> Subject: [RFC v4 06/12] drm/nouveau/kms/nv140-: Don't modify depth in state during atomic commit Date: Fri, 8 May 2020 16:46:56 -0400 [thread overview] Message-ID: <20200508204751.155488-7-lyude@redhat.com> (raw) In-Reply-To: <20200508204751.155488-1-lyude@redhat.com> Currently, we modify the depth value stored in the atomic state when performing a commit in order to workaround the fact we haven't implemented support for depths higher then 10 yet. This isn't idempotent though, as it will happen every atomic commit where we modify the OR state even if the head's depth in the atomic state hasn't been modified. Normally this wouldn't matter, since we don't modify OR state outside of modesets, but since the CRC capture region is implemented as part of the OR state in hardware we'll want to make sure all commits modifying OR state are idempotent so as to avoid changing the depth unexpectedly. So, fix this by simply not writing the reduced depth value we come up with to the atomic state. Signed-off-by: Lyude Paul <lyude@redhat.com> --- drivers/gpu/drm/nouveau/dispnv50/headc37d.c | 11 +++++++---- drivers/gpu/drm/nouveau/dispnv50/headc57d.c | 11 +++++++---- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c index 00011ce109a6..68920f8d9c79 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c @@ -27,17 +27,20 @@ static void headc37d_or(struct nv50_head *head, struct nv50_head_atom *asyh) { struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; + u8 depth; u32 *push; + if ((push = evo_wait(core, 2))) { /*XXX: This is a dirty hack until OR depth handling is * improved later for deep colour etc. */ switch (asyh->or.depth) { - case 6: asyh->or.depth = 5; break; - case 5: asyh->or.depth = 4; break; - case 2: asyh->or.depth = 1; break; - case 0: asyh->or.depth = 4; break; + case 6: depth = 5; break; + case 5: depth = 4; break; + case 2: depth = 1; break; + case 0: depth = 4; break; default: + depth = asyh->or.depth; WARN_ON(1); break; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c index 938d910a1b1e..0296cd1d761f 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c @@ -27,17 +27,20 @@ static void headc57d_or(struct nv50_head *head, struct nv50_head_atom *asyh) { struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; + u8 depth; u32 *push; + if ((push = evo_wait(core, 2))) { /*XXX: This is a dirty hack until OR depth handling is * improved later for deep colour etc. */ switch (asyh->or.depth) { - case 6: asyh->or.depth = 5; break; - case 5: asyh->or.depth = 4; break; - case 2: asyh->or.depth = 1; break; - case 0: asyh->or.depth = 4; break; + case 6: depth = 5; break; + case 5: depth = 4; break; + case 2: depth = 1; break; + case 0: depth = 4; break; default: + depth = asyh->or.depth; WARN_ON(1); break; } -- 2.25.4
WARNING: multiple messages have this Message-ID (diff)
From: Lyude Paul <lyude@redhat.com> To: nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: David Airlie <airlied@linux.ie>, Ben Skeggs <bskeggs@redhat.com> Subject: [RFC v4 06/12] drm/nouveau/kms/nv140-: Don't modify depth in state during atomic commit Date: Fri, 8 May 2020 16:46:56 -0400 [thread overview] Message-ID: <20200508204751.155488-7-lyude@redhat.com> (raw) In-Reply-To: <20200508204751.155488-1-lyude@redhat.com> Currently, we modify the depth value stored in the atomic state when performing a commit in order to workaround the fact we haven't implemented support for depths higher then 10 yet. This isn't idempotent though, as it will happen every atomic commit where we modify the OR state even if the head's depth in the atomic state hasn't been modified. Normally this wouldn't matter, since we don't modify OR state outside of modesets, but since the CRC capture region is implemented as part of the OR state in hardware we'll want to make sure all commits modifying OR state are idempotent so as to avoid changing the depth unexpectedly. So, fix this by simply not writing the reduced depth value we come up with to the atomic state. Signed-off-by: Lyude Paul <lyude@redhat.com> --- drivers/gpu/drm/nouveau/dispnv50/headc37d.c | 11 +++++++---- drivers/gpu/drm/nouveau/dispnv50/headc57d.c | 11 +++++++---- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c index 00011ce109a6..68920f8d9c79 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c @@ -27,17 +27,20 @@ static void headc37d_or(struct nv50_head *head, struct nv50_head_atom *asyh) { struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; + u8 depth; u32 *push; + if ((push = evo_wait(core, 2))) { /*XXX: This is a dirty hack until OR depth handling is * improved later for deep colour etc. */ switch (asyh->or.depth) { - case 6: asyh->or.depth = 5; break; - case 5: asyh->or.depth = 4; break; - case 2: asyh->or.depth = 1; break; - case 0: asyh->or.depth = 4; break; + case 6: depth = 5; break; + case 5: depth = 4; break; + case 2: depth = 1; break; + case 0: depth = 4; break; default: + depth = asyh->or.depth; WARN_ON(1); break; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c index 938d910a1b1e..0296cd1d761f 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c @@ -27,17 +27,20 @@ static void headc57d_or(struct nv50_head *head, struct nv50_head_atom *asyh) { struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; + u8 depth; u32 *push; + if ((push = evo_wait(core, 2))) { /*XXX: This is a dirty hack until OR depth handling is * improved later for deep colour etc. */ switch (asyh->or.depth) { - case 6: asyh->or.depth = 5; break; - case 5: asyh->or.depth = 4; break; - case 2: asyh->or.depth = 1; break; - case 0: asyh->or.depth = 4; break; + case 6: depth = 5; break; + case 5: depth = 4; break; + case 2: depth = 1; break; + case 0: depth = 4; break; default: + depth = asyh->or.depth; WARN_ON(1); break; } -- 2.25.4 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-05-08 20:48 UTC|newest] Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-08 20:46 [RFC v4 00/12] drm/nouveau: Introduce CRC support for gf119+ Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:46 ` [RFC v4 01/12] kthread: Add kthread_queue_flush_work() Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-09 16:31 ` kbuild test robot 2020-05-11 14:49 ` Tejun Heo 2020-05-11 14:49 ` Tejun Heo 2020-05-11 15:02 ` Daniel Vetter 2020-05-11 15:02 ` Daniel Vetter 2020-05-08 20:46 ` [RFC v4 02/12] kthread: Add kthread_(un)block_work_queuing() and kthread_work_queuable() Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-11 15:02 ` Tejun Heo 2020-05-11 15:02 ` Tejun Heo [not found] ` <20200508204751.155488-3-lyude-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2020-05-14 15:07 ` William Lewis 2020-05-08 20:46 ` [RFC v4 03/12] drm/vblank: Register drmm cleanup action once per drm_vblank_crtc Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:59 ` Daniel Vetter 2020-05-08 20:59 ` Daniel Vetter 2020-05-08 20:46 ` [RFC v4 04/12] drm/vblank: Add vblank works Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-10 3:03 ` kbuild test robot 2020-05-12 17:56 ` Nick Desaulniers 2020-05-08 20:46 ` [RFC v4 05/12] drm/nouveau/kms/nv50-: Unroll error cleanup in nv50_head_create() Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:46 ` Lyude Paul [this message] 2020-05-08 20:46 ` [RFC v4 06/12] drm/nouveau/kms/nv140-: Don't modify depth in state during atomic commit Lyude Paul 2020-05-08 20:46 ` [RFC v4 07/12] drm/nouveau/kms/nv50-: Fix disabling dithering Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:46 ` [RFC v4 08/12] drm/nouveau/kms/nv50-: s/harm/armh/g Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:46 ` [RFC v4 09/12] drm/nouveau/kms/nv140-: Track wndw mappings in nv50_head_atom Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:46 ` Lyude Paul 2020-05-08 20:47 ` [RFC v4 10/12] drm/nouveau/kms/nv50-: Expose nv50_outp_atom in disp.h Lyude Paul 2020-05-08 20:47 ` Lyude Paul 2020-05-08 20:47 ` Lyude Paul 2020-05-08 20:47 ` [RFC v4 11/12] drm/nouveau/kms/nv50-: Move hard-coded object handles into header Lyude Paul 2020-05-08 20:47 ` Lyude Paul 2020-05-08 20:47 ` [RFC v4 12/12] drm/nouveau/kms/nvd9-: Add CRC support Lyude Paul 2020-05-08 20:47 ` Lyude Paul 2020-05-08 20:47 ` Lyude Paul
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