From: Mathieu Poirier <mathieu.poirier@linaro.org> To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>, linux-arm-msm <linux-arm-msm@vger.kernel.org>, Coresight ML <coresight@lists.linaro.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Stephen Boyd <swboyd@chromium.org>, Tingwei Zhang <tingwei@codeaurora.org>, Leo Yan <leo.yan@linaro.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, Mike Leach <mike.leach@linaro.org> Subject: Re: [PATCH] coresight: etm4x: Add support to disable trace unit power up Date: Fri, 15 May 2020 09:51:44 -0600 [thread overview] Message-ID: <20200515155144.GA7085@xps15> (raw) In-Reply-To: <a0f8f01f28506e10001885e387d3cb4f@codeaurora.org> On Fri, May 15, 2020 at 08:37:13PM +0530, Sai Prakash Ranjan wrote: > Hi Mathieu, > > On 2020-05-15 20:22, Mathieu Poirier wrote: > > On Thu, 14 May 2020 at 12:39, Sai Prakash Ranjan > > <saiprakash.ranjan@codeaurora.org> wrote: > > > > > > Hi Mathieu, > > > > > > On 2020-05-14 23:30, Mathieu Poirier wrote: > > > > Good morning Sai, > > > > > > > > On Thu, May 14, 2020 at 04:29:15PM +0530, Sai Prakash Ranjan wrote: > > > >> From: Tingwei Zhang <tingwei@codeaurora.org> > > > >> > > > >> On some Qualcomm Technologies Inc. SoCs like SC7180, there > > > >> exists a hardware errata where the APSS (Application Processor > > > >> SubSystem)/CPU watchdog counter is stopped when ETM register > > > >> TRCPDCR.PU=1. > > > > > > > > Fun stuff... > > > > > > > > > > Yes :) > > > > > > >> Since the ETMs share the same power domain as > > > >> that of respective CPU cores, they are powered on when the > > > >> CPU core is powered on. So we can disable powering up of the > > > >> trace unit after checking for this errata via new property > > > >> called "qcom,tupwr-disable". > > > >> > > > >> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> > > > >> Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > > > >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > > > > > > > > Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > > > > Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> > > > > > > > > > > Tingwei is the author, so if I understand correctly, his signed-off-by > > > should appear first, am I wrong? > > > > It's a gray area and depends on who's code is more prevalent in the > > patch. If Tingwei wrote the most of the code then his name is in the > > "from:" section, yours as co-developer and he signs off on it (as I > > suggested). If you did most of the work then it is the opposite. > > Adding a Co-developed and a signed-off with the same name doesn't make > > sense. > > > > I did check the documentation for submitting patches: > Documentation/process/submitting-patches.rst. And it clearly states > that "Co-developed-by must be followed by Signed-off by the co-author > and the last Signed-off-by: must always be that of the developer > submitting the patch". > > Quoting below from the doc: > > Co-developed-by: <snip> ...Since > Co-developed-by: denotes authorship, every Co-developed-by: must be > immediately > followed by a Signed-off-by: of the associated co-author. Standard sign-off > procedure applies, i.e. the ordering of Signed-off-by: tags should reflect > the > chronological history of the patch insofar as possible, regardless of > whether > the author is attributed via From: or Co-developed-by:. Notably, the last > Signed-off-by: must always be that of the developer submitting the patch. Ah yes, glad to see that got clarified. You can ignore my recommendation on that snippet. > > > > > > > >> --- > > > >> .../devicetree/bindings/arm/coresight.txt | 6 ++++ > > > >> drivers/hwtracing/coresight/coresight-etm4x.c | 29 > > > >> ++++++++++++------- > > > > > > > > Please split in two patches. > > > > > > > > > > Sure, I will split the dt-binding into separate patch, checkpatch did > > > warn. > > > > And you still sent me the patch... I usually run checkpatch before > > all the submissions I review and flatly ignore patches that return > > errors. You got lucky... > > > > I did not mean to ignore it or else I wouldn't have run checkpatch itself. > I checked other cases like "arm,scatter-gather" where the binding and the > driver change was in a single patch, hence I thought it's not a very strict > rule. The patch has another warning for a line over 80 characters, that should have been fixed before sending. Putting DT changes in a separate patch is always better for the DT people. They review tons of patches and making their life easier is always a good thing. Regards, Mathieu > > Thanks, > Sai > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: Mathieu Poirier <mathieu.poirier@linaro.org> To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>, linux-arm-msm <linux-arm-msm@vger.kernel.org>, Coresight ML <coresight@lists.linaro.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Stephen Boyd <swboyd@chromium.org>, Tingwei Zhang <tingwei@codeaurora.org>, Leo Yan <leo.yan@linaro.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, Mike Leach <mike.leach@linaro.org> Subject: Re: [PATCH] coresight: etm4x: Add support to disable trace unit power up Date: Fri, 15 May 2020 09:51:44 -0600 [thread overview] Message-ID: <20200515155144.GA7085@xps15> (raw) In-Reply-To: <a0f8f01f28506e10001885e387d3cb4f@codeaurora.org> On Fri, May 15, 2020 at 08:37:13PM +0530, Sai Prakash Ranjan wrote: > Hi Mathieu, > > On 2020-05-15 20:22, Mathieu Poirier wrote: > > On Thu, 14 May 2020 at 12:39, Sai Prakash Ranjan > > <saiprakash.ranjan@codeaurora.org> wrote: > > > > > > Hi Mathieu, > > > > > > On 2020-05-14 23:30, Mathieu Poirier wrote: > > > > Good morning Sai, > > > > > > > > On Thu, May 14, 2020 at 04:29:15PM +0530, Sai Prakash Ranjan wrote: > > > >> From: Tingwei Zhang <tingwei@codeaurora.org> > > > >> > > > >> On some Qualcomm Technologies Inc. SoCs like SC7180, there > > > >> exists a hardware errata where the APSS (Application Processor > > > >> SubSystem)/CPU watchdog counter is stopped when ETM register > > > >> TRCPDCR.PU=1. > > > > > > > > Fun stuff... > > > > > > > > > > Yes :) > > > > > > >> Since the ETMs share the same power domain as > > > >> that of respective CPU cores, they are powered on when the > > > >> CPU core is powered on. So we can disable powering up of the > > > >> trace unit after checking for this errata via new property > > > >> called "qcom,tupwr-disable". > > > >> > > > >> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> > > > >> Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > > > >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > > > > > > > > Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > > > > Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> > > > > > > > > > > Tingwei is the author, so if I understand correctly, his signed-off-by > > > should appear first, am I wrong? > > > > It's a gray area and depends on who's code is more prevalent in the > > patch. If Tingwei wrote the most of the code then his name is in the > > "from:" section, yours as co-developer and he signs off on it (as I > > suggested). If you did most of the work then it is the opposite. > > Adding a Co-developed and a signed-off with the same name doesn't make > > sense. > > > > I did check the documentation for submitting patches: > Documentation/process/submitting-patches.rst. And it clearly states > that "Co-developed-by must be followed by Signed-off by the co-author > and the last Signed-off-by: must always be that of the developer > submitting the patch". > > Quoting below from the doc: > > Co-developed-by: <snip> ...Since > Co-developed-by: denotes authorship, every Co-developed-by: must be > immediately > followed by a Signed-off-by: of the associated co-author. Standard sign-off > procedure applies, i.e. the ordering of Signed-off-by: tags should reflect > the > chronological history of the patch insofar as possible, regardless of > whether > the author is attributed via From: or Co-developed-by:. Notably, the last > Signed-off-by: must always be that of the developer submitting the patch. Ah yes, glad to see that got clarified. You can ignore my recommendation on that snippet. > > > > > > > >> --- > > > >> .../devicetree/bindings/arm/coresight.txt | 6 ++++ > > > >> drivers/hwtracing/coresight/coresight-etm4x.c | 29 > > > >> ++++++++++++------- > > > > > > > > Please split in two patches. > > > > > > > > > > Sure, I will split the dt-binding into separate patch, checkpatch did > > > warn. > > > > And you still sent me the patch... I usually run checkpatch before > > all the submissions I review and flatly ignore patches that return > > errors. You got lucky... > > > > I did not mean to ignore it or else I wouldn't have run checkpatch itself. > I checked other cases like "arm,scatter-gather" where the binding and the > driver change was in a single patch, hence I thought it's not a very strict > rule. The patch has another warning for a line over 80 characters, that should have been fixed before sending. Putting DT changes in a separate patch is always better for the DT people. They review tons of patches and making their life easier is always a good thing. Regards, Mathieu > > Thanks, > Sai > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-05-15 15:51 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-14 10:59 [PATCH] coresight: etm4x: Add support to disable trace unit power up Sai Prakash Ranjan 2020-05-14 10:59 ` Sai Prakash Ranjan 2020-05-14 18:00 ` Mathieu Poirier 2020-05-14 18:00 ` Mathieu Poirier 2020-05-14 18:39 ` Sai Prakash Ranjan 2020-05-14 18:39 ` Sai Prakash Ranjan 2020-05-15 14:52 ` Mathieu Poirier 2020-05-15 14:52 ` Mathieu Poirier 2020-05-15 15:07 ` Sai Prakash Ranjan 2020-05-15 15:07 ` Sai Prakash Ranjan 2020-05-15 15:51 ` Mathieu Poirier [this message] 2020-05-15 15:51 ` Mathieu Poirier 2020-05-15 15:58 ` Sai Prakash Ranjan 2020-05-15 15:58 ` Sai Prakash Ranjan 2020-05-15 16:25 ` Sai Prakash Ranjan 2020-05-15 16:25 ` Sai Prakash Ranjan
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