* [PATCH 00/10] softfloat: misc cleanups
@ 2020-05-15 19:01 Richard Henderson
2020-05-15 19:01 ` [PATCH 01/10] softfloat: Use post test for floatN_mul Richard Henderson
` (10 more replies)
0 siblings, 11 replies; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
This is a grab-bag collection of cleanups, at least one of which
have been on the to-do list since day we abandoned compatibility
with upstream softfloat.
The compare changes have near-zero effect for float32/float64, since
that's the way they are implemented now. For float128, it simply
removes unneeded complexity.
For floatx80, this fixes bugs vs pseudo-denormals which were only
fixed in floatx80_compare_internal. We could just remove them, as
these interfaces are not used by x87. But I thought it'd be best
to keep the interface compatibility for now.
r~
Richard Henderson (10):
softfloat: Use post test for floatN_mul
softfloat: Replace flag with bool
softfloat: Change tininess_before_rounding to bool
softfloat: Name rounding mode enum
softfloat: Name compare relation enum
softfloat: Inline float32 compare specializations
softfloat: Inline float64 compare specializations
softfloat: Inline float128 compare specializations
softfloat: Inline floatx80 compare specializations
softfloat: Return bool from all classification predicates
include/fpu/softfloat-helpers.h | 27 +-
include/fpu/softfloat-macros.h | 24 +-
include/fpu/softfloat-types.h | 28 +-
include/fpu/softfloat.h | 336 +++++---
target/i386/ops_sse.h | 8 +-
fpu/softfloat-specialize.inc.c | 32 +-
fpu/softfloat.c | 1305 ++++---------------------------
target/arm/sve_helper.c | 8 +-
target/arm/vfp_helper.c | 14 +-
target/hppa/op_helper.c | 7 +-
target/i386/fpu_helper.c | 8 +-
target/m68k/fpu_helper.c | 6 +-
target/m68k/softfloat.c | 70 +-
target/mips/msa_helper.c | 10 +-
target/openrisc/fpu_helper.c | 4 +-
target/ppc/int_helper.c | 13 +-
target/s390x/fpu_helper.c | 22 +-
target/s390x/vec_fpu_helper.c | 2 +-
target/sparc/fop_helper.c | 4 +-
target/unicore32/ucf64_helper.c | 6 +-
target/xtensa/fpu_helper.c | 6 +-
tests/fp/fp-test.c | 2 +-
22 files changed, 547 insertions(+), 1395 deletions(-)
--
2.20.1
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 01/10] softfloat: Use post test for floatN_mul
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-19 8:48 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 02/10] softfloat: Replace flag with bool Richard Henderson
` (9 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
The existing f{32,64}_addsub_post test, which checks for zero
inputs, is identical to f{32,64}_mul_fast_test. Which means
we can eliminate the fast_test/fast_op hooks in favor of
reusing the same post hook.
This means we have one fewer test along the fast path for multiply.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
fpu/softfloat.c | 65 +++++++++++--------------------------------------
1 file changed, 14 insertions(+), 51 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index a362bf89ca..5fb4ef75bb 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -339,12 +339,10 @@ static inline bool f64_is_inf(union_float64 a)
return float64_is_infinity(a.s);
}
-/* Note: @fast_test and @post can be NULL */
static inline float32
float32_gen2(float32 xa, float32 xb, float_status *s,
hard_f32_op2_fn hard, soft_f32_op2_fn soft,
- f32_check_fn pre, f32_check_fn post,
- f32_check_fn fast_test, soft_f32_op2_fn fast_op)
+ f32_check_fn pre, f32_check_fn post)
{
union_float32 ua, ub, ur;
@@ -359,17 +357,12 @@ float32_gen2(float32 xa, float32 xb, float_status *s,
if (unlikely(!pre(ua, ub))) {
goto soft;
}
- if (fast_test && fast_test(ua, ub)) {
- return fast_op(ua.s, ub.s, s);
- }
ur.h = hard(ua.h, ub.h);
if (unlikely(f32_is_inf(ur))) {
s->float_exception_flags |= float_flag_overflow;
- } else if (unlikely(fabsf(ur.h) <= FLT_MIN)) {
- if (post == NULL || post(ua, ub)) {
- goto soft;
- }
+ } else if (unlikely(fabsf(ur.h) <= FLT_MIN) && post(ua, ub)) {
+ goto soft;
}
return ur.s;
@@ -380,8 +373,7 @@ float32_gen2(float32 xa, float32 xb, float_status *s,
static inline float64
float64_gen2(float64 xa, float64 xb, float_status *s,
hard_f64_op2_fn hard, soft_f64_op2_fn soft,
- f64_check_fn pre, f64_check_fn post,
- f64_check_fn fast_test, soft_f64_op2_fn fast_op)
+ f64_check_fn pre, f64_check_fn post)
{
union_float64 ua, ub, ur;
@@ -396,17 +388,12 @@ float64_gen2(float64 xa, float64 xb, float_status *s,
if (unlikely(!pre(ua, ub))) {
goto soft;
}
- if (fast_test && fast_test(ua, ub)) {
- return fast_op(ua.s, ub.s, s);
- }
ur.h = hard(ua.h, ub.h);
if (unlikely(f64_is_inf(ur))) {
s->float_exception_flags |= float_flag_overflow;
- } else if (unlikely(fabs(ur.h) <= DBL_MIN)) {
- if (post == NULL || post(ua, ub)) {
- goto soft;
- }
+ } else if (unlikely(fabs(ur.h) <= DBL_MIN) && post(ua, ub)) {
+ goto soft;
}
return ur.s;
@@ -1115,7 +1102,7 @@ static double hard_f64_sub(double a, double b)
return a - b;
}
-static bool f32_addsub_post(union_float32 a, union_float32 b)
+static bool f32_addsubmul_post(union_float32 a, union_float32 b)
{
if (QEMU_HARDFLOAT_2F32_USE_FP) {
return !(fpclassify(a.h) == FP_ZERO && fpclassify(b.h) == FP_ZERO);
@@ -1123,7 +1110,7 @@ static bool f32_addsub_post(union_float32 a, union_float32 b)
return !(float32_is_zero(a.s) && float32_is_zero(b.s));
}
-static bool f64_addsub_post(union_float64 a, union_float64 b)
+static bool f64_addsubmul_post(union_float64 a, union_float64 b)
{
if (QEMU_HARDFLOAT_2F64_USE_FP) {
return !(fpclassify(a.h) == FP_ZERO && fpclassify(b.h) == FP_ZERO);
@@ -1136,14 +1123,14 @@ static float32 float32_addsub(float32 a, float32 b, float_status *s,
hard_f32_op2_fn hard, soft_f32_op2_fn soft)
{
return float32_gen2(a, b, s, hard, soft,
- f32_is_zon2, f32_addsub_post, NULL, NULL);
+ f32_is_zon2, f32_addsubmul_post);
}
static float64 float64_addsub(float64 a, float64 b, float_status *s,
hard_f64_op2_fn hard, soft_f64_op2_fn soft)
{
return float64_gen2(a, b, s, hard, soft,
- f64_is_zon2, f64_addsub_post, NULL, NULL);
+ f64_is_zon2, f64_addsubmul_post);
}
float32 QEMU_FLATTEN
@@ -1258,42 +1245,18 @@ static double hard_f64_mul(double a, double b)
return a * b;
}
-static bool f32_mul_fast_test(union_float32 a, union_float32 b)
-{
- return float32_is_zero(a.s) || float32_is_zero(b.s);
-}
-
-static bool f64_mul_fast_test(union_float64 a, union_float64 b)
-{
- return float64_is_zero(a.s) || float64_is_zero(b.s);
-}
-
-static float32 f32_mul_fast_op(float32 a, float32 b, float_status *s)
-{
- bool signbit = float32_is_neg(a) ^ float32_is_neg(b);
-
- return float32_set_sign(float32_zero, signbit);
-}
-
-static float64 f64_mul_fast_op(float64 a, float64 b, float_status *s)
-{
- bool signbit = float64_is_neg(a) ^ float64_is_neg(b);
-
- return float64_set_sign(float64_zero, signbit);
-}
-
float32 QEMU_FLATTEN
float32_mul(float32 a, float32 b, float_status *s)
{
return float32_gen2(a, b, s, hard_f32_mul, soft_f32_mul,
- f32_is_zon2, NULL, f32_mul_fast_test, f32_mul_fast_op);
+ f32_is_zon2, f32_addsubmul_post);
}
float64 QEMU_FLATTEN
float64_mul(float64 a, float64 b, float_status *s)
{
return float64_gen2(a, b, s, hard_f64_mul, soft_f64_mul,
- f64_is_zon2, NULL, f64_mul_fast_test, f64_mul_fast_op);
+ f64_is_zon2, f64_addsubmul_post);
}
/*
@@ -1834,14 +1797,14 @@ float32 QEMU_FLATTEN
float32_div(float32 a, float32 b, float_status *s)
{
return float32_gen2(a, b, s, hard_f32_div, soft_f32_div,
- f32_div_pre, f32_div_post, NULL, NULL);
+ f32_div_pre, f32_div_post);
}
float64 QEMU_FLATTEN
float64_div(float64 a, float64 b, float_status *s)
{
return float64_gen2(a, b, s, hard_f64_div, soft_f64_div,
- f64_div_pre, f64_div_post, NULL, NULL);
+ f64_div_pre, f64_div_post);
}
/*
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 02/10] softfloat: Replace flag with bool
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
2020-05-15 19:01 ` [PATCH 01/10] softfloat: Use post test for floatN_mul Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-16 5:27 ` Philippe Mathieu-Daudé
2020-05-19 8:53 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 03/10] softfloat: Change tininess_before_rounding to bool Richard Henderson
` (8 subsequent siblings)
10 siblings, 2 replies; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
We have had this on the to-do list for quite some time.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat-helpers.h | 14 +--
include/fpu/softfloat-macros.h | 24 ++--
include/fpu/softfloat-types.h | 14 +--
include/fpu/softfloat.h | 10 +-
fpu/softfloat-specialize.inc.c | 16 +--
fpu/softfloat.c | 190 ++++++++++++++++----------------
target/arm/sve_helper.c | 8 +-
target/arm/vfp_helper.c | 8 +-
target/m68k/softfloat.c | 70 ++++++------
target/mips/msa_helper.c | 10 +-
10 files changed, 174 insertions(+), 190 deletions(-)
diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helpers.h
index e0baf24c8f..528d7ebd9f 100644
--- a/include/fpu/softfloat-helpers.h
+++ b/include/fpu/softfloat-helpers.h
@@ -74,22 +74,22 @@ static inline void set_floatx80_rounding_precision(int val,
status->floatx80_rounding_precision = val;
}
-static inline void set_flush_to_zero(flag val, float_status *status)
+static inline void set_flush_to_zero(bool val, float_status *status)
{
status->flush_to_zero = val;
}
-static inline void set_flush_inputs_to_zero(flag val, float_status *status)
+static inline void set_flush_inputs_to_zero(bool val, float_status *status)
{
status->flush_inputs_to_zero = val;
}
-static inline void set_default_nan_mode(flag val, float_status *status)
+static inline void set_default_nan_mode(bool val, float_status *status)
{
status->default_nan_mode = val;
}
-static inline void set_snan_bit_is_one(flag val, float_status *status)
+static inline void set_snan_bit_is_one(bool val, float_status *status)
{
status->snan_bit_is_one = val;
}
@@ -114,17 +114,17 @@ static inline int get_floatx80_rounding_precision(float_status *status)
return status->floatx80_rounding_precision;
}
-static inline flag get_flush_to_zero(float_status *status)
+static inline bool get_flush_to_zero(float_status *status)
{
return status->flush_to_zero;
}
-static inline flag get_flush_inputs_to_zero(float_status *status)
+static inline bool get_flush_inputs_to_zero(float_status *status)
{
return status->flush_inputs_to_zero;
}
-static inline flag get_default_nan_mode(float_status *status)
+static inline bool get_default_nan_mode(float_status *status)
{
return status->default_nan_mode;
}
diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h
index 605c4f4bc6..a35ec2893a 100644
--- a/include/fpu/softfloat-macros.h
+++ b/include/fpu/softfloat-macros.h
@@ -756,11 +756,9 @@ static inline uint32_t estimateSqrt32(int aExp, uint32_t a)
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
-static inline flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
+static inline bool eq128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1)
{
-
- return ( a0 == b0 ) && ( a1 == b1 );
-
+ return a0 == b0 && a1 == b1;
}
/*----------------------------------------------------------------------------
@@ -769,11 +767,9 @@ static inline flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
-static inline flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
+static inline bool le128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1)
{
-
- return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) );
-
+ return a0 < b0 || (a0 == b0 && a1 <= b1);
}
/*----------------------------------------------------------------------------
@@ -782,11 +778,9 @@ static inline flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
| returns 0.
*----------------------------------------------------------------------------*/
-static inline flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
+static inline bool lt128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1)
{
-
- return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );
-
+ return a0 < b0 || (a0 == b0 && a1 < b1);
}
/*----------------------------------------------------------------------------
@@ -795,11 +789,9 @@ static inline flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
-static inline flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
+static inline bool ne128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1)
{
-
- return ( a0 != b0 ) || ( a1 != b1 );
-
+ return a0 != b0 || a1 != b1;
}
#endif
diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h
index 2aae6a89b1..619b875df6 100644
--- a/include/fpu/softfloat-types.h
+++ b/include/fpu/softfloat-types.h
@@ -80,12 +80,6 @@ this code that are retained.
#ifndef SOFTFLOAT_TYPES_H
#define SOFTFLOAT_TYPES_H
-/* This 'flag' type must be able to hold at least 0 and 1. It should
- * probably be replaced with 'bool' but the uses would need to be audited
- * to check that they weren't accidentally relying on it being a larger type.
- */
-typedef uint8_t flag;
-
/*
* Software IEC/IEEE floating-point types.
*/
@@ -169,12 +163,12 @@ typedef struct float_status {
uint8_t float_exception_flags;
signed char floatx80_rounding_precision;
/* should denormalised results go to zero and set the inexact flag? */
- flag flush_to_zero;
+ bool flush_to_zero;
/* should denormalised inputs go to zero and set the input_denormal flag? */
- flag flush_inputs_to_zero;
- flag default_nan_mode;
+ bool flush_inputs_to_zero;
+ bool default_nan_mode;
/* not always used -- see snan_bit_is_one() in softfloat-specialize.h */
- flag snan_bit_is_one;
+ bool snan_bit_is_one;
} float_status;
#endif /* SOFTFLOAT_TYPES_H */
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index ecb8ba0114..3f588da7c7 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -440,7 +440,7 @@ static inline float32 float32_set_sign(float32 a, int sign)
| significand.
*----------------------------------------------------------------------------*/
-static inline float32 packFloat32(flag zSign, int zExp, uint32_t zSig)
+static inline float32 packFloat32(bool zSign, int zExp, uint32_t zSig)
{
return make_float32(
(((uint32_t)zSign) << 31) + (((uint32_t)zExp) << 23) + zSig);
@@ -722,7 +722,7 @@ static inline int32_t extractFloatx80Exp(floatx80 a)
| `a'.
*----------------------------------------------------------------------------*/
-static inline flag extractFloatx80Sign(floatx80 a)
+static inline bool extractFloatx80Sign(floatx80 a)
{
return a.high >> 15;
}
@@ -732,7 +732,7 @@ static inline flag extractFloatx80Sign(floatx80 a)
| extended double-precision floating-point value, returning the result.
*----------------------------------------------------------------------------*/
-static inline floatx80 packFloatx80(flag zSign, int32_t zExp, uint64_t zSig)
+static inline floatx80 packFloatx80(bool zSign, int32_t zExp, uint64_t zSig)
{
floatx80 z;
@@ -783,7 +783,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status);
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
+floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign,
int32_t zExp, uint64_t zSig0, uint64_t zSig1,
float_status *status);
@@ -797,7 +797,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
*----------------------------------------------------------------------------*/
floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision,
- flag zSign, int32_t zExp,
+ bool zSign, int32_t zExp,
uint64_t zSig0, uint64_t zSig1,
float_status *status);
diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c
index 5ab2fa1941..025ee4f991 100644
--- a/fpu/softfloat-specialize.inc.c
+++ b/fpu/softfloat-specialize.inc.c
@@ -93,7 +93,7 @@ this code that are retained.
* 2008 revision and backward compatibility with their original choice.
* Thus for MIPS we must make the choice at runtime.
*/
-static inline flag snan_bit_is_one(float_status *status)
+static inline bool snan_bit_is_one(float_status *status)
{
#if defined(TARGET_MIPS)
return status->snan_bit_is_one;
@@ -114,7 +114,7 @@ static bool parts_is_snan_frac(uint64_t frac, float_status *status)
#ifdef NO_SIGNALING_NANS
return false;
#else
- flag msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1);
+ bool msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1);
return msb == snan_bit_is_one(status);
#endif
}
@@ -236,7 +236,7 @@ void float_raise(uint8_t flags, float_status *status)
| Internal canonical NaN format.
*----------------------------------------------------------------------------*/
typedef struct {
- flag sign;
+ bool sign;
uint64_t high, low;
} commonNaNT;
@@ -374,7 +374,7 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
*----------------------------------------------------------------------------*/
static int pickNaN(FloatClass a_cls, FloatClass b_cls,
- flag aIsLargerSignificand)
+ bool aIsLargerSignificand)
{
#if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA)
/* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
@@ -584,7 +584,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
{
- flag aIsLargerSignificand;
+ bool aIsLargerSignificand;
uint32_t av, bv;
FloatClass a_cls, b_cls;
@@ -722,7 +722,7 @@ static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
{
- flag aIsLargerSignificand;
+ bool aIsLargerSignificand;
uint64_t av, bv;
FloatClass a_cls, b_cls;
@@ -890,7 +890,7 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status)
{
- flag aIsLargerSignificand;
+ bool aIsLargerSignificand;
FloatClass a_cls, b_cls;
/* This is not complete, but is good enough for pickNaN. */
@@ -1038,7 +1038,7 @@ static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
static float128 propagateFloat128NaN(float128 a, float128 b,
float_status *status)
{
- flag aIsLargerSignificand;
+ bool aIsLargerSignificand;
FloatClass a_cls, b_cls;
/* This is not complete, but is good enough for pickNaN. */
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 5fb4ef75bb..b741cf5bc3 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -423,7 +423,7 @@ static inline int extractFloat32Exp(float32 a)
| Returns the sign bit of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-static inline flag extractFloat32Sign(float32 a)
+static inline bool extractFloat32Sign(float32 a)
{
return float32_val(a) >> 31;
}
@@ -450,7 +450,7 @@ static inline int extractFloat64Exp(float64 a)
| Returns the sign bit of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-static inline flag extractFloat64Sign(float64 a)
+static inline bool extractFloat64Sign(float64 a)
{
return float64_val(a) >> 63;
}
@@ -3328,10 +3328,11 @@ float64 float64_squash_input_denormal(float64 a, float_status *status)
| positive or negative integer is returned.
*----------------------------------------------------------------------------*/
-static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status)
+static int32_t roundAndPackInt32(bool zSign, uint64_t absZ,
+ float_status *status)
{
int8_t roundingMode;
- flag roundNearestEven;
+ bool roundNearestEven;
int8_t roundIncrement, roundBits;
int32_t z;
@@ -3385,11 +3386,11 @@ static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status
| returned.
*----------------------------------------------------------------------------*/
-static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1,
+static int64_t roundAndPackInt64(bool zSign, uint64_t absZ0, uint64_t absZ1,
float_status *status)
{
int8_t roundingMode;
- flag roundNearestEven, increment;
+ bool roundNearestEven, increment;
int64_t z;
roundingMode = status->float_rounding_mode;
@@ -3443,11 +3444,11 @@ static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1,
| exception is raised and the largest unsigned integer is returned.
*----------------------------------------------------------------------------*/
-static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
+static int64_t roundAndPackUint64(bool zSign, uint64_t absZ0,
uint64_t absZ1, float_status *status)
{
int8_t roundingMode;
- flag roundNearestEven, increment;
+ bool roundNearestEven, increment;
roundingMode = status->float_rounding_mode;
roundNearestEven = (roundingMode == float_round_nearest_even);
@@ -3531,13 +3532,13 @@ static void
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
+static float32 roundAndPackFloat32(bool zSign, int zExp, uint32_t zSig,
float_status *status)
{
int8_t roundingMode;
- flag roundNearestEven;
+ bool roundNearestEven;
int8_t roundIncrement, roundBits;
- flag isTiny;
+ bool isTiny;
roundingMode = status->float_rounding_mode;
roundNearestEven = ( roundingMode == float_round_nearest_even );
@@ -3618,7 +3619,7 @@ static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
*----------------------------------------------------------------------------*/
static float32
- normalizeRoundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
+ normalizeRoundAndPackFloat32(bool zSign, int zExp, uint32_t zSig,
float_status *status)
{
int8_t shiftCount;
@@ -3658,7 +3659,7 @@ static void
| significand.
*----------------------------------------------------------------------------*/
-static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig)
+static inline float64 packFloat64(bool zSign, int zExp, uint64_t zSig)
{
return make_float64(
@@ -3688,13 +3689,13 @@ static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig)
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
+static float64 roundAndPackFloat64(bool zSign, int zExp, uint64_t zSig,
float_status *status)
{
int8_t roundingMode;
- flag roundNearestEven;
+ bool roundNearestEven;
int roundIncrement, roundBits;
- flag isTiny;
+ bool isTiny;
roundingMode = status->float_rounding_mode;
roundNearestEven = ( roundingMode == float_round_nearest_even );
@@ -3774,7 +3775,7 @@ static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
*----------------------------------------------------------------------------*/
static float64
- normalizeRoundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
+ normalizeRoundAndPackFloat64(bool zSign, int zExp, uint64_t zSig,
float_status *status)
{
int8_t shiftCount;
@@ -3826,12 +3827,12 @@ void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr,
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
+floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign,
int32_t zExp, uint64_t zSig0, uint64_t zSig1,
float_status *status)
{
int8_t roundingMode;
- flag roundNearestEven, increment, isTiny;
+ bool roundNearestEven, increment, isTiny;
int64_t roundIncrement, roundMask, roundBits;
roundingMode = status->float_rounding_mode;
@@ -4025,7 +4026,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
*----------------------------------------------------------------------------*/
floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision,
- flag zSign, int32_t zExp,
+ bool zSign, int32_t zExp,
uint64_t zSig0, uint64_t zSig1,
float_status *status)
{
@@ -4084,11 +4085,9 @@ static inline int32_t extractFloat128Exp( float128 a )
| Returns the sign bit of the quadruple-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-static inline flag extractFloat128Sign( float128 a )
+static inline bool extractFloat128Sign(float128 a)
{
-
- return a.high>>63;
-
+ return a.high >> 63;
}
/*----------------------------------------------------------------------------
@@ -4146,14 +4145,13 @@ static void
*----------------------------------------------------------------------------*/
static inline float128
- packFloat128( flag zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1 )
+packFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1)
{
float128 z;
z.low = zSig1;
- z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0;
+ z.high = ((uint64_t)zSign << 63) + ((uint64_t)zExp << 48) + zSig0;
return z;
-
}
/*----------------------------------------------------------------------------
@@ -4177,12 +4175,12 @@ static inline float128
| overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float128 roundAndPackFloat128(flag zSign, int32_t zExp,
+static float128 roundAndPackFloat128(bool zSign, int32_t zExp,
uint64_t zSig0, uint64_t zSig1,
uint64_t zSig2, float_status *status)
{
int8_t roundingMode;
- flag roundNearestEven, increment, isTiny;
+ bool roundNearestEven, increment, isTiny;
roundingMode = status->float_rounding_mode;
roundNearestEven = ( roundingMode == float_round_nearest_even );
@@ -4302,7 +4300,7 @@ static float128 roundAndPackFloat128(flag zSign, int32_t zExp,
| point exponent.
*----------------------------------------------------------------------------*/
-static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp,
+static float128 normalizeRoundAndPackFloat128(bool zSign, int32_t zExp,
uint64_t zSig0, uint64_t zSig1,
float_status *status)
{
@@ -4338,7 +4336,7 @@ static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp,
floatx80 int32_to_floatx80(int32_t a, float_status *status)
{
- flag zSign;
+ bool zSign;
uint32_t absA;
int8_t shiftCount;
uint64_t zSig;
@@ -4360,7 +4358,7 @@ floatx80 int32_to_floatx80(int32_t a, float_status *status)
float128 int32_to_float128(int32_t a, float_status *status)
{
- flag zSign;
+ bool zSign;
uint32_t absA;
int8_t shiftCount;
uint64_t zSig0;
@@ -4383,7 +4381,7 @@ float128 int32_to_float128(int32_t a, float_status *status)
floatx80 int64_to_floatx80(int64_t a, float_status *status)
{
- flag zSign;
+ bool zSign;
uint64_t absA;
int8_t shiftCount;
@@ -4403,7 +4401,7 @@ floatx80 int64_to_floatx80(int64_t a, float_status *status)
float128 int64_to_float128(int64_t a, float_status *status)
{
- flag zSign;
+ bool zSign;
uint64_t absA;
int8_t shiftCount;
int32_t zExp;
@@ -4451,7 +4449,7 @@ float128 uint64_to_float128(uint64_t a, float_status *status)
floatx80 float32_to_floatx80(float32 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int aExp;
uint32_t aSig;
@@ -4487,7 +4485,7 @@ floatx80 float32_to_floatx80(float32 a, float_status *status)
float128 float32_to_float128(float32 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int aExp;
uint32_t aSig;
@@ -4518,7 +4516,7 @@ float128 float32_to_float128(float32 a, float_status *status)
float32 float32_rem(float32 a, float32 b, float_status *status)
{
- flag aSign, zSign;
+ bool aSign, zSign;
int aExp, bExp, expDiff;
uint32_t aSig, bSig;
uint32_t q;
@@ -4653,7 +4651,7 @@ static const float64 float32_exp2_coefficients[15] =
float32 float32_exp2(float32 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int aExp;
uint32_t aSig;
float64 r, x, xn;
@@ -4703,7 +4701,7 @@ float32 float32_exp2(float32 a, float_status *status)
*----------------------------------------------------------------------------*/
float32 float32_log2(float32 a, float_status *status)
{
- flag aSign, zSign;
+ bool aSign, zSign;
int aExp;
uint32_t aSig, zSig, i;
@@ -4779,7 +4777,7 @@ int float32_eq(float32 a, float32 b, float_status *status)
int float32_le(float32 a, float32 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
uint32_t av, bv;
a = float32_squash_input_denormal(a, status);
b = float32_squash_input_denormal(b, status);
@@ -4808,7 +4806,7 @@ int float32_le(float32 a, float32 b, float_status *status)
int float32_lt(float32 a, float32 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
uint32_t av, bv;
a = float32_squash_input_denormal(a, status);
b = float32_squash_input_denormal(b, status);
@@ -4883,7 +4881,7 @@ int float32_eq_quiet(float32 a, float32 b, float_status *status)
int float32_le_quiet(float32 a, float32 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
uint32_t av, bv;
a = float32_squash_input_denormal(a, status);
b = float32_squash_input_denormal(b, status);
@@ -4915,7 +4913,7 @@ int float32_le_quiet(float32 a, float32 b, float_status *status)
int float32_lt_quiet(float32 a, float32 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
uint32_t av, bv;
a = float32_squash_input_denormal(a, status);
b = float32_squash_input_denormal(b, status);
@@ -4971,7 +4969,7 @@ int float32_unordered_quiet(float32 a, float32 b, float_status *status)
floatx80 float64_to_floatx80(float64 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int aExp;
uint64_t aSig;
@@ -5008,7 +5006,7 @@ floatx80 float64_to_floatx80(float64 a, float_status *status)
float128 float64_to_float128(float64 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int aExp;
uint64_t aSig, zSig0, zSig1;
@@ -5041,7 +5039,7 @@ float128 float64_to_float128(float64 a, float_status *status)
float64 float64_rem(float64 a, float64 b, float_status *status)
{
- flag aSign, zSign;
+ bool aSign, zSign;
int aExp, bExp, expDiff;
uint64_t aSig, bSig;
uint64_t q, alternateASig;
@@ -5128,7 +5126,7 @@ float64 float64_rem(float64 a, float64 b, float_status *status)
*----------------------------------------------------------------------------*/
float64 float64_log2(float64 a, float_status *status)
{
- flag aSign, zSign;
+ bool aSign, zSign;
int aExp;
uint64_t aSig, aSig0, aSig1, zSig, i;
a = float64_squash_input_denormal(a, status);
@@ -5204,7 +5202,7 @@ int float64_eq(float64 a, float64 b, float_status *status)
int float64_le(float64 a, float64 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
@@ -5233,7 +5231,7 @@ int float64_le(float64 a, float64 b, float_status *status)
int float64_lt(float64 a, float64 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
@@ -5311,7 +5309,7 @@ int float64_eq_quiet(float64 a, float64 b, float_status *status)
int float64_le_quiet(float64 a, float64 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
@@ -5343,7 +5341,7 @@ int float64_le_quiet(float64 a, float64 b, float_status *status)
int float64_lt_quiet(float64 a, float64 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
uint64_t av, bv;
a = float64_squash_input_denormal(a, status);
b = float64_squash_input_denormal(b, status);
@@ -5402,7 +5400,7 @@ int float64_unordered_quiet(float64 a, float64 b, float_status *status)
int32_t floatx80_to_int32(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, shiftCount;
uint64_t aSig;
@@ -5433,7 +5431,7 @@ int32_t floatx80_to_int32(floatx80 a, float_status *status)
int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, shiftCount;
uint64_t aSig, savedASig;
int32_t z;
@@ -5484,7 +5482,7 @@ int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status)
int64_t floatx80_to_int64(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, shiftCount;
uint64_t aSig, aSigExtra;
@@ -5525,7 +5523,7 @@ int64_t floatx80_to_int64(floatx80 a, float_status *status)
int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, shiftCount;
uint64_t aSig;
int64_t z;
@@ -5572,7 +5570,7 @@ int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)
float32 floatx80_to_float32(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -5606,7 +5604,7 @@ float32 floatx80_to_float32(floatx80 a, float_status *status)
float64 floatx80_to_float64(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig, zSig;
@@ -5640,7 +5638,7 @@ float64 floatx80_to_float64(floatx80 a, float_status *status)
float128 floatx80_to_float128(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int aExp;
uint64_t aSig, zSig0, zSig1;
@@ -5686,7 +5684,7 @@ floatx80 floatx80_round(floatx80 a, float_status *status)
floatx80 floatx80_round_to_int(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t lastBitMask, roundBitsMask;
floatx80 z;
@@ -5783,7 +5781,7 @@ floatx80 floatx80_round_to_int(floatx80 a, float_status *status)
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
+static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, bool zSign,
float_status *status)
{
int32_t aExp, bExp, zExp;
@@ -5863,7 +5861,7 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
+static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, bool zSign,
float_status *status)
{
int32_t aExp, bExp, zExp;
@@ -5932,7 +5930,7 @@ static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
float_raise(float_flag_invalid, status);
@@ -5957,7 +5955,7 @@ floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status)
floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
float_raise(float_flag_invalid, status);
@@ -5982,7 +5980,7 @@ floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status)
floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign, zSign;
+ bool aSign, bSign, zSign;
int32_t aExp, bExp, zExp;
uint64_t aSig, bSig, zSig0, zSig1;
@@ -6044,7 +6042,7 @@ floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status)
floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign, zSign;
+ bool aSign, bSign, zSign;
int32_t aExp, bExp, zExp;
uint64_t aSig, bSig, zSig0, zSig1;
uint64_t rem0, rem1, rem2, term0, term1, term2;
@@ -6131,7 +6129,7 @@ floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status)
floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, zSign;
+ bool aSign, zSign;
int32_t aExp, bExp, expDiff;
uint64_t aSig0, aSig1, bSig;
uint64_t q, term0, term1, alternateASig0, alternateASig1;
@@ -6230,7 +6228,7 @@ floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status)
floatx80 floatx80_sqrt(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, zExp;
uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0;
uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
@@ -6331,7 +6329,7 @@ int floatx80_eq(floatx80 a, floatx80 b, float_status *status)
int floatx80_le(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
|| (extractFloatx80Exp(a) == 0x7FFF
@@ -6365,7 +6363,7 @@ int floatx80_le(floatx80 a, floatx80 b, float_status *status)
int floatx80_lt(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
|| (extractFloatx80Exp(a) == 0x7FFF
@@ -6453,7 +6451,7 @@ int floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *status)
int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
float_raise(float_flag_invalid, status);
@@ -6493,7 +6491,7 @@ int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status)
int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
float_raise(float_flag_invalid, status);
@@ -6562,7 +6560,7 @@ int floatx80_unordered_quiet(floatx80 a, floatx80 b, float_status *status)
int32_t float128_to_int32(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, shiftCount;
uint64_t aSig0, aSig1;
@@ -6591,7 +6589,7 @@ int32_t float128_to_int32(float128 a, float_status *status)
int32_t float128_to_int32_round_to_zero(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, shiftCount;
uint64_t aSig0, aSig1, savedASig;
int32_t z;
@@ -6641,7 +6639,7 @@ int32_t float128_to_int32_round_to_zero(float128 a, float_status *status)
int64_t float128_to_int64(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, shiftCount;
uint64_t aSig0, aSig1;
@@ -6684,7 +6682,7 @@ int64_t float128_to_int64(float128 a, float_status *status)
int64_t float128_to_int64_round_to_zero(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, shiftCount;
uint64_t aSig0, aSig1;
int64_t z;
@@ -6749,7 +6747,7 @@ int64_t float128_to_int64_round_to_zero(float128 a, float_status *status)
uint64_t float128_to_uint64(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int aExp;
int shiftCount;
uint64_t aSig0, aSig1;
@@ -6860,7 +6858,7 @@ uint32_t float128_to_uint32(float128 a, float_status *status)
float32 float128_to_float32(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig0, aSig1;
uint32_t zSig;
@@ -6895,7 +6893,7 @@ float32 float128_to_float32(float128 a, float_status *status)
float64 float128_to_float64(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig0, aSig1;
@@ -6928,7 +6926,7 @@ float64 float128_to_float64(float128 a, float_status *status)
floatx80 float128_to_floatx80(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig0, aSig1;
@@ -6966,7 +6964,7 @@ floatx80 float128_to_floatx80(float128 a, float_status *status)
float128 float128_round_to_int(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t lastBitMask, roundBitsMask;
float128 z;
@@ -7121,7 +7119,7 @@ float128 float128_round_to_int(float128 a, float_status *status)
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float128 addFloat128Sigs(float128 a, float128 b, flag zSign,
+static float128 addFloat128Sigs(float128 a, float128 b, bool zSign,
float_status *status)
{
int32_t aExp, bExp, zExp;
@@ -7212,7 +7210,7 @@ static float128 addFloat128Sigs(float128 a, float128 b, flag zSign,
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float128 subFloat128Sigs(float128 a, float128 b, flag zSign,
+static float128 subFloat128Sigs(float128 a, float128 b, bool zSign,
float_status *status)
{
int32_t aExp, bExp, zExp;
@@ -7300,7 +7298,7 @@ static float128 subFloat128Sigs(float128 a, float128 b, flag zSign,
float128 float128_add(float128 a, float128 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
aSign = extractFloat128Sign( a );
bSign = extractFloat128Sign( b );
@@ -7321,7 +7319,7 @@ float128 float128_add(float128 a, float128 b, float_status *status)
float128 float128_sub(float128 a, float128 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
aSign = extractFloat128Sign( a );
bSign = extractFloat128Sign( b );
@@ -7342,7 +7340,7 @@ float128 float128_sub(float128 a, float128 b, float_status *status)
float128 float128_mul(float128 a, float128 b, float_status *status)
{
- flag aSign, bSign, zSign;
+ bool aSign, bSign, zSign;
int32_t aExp, bExp, zExp;
uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
@@ -7405,7 +7403,7 @@ float128 float128_mul(float128 a, float128 b, float_status *status)
float128 float128_div(float128 a, float128 b, float_status *status)
{
- flag aSign, bSign, zSign;
+ bool aSign, bSign, zSign;
int32_t aExp, bExp, zExp;
uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
@@ -7492,7 +7490,7 @@ float128 float128_div(float128 a, float128 b, float_status *status)
float128 float128_rem(float128 a, float128 b, float_status *status)
{
- flag aSign, zSign;
+ bool aSign, zSign;
int32_t aExp, bExp, expDiff;
uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
uint64_t allZero, alternateASig0, alternateASig1, sigMean1;
@@ -7599,7 +7597,7 @@ float128 float128_rem(float128 a, float128 b, float_status *status)
float128 float128_sqrt(float128 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp, zExp;
uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
@@ -7695,7 +7693,7 @@ int float128_eq(float128 a, float128 b, float_status *status)
int float128_le(float128 a, float128 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
&& ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
@@ -7728,7 +7726,7 @@ int float128_le(float128 a, float128 b, float_status *status)
int float128_lt(float128 a, float128 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
&& ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
@@ -7811,7 +7809,7 @@ int float128_eq_quiet(float128 a, float128 b, float_status *status)
int float128_le_quiet(float128 a, float128 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
&& ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
@@ -7847,7 +7845,7 @@ int float128_le_quiet(float128 a, float128 b, float_status *status)
int float128_lt_quiet(float128 a, float128 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
&& ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
@@ -7900,7 +7898,7 @@ int float128_unordered_quiet(float128 a, float128 b, float_status *status)
static inline int floatx80_compare_internal(floatx80 a, floatx80 b,
int is_quiet, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
float_raise(float_flag_invalid, status);
@@ -7957,7 +7955,7 @@ int floatx80_compare_quiet(floatx80 a, floatx80 b, float_status *status)
static inline int float128_compare_internal(float128 a, float128 b,
int is_quiet, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
if (( ( extractFloat128Exp( a ) == 0x7fff ) &&
( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) ||
@@ -8000,7 +7998,7 @@ int float128_compare_quiet(float128 a, float128 b, float_status *status)
floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -8039,7 +8037,7 @@ floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status)
float128 float128_scalbn(float128 a, int n, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig0, aSig1;
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index 0da254d402..e590db6637 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -3201,7 +3201,7 @@ void HELPER(NAME)(void *vd, void *vn, void *vg, void *status, uint32_t desc) \
*/
static inline float32 sve_f16_to_f32(float16 f, float_status *fpst)
{
- flag save = get_flush_inputs_to_zero(fpst);
+ bool save = get_flush_inputs_to_zero(fpst);
float32 ret;
set_flush_inputs_to_zero(false, fpst);
@@ -3212,7 +3212,7 @@ static inline float32 sve_f16_to_f32(float16 f, float_status *fpst)
static inline float64 sve_f16_to_f64(float16 f, float_status *fpst)
{
- flag save = get_flush_inputs_to_zero(fpst);
+ bool save = get_flush_inputs_to_zero(fpst);
float64 ret;
set_flush_inputs_to_zero(false, fpst);
@@ -3223,7 +3223,7 @@ static inline float64 sve_f16_to_f64(float16 f, float_status *fpst)
static inline float16 sve_f32_to_f16(float32 f, float_status *fpst)
{
- flag save = get_flush_to_zero(fpst);
+ bool save = get_flush_to_zero(fpst);
float16 ret;
set_flush_to_zero(false, fpst);
@@ -3234,7 +3234,7 @@ static inline float16 sve_f32_to_f16(float32 f, float_status *fpst)
static inline float16 sve_f64_to_f16(float64 f, float_status *fpst)
{
- flag save = get_flush_to_zero(fpst);
+ bool save = get_flush_to_zero(fpst);
float16 ret;
set_flush_to_zero(false, fpst);
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 88483d4066..42625747d1 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -531,7 +531,7 @@ float32 HELPER(vfp_fcvt_f16_to_f32)(uint32_t a, void *fpstp, uint32_t ahp_mode)
* it would affect flushing input denormals.
*/
float_status *fpst = fpstp;
- flag save = get_flush_inputs_to_zero(fpst);
+ bool save = get_flush_inputs_to_zero(fpst);
set_flush_inputs_to_zero(false, fpst);
float32 r = float16_to_float32(a, !ahp_mode, fpst);
set_flush_inputs_to_zero(save, fpst);
@@ -544,7 +544,7 @@ uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, void *fpstp, uint32_t ahp_mode)
* it would affect flushing output denormals.
*/
float_status *fpst = fpstp;
- flag save = get_flush_to_zero(fpst);
+ bool save = get_flush_to_zero(fpst);
set_flush_to_zero(false, fpst);
float16 r = float32_to_float16(a, !ahp_mode, fpst);
set_flush_to_zero(save, fpst);
@@ -557,7 +557,7 @@ float64 HELPER(vfp_fcvt_f16_to_f64)(uint32_t a, void *fpstp, uint32_t ahp_mode)
* it would affect flushing input denormals.
*/
float_status *fpst = fpstp;
- flag save = get_flush_inputs_to_zero(fpst);
+ bool save = get_flush_inputs_to_zero(fpst);
set_flush_inputs_to_zero(false, fpst);
float64 r = float16_to_float64(a, !ahp_mode, fpst);
set_flush_inputs_to_zero(save, fpst);
@@ -570,7 +570,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *fpstp, uint32_t ahp_mode)
* it would affect flushing output denormals.
*/
float_status *fpst = fpstp;
- flag save = get_flush_to_zero(fpst);
+ bool save = get_flush_to_zero(fpst);
set_flush_to_zero(false, fpst);
float16 r = float64_to_float16(a, !ahp_mode, fpst);
set_flush_to_zero(save, fpst);
diff --git a/target/m68k/softfloat.c b/target/m68k/softfloat.c
index 24c313ed69..9f120cf15e 100644
--- a/target/m68k/softfloat.c
+++ b/target/m68k/softfloat.c
@@ -49,7 +49,7 @@ static floatx80 propagateFloatx80NaNOneArg(floatx80 a, float_status *status)
floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, zSign;
+ bool aSign, zSign;
int32_t aExp, bExp, expDiff;
uint64_t aSig0, aSig1, bSig;
uint64_t qTemp, term0, term1;
@@ -132,7 +132,7 @@ floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status)
floatx80 floatx80_getman(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -166,7 +166,7 @@ floatx80 floatx80_getman(floatx80 a, float_status *status)
floatx80 floatx80_getexp(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -202,7 +202,7 @@ floatx80 floatx80_getexp(floatx80 a, float_status *status)
floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status)
{
- flag aSign, bSign;
+ bool aSign, bSign;
int32_t aExp, bExp, shiftCount;
uint64_t aSig, bSig;
@@ -258,7 +258,7 @@ floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status)
floatx80 floatx80_move(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -306,7 +306,7 @@ static int32_t floatx80_make_compact(int32_t aExp, uint64_t aSig)
floatx80 floatx80_lognp1(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig, fSig;
@@ -505,7 +505,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *status)
floatx80 floatx80_logn(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig, fSig;
@@ -673,7 +673,7 @@ floatx80 floatx80_logn(floatx80 a, float_status *status)
floatx80 floatx80_log10(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -730,7 +730,7 @@ floatx80 floatx80_log10(floatx80 a, float_status *status)
floatx80 floatx80_log2(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -797,7 +797,7 @@ floatx80 floatx80_log2(floatx80 a, float_status *status)
floatx80 floatx80_etox(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -805,7 +805,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status)
int32_t compact, n, j, k, m, m1;
floatx80 fp0, fp1, fp2, fp3, l2, scale, adjscale;
- flag adjflag;
+ bool adjflag;
aSig = extractFloatx80Frac(a);
aExp = extractFloatx80Exp(a);
@@ -981,7 +981,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status)
floatx80 floatx80_twotox(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -1131,7 +1131,7 @@ floatx80 floatx80_twotox(floatx80 a, float_status *status)
floatx80 floatx80_tentox(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -1286,7 +1286,7 @@ floatx80 floatx80_tentox(floatx80 a, float_status *status)
floatx80 floatx80_tan(floatx80 a, float_status *status)
{
- flag aSign, xSign;
+ bool aSign, xSign;
int32_t aExp, xExp;
uint64_t aSig, xSig;
@@ -1295,7 +1295,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *status)
int32_t compact, l, n, j;
floatx80 fp0, fp1, fp2, fp3, fp4, fp5, invtwopi, twopi1, twopi2;
float32 twoto63;
- flag endflag;
+ bool endflag;
aSig = extractFloatx80Frac(a);
aExp = extractFloatx80Exp(a);
@@ -1344,10 +1344,10 @@ floatx80 floatx80_tan(floatx80 a, float_status *status)
xExp -= 0x3FFF;
if (xExp <= 28) {
l = 0;
- endflag = 1;
+ endflag = true;
} else {
l = xExp - 27;
- endflag = 0;
+ endflag = false;
}
invtwopi = packFloatx80(0, 0x3FFE - l,
UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */
@@ -1372,7 +1372,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *status)
fp1 = floatx80_sub(fp1, fp4, status); /* FP1 is a := r - p */
fp0 = floatx80_add(fp0, fp1, status); /* FP0 is R := A+a */
- if (endflag > 0) {
+ if (endflag) {
n = floatx80_to_int32(fp2, status);
goto tancont;
}
@@ -1496,7 +1496,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *status)
floatx80 floatx80_sin(floatx80 a, float_status *status)
{
- flag aSign, xSign;
+ bool aSign, xSign;
int32_t aExp, xExp;
uint64_t aSig, xSig;
@@ -1505,7 +1505,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *status)
int32_t compact, l, n, j;
floatx80 fp0, fp1, fp2, fp3, fp4, fp5, x, invtwopi, twopi1, twopi2;
float32 posneg1, twoto63;
- flag endflag;
+ bool endflag;
aSig = extractFloatx80Frac(a);
aExp = extractFloatx80Exp(a);
@@ -1554,10 +1554,10 @@ floatx80 floatx80_sin(floatx80 a, float_status *status)
xExp -= 0x3FFF;
if (xExp <= 28) {
l = 0;
- endflag = 1;
+ endflag = true;
} else {
l = xExp - 27;
- endflag = 0;
+ endflag = false;
}
invtwopi = packFloatx80(0, 0x3FFE - l,
UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */
@@ -1582,7 +1582,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *status)
fp1 = floatx80_sub(fp1, fp4, status); /* FP1 is a := r - p */
fp0 = floatx80_add(fp0, fp1, status); /* FP0 is R := A+a */
- if (endflag > 0) {
+ if (endflag) {
n = floatx80_to_int32(fp2, status);
goto sincont;
}
@@ -1735,7 +1735,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *status)
floatx80 floatx80_cos(floatx80 a, float_status *status)
{
- flag aSign, xSign;
+ bool aSign, xSign;
int32_t aExp, xExp;
uint64_t aSig, xSig;
@@ -1744,7 +1744,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *status)
int32_t compact, l, n, j;
floatx80 fp0, fp1, fp2, fp3, fp4, fp5, x, invtwopi, twopi1, twopi2;
float32 posneg1, twoto63;
- flag endflag;
+ bool endflag;
aSig = extractFloatx80Frac(a);
aExp = extractFloatx80Exp(a);
@@ -1793,10 +1793,10 @@ floatx80 floatx80_cos(floatx80 a, float_status *status)
xExp -= 0x3FFF;
if (xExp <= 28) {
l = 0;
- endflag = 1;
+ endflag = true;
} else {
l = xExp - 27;
- endflag = 0;
+ endflag = false;
}
invtwopi = packFloatx80(0, 0x3FFE - l,
UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */
@@ -1821,7 +1821,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *status)
fp1 = floatx80_sub(fp1, fp4, status); /* FP1 is a := r - p */
fp0 = floatx80_add(fp0, fp1, status); /* FP0 is R := A+a */
- if (endflag > 0) {
+ if (endflag) {
n = floatx80_to_int32(fp2, status);
goto sincont;
}
@@ -1972,7 +1972,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *status)
floatx80 floatx80_atan(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -2169,7 +2169,7 @@ floatx80 floatx80_atan(floatx80 a, float_status *status)
floatx80 floatx80_asin(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -2234,7 +2234,7 @@ floatx80 floatx80_asin(floatx80 a, float_status *status)
floatx80 floatx80_acos(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -2303,7 +2303,7 @@ floatx80 floatx80_acos(floatx80 a, float_status *status)
floatx80 floatx80_atanh(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -2368,7 +2368,7 @@ floatx80 floatx80_atanh(floatx80 a, float_status *status)
floatx80 floatx80_etoxm1(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
@@ -2620,7 +2620,7 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *status)
floatx80 floatx80_tanh(floatx80 a, float_status *status)
{
- flag aSign, vSign;
+ bool aSign, vSign;
int32_t aExp, vExp;
uint64_t aSig, vSig;
@@ -2735,7 +2735,7 @@ floatx80 floatx80_tanh(floatx80 a, float_status *status)
floatx80 floatx80_sinh(floatx80 a, float_status *status)
{
- flag aSign;
+ bool aSign;
int32_t aExp;
uint64_t aSig;
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 4065cfe4f7..3c7012c0b8 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -5508,7 +5508,7 @@ static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
return c & enable;
}
-static inline float16 float16_from_float32(int32_t a, flag ieee,
+static inline float16 float16_from_float32(int32_t a, bool ieee,
float_status *status)
{
float16 f_val;
@@ -5527,7 +5527,7 @@ static inline float32 float32_from_float64(int64_t a, float_status *status)
return a < 0 ? (f_val | (1 << 31)) : f_val;
}
-static inline float32 float32_from_float16(int16_t a, flag ieee,
+static inline float32 float32_from_float16(int16_t a, bool ieee,
float_status *status)
{
float32 f_val;
@@ -6564,7 +6564,7 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
* IEEE and "ARM" format. The latter gains extra exponent
* range by omitting the NaN/Inf encodings.
*/
- flag ieee = 1;
+ bool ieee = true;
MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16);
@@ -7178,7 +7178,7 @@ void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
* IEEE and "ARM" format. The latter gains extra exponent
* range by omitting the NaN/Inf encodings.
*/
- flag ieee = 1;
+ bool ieee = true;
MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
}
@@ -7214,7 +7214,7 @@ void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
* IEEE and "ARM" format. The latter gains extra exponent
* range by omitting the NaN/Inf encodings.
*/
- flag ieee = 1;
+ bool ieee = true;
MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 03/10] softfloat: Change tininess_before_rounding to bool
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
2020-05-15 19:01 ` [PATCH 01/10] softfloat: Use post test for floatN_mul Richard Henderson
2020-05-15 19:01 ` [PATCH 02/10] softfloat: Replace flag with bool Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-19 8:55 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 04/10] softfloat: Name rounding mode enum Richard Henderson
` (7 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Slightly tidies the usage within softfloat.c and the
representation in float_status.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat-helpers.h | 8 ++---
include/fpu/softfloat-types.h | 8 ++---
fpu/softfloat.c | 54 ++++++++++++---------------------
tests/fp/fp-test.c | 2 +-
4 files changed, 28 insertions(+), 44 deletions(-)
diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helpers.h
index 528d7ebd9f..40d32a6d5d 100644
--- a/include/fpu/softfloat-helpers.h
+++ b/include/fpu/softfloat-helpers.h
@@ -53,9 +53,9 @@ this code that are retained.
#include "fpu/softfloat-types.h"
-static inline void set_float_detect_tininess(int val, float_status *status)
+static inline void set_float_detect_tininess(bool val, float_status *status)
{
- status->float_detect_tininess = val;
+ status->tininess_before_rounding = val;
}
static inline void set_float_rounding_mode(int val, float_status *status)
@@ -94,9 +94,9 @@ static inline void set_snan_bit_is_one(bool val, float_status *status)
status->snan_bit_is_one = val;
}
-static inline int get_float_detect_tininess(float_status *status)
+static inline bool get_float_detect_tininess(float_status *status)
{
- return status->float_detect_tininess;
+ return status->tininess_before_rounding;
}
static inline int get_float_rounding_mode(float_status *status)
diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h
index 619b875df6..874ddd9f93 100644
--- a/include/fpu/softfloat-types.h
+++ b/include/fpu/softfloat-types.h
@@ -116,10 +116,8 @@ typedef struct {
* Software IEC/IEEE floating-point underflow tininess-detection mode.
*/
-enum {
- float_tininess_after_rounding = 0,
- float_tininess_before_rounding = 1
-};
+#define float_tininess_after_rounding false
+#define float_tininess_before_rounding true
/*
*Software IEC/IEEE floating-point rounding mode.
@@ -158,10 +156,10 @@ enum {
*/
typedef struct float_status {
- signed char float_detect_tininess;
signed char float_rounding_mode;
uint8_t float_exception_flags;
signed char floatx80_rounding_precision;
+ bool tininess_before_rounding;
/* should denormalised results go to zero and set the inexact flag? */
bool flush_to_zero;
/* should denormalised inputs go to zero and set the input_denormal flag? */
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index b741cf5bc3..65d457a548 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -744,8 +744,7 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
p.cls = float_class_zero;
goto do_zero;
} else {
- bool is_tiny = (s->float_detect_tininess
- == float_tininess_before_rounding)
+ bool is_tiny = s->tininess_before_rounding
|| (exp < 0)
|| !((frac + inc) & DECOMPOSED_OVERFLOW_BIT);
@@ -3579,11 +3578,9 @@ static float32 roundAndPackFloat32(bool zSign, int zExp, uint32_t zSig,
float_raise(float_flag_output_denormal, status);
return packFloat32(zSign, 0, 0);
}
- isTiny =
- (status->float_detect_tininess
- == float_tininess_before_rounding)
- || ( zExp < -1 )
- || ( zSig + roundIncrement < 0x80000000 );
+ isTiny = status->tininess_before_rounding
+ || (zExp < -1)
+ || (zSig + roundIncrement < 0x80000000);
shift32RightJamming( zSig, - zExp, &zSig );
zExp = 0;
roundBits = zSig & 0x7F;
@@ -3735,11 +3732,9 @@ static float64 roundAndPackFloat64(bool zSign, int zExp, uint64_t zSig,
float_raise(float_flag_output_denormal, status);
return packFloat64(zSign, 0, 0);
}
- isTiny =
- (status->float_detect_tininess
- == float_tininess_before_rounding)
- || ( zExp < -1 )
- || ( zSig + roundIncrement < UINT64_C(0x8000000000000000) );
+ isTiny = status->tininess_before_rounding
+ || (zExp < -1)
+ || (zSig + roundIncrement < UINT64_C(0x8000000000000000));
shift64RightJamming( zSig, - zExp, &zSig );
zExp = 0;
roundBits = zSig & 0x3FF;
@@ -3878,11 +3873,9 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign,
float_raise(float_flag_output_denormal, status);
return packFloatx80(zSign, 0, 0);
}
- isTiny =
- (status->float_detect_tininess
- == float_tininess_before_rounding)
- || ( zExp < 0 )
- || ( zSig0 <= zSig0 + roundIncrement );
+ isTiny = status->tininess_before_rounding
+ || (zExp < 0 )
+ || (zSig0 <= zSig0 + roundIncrement);
shift64RightJamming( zSig0, 1 - zExp, &zSig0 );
zExp = 0;
roundBits = zSig0 & roundMask;
@@ -3956,12 +3949,10 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign,
floatx80_infinity_low);
}
if ( zExp <= 0 ) {
- isTiny =
- (status->float_detect_tininess
- == float_tininess_before_rounding)
- || ( zExp < 0 )
- || ! increment
- || ( zSig0 < UINT64_C(0xFFFFFFFFFFFFFFFF) );
+ isTiny = status->tininess_before_rounding
+ || (zExp < 0)
+ || !increment
+ || (zSig0 < UINT64_C(0xFFFFFFFFFFFFFFFF));
shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );
zExp = 0;
if (isTiny && zSig1) {
@@ -4237,17 +4228,12 @@ static float128 roundAndPackFloat128(bool zSign, int32_t zExp,
float_raise(float_flag_output_denormal, status);
return packFloat128(zSign, 0, 0, 0);
}
- isTiny =
- (status->float_detect_tininess
- == float_tininess_before_rounding)
- || ( zExp < -1 )
- || ! increment
- || lt128(
- zSig0,
- zSig1,
- UINT64_C(0x0001FFFFFFFFFFFF),
- UINT64_C(0xFFFFFFFFFFFFFFFF)
- );
+ isTiny = status->tininess_before_rounding
+ || (zExp < -1)
+ || !increment
+ || lt128(zSig0, zSig1,
+ UINT64_C(0x0001FFFFFFFFFFFF),
+ UINT64_C(0xFFFFFFFFFFFFFFFF));
shift128ExtraRightJamming(
zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
zExp = 0;
diff --git a/tests/fp/fp-test.c b/tests/fp/fp-test.c
index 7d0faf2b47..43ef9628c4 100644
--- a/tests/fp/fp-test.c
+++ b/tests/fp/fp-test.c
@@ -989,7 +989,7 @@ static void QEMU_NORETURN run_test(void)
verCases_tininessCode = 0;
slowfloat_detectTininess = tmode;
- qsf.float_detect_tininess = sf_tininess_to_qemu(tmode);
+ qsf.tininess_before_rounding = sf_tininess_to_qemu(tmode);
if (attrs & FUNC_EFF_TININESSMODE ||
((attrs & FUNC_EFF_TININESSMODE_REDUCEDPREC) &&
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 04/10] softfloat: Name rounding mode enum
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
` (2 preceding siblings ...)
2020-05-15 19:01 ` [PATCH 03/10] softfloat: Change tininess_before_rounding to bool Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-16 5:30 ` Philippe Mathieu-Daudé
2020-05-19 9:06 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 05/10] softfloat: Name compare relation enum Richard Henderson
` (6 subsequent siblings)
10 siblings, 2 replies; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Give the previously unnamed enum a typedef name. Use the packed
attribute so that we do not affect the layout of the float_status
struct. Use it in the prototypes of relevant functions.
Adjust switch statements as necessary to avoid compiler warnings.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat-helpers.h | 5 +--
include/fpu/softfloat-types.h | 6 ++--
include/fpu/softfloat.h | 39 +++++++++++-----------
fpu/softfloat.c | 57 ++++++++++++++++++++-------------
target/arm/vfp_helper.c | 4 +--
target/m68k/fpu_helper.c | 6 ++--
6 files changed, 66 insertions(+), 51 deletions(-)
diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helpers.h
index 40d32a6d5d..735ed6b653 100644
--- a/include/fpu/softfloat-helpers.h
+++ b/include/fpu/softfloat-helpers.h
@@ -58,7 +58,8 @@ static inline void set_float_detect_tininess(bool val, float_status *status)
status->tininess_before_rounding = val;
}
-static inline void set_float_rounding_mode(int val, float_status *status)
+static inline void set_float_rounding_mode(FloatRoundMode val,
+ float_status *status)
{
status->float_rounding_mode = val;
}
@@ -99,7 +100,7 @@ static inline bool get_float_detect_tininess(float_status *status)
return status->tininess_before_rounding;
}
-static inline int get_float_rounding_mode(float_status *status)
+static inline FloatRoundMode get_float_rounding_mode(float_status *status)
{
return status->float_rounding_mode;
}
diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h
index 874ddd9f93..7680193ebc 100644
--- a/include/fpu/softfloat-types.h
+++ b/include/fpu/softfloat-types.h
@@ -123,7 +123,7 @@ typedef struct {
*Software IEC/IEEE floating-point rounding mode.
*/
-enum {
+typedef enum __attribute__((__packed__)) {
float_round_nearest_even = 0,
float_round_down = 1,
float_round_up = 2,
@@ -131,7 +131,7 @@ enum {
float_round_ties_away = 4,
/* Not an IEEE rounding mode: round to the closest odd mantissa value */
float_round_to_odd = 5,
-};
+} FloatRoundMode;
/*
* Software IEC/IEEE floating-point exception flags.
@@ -156,7 +156,7 @@ enum {
*/
typedef struct float_status {
- signed char float_rounding_mode;
+ FloatRoundMode float_rounding_mode;
uint8_t float_exception_flags;
signed char floatx80_rounding_precision;
bool tininess_before_rounding;
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 3f588da7c7..ca75f764aa 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -186,9 +186,9 @@ float32 float16_to_float32(float16, bool ieee, float_status *status);
float16 float64_to_float16(float64 a, bool ieee, float_status *status);
float64 float16_to_float64(float16 a, bool ieee, float_status *status);
-int16_t float16_to_int16_scalbn(float16, int, int, float_status *status);
-int32_t float16_to_int32_scalbn(float16, int, int, float_status *status);
-int64_t float16_to_int64_scalbn(float16, int, int, float_status *status);
+int16_t float16_to_int16_scalbn(float16, FloatRoundMode, int, float_status *);
+int32_t float16_to_int32_scalbn(float16, FloatRoundMode, int, float_status *);
+int64_t float16_to_int64_scalbn(float16, FloatRoundMode, int, float_status *);
int16_t float16_to_int16(float16, float_status *status);
int32_t float16_to_int32(float16, float_status *status);
@@ -198,9 +198,12 @@ int16_t float16_to_int16_round_to_zero(float16, float_status *status);
int32_t float16_to_int32_round_to_zero(float16, float_status *status);
int64_t float16_to_int64_round_to_zero(float16, float_status *status);
-uint16_t float16_to_uint16_scalbn(float16 a, int, int, float_status *status);
-uint32_t float16_to_uint32_scalbn(float16 a, int, int, float_status *status);
-uint64_t float16_to_uint64_scalbn(float16 a, int, int, float_status *status);
+uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode,
+ int, float_status *status);
+uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode,
+ int, float_status *status);
+uint64_t float16_to_uint64_scalbn(float16 a, FloatRoundMode,
+ int, float_status *status);
uint16_t float16_to_uint16(float16 a, float_status *status);
uint32_t float16_to_uint32(float16 a, float_status *status);
@@ -298,9 +301,9 @@ float16 float16_default_nan(float_status *status);
| Software IEC/IEEE single-precision conversion routines.
*----------------------------------------------------------------------------*/
-int16_t float32_to_int16_scalbn(float32, int, int, float_status *status);
-int32_t float32_to_int32_scalbn(float32, int, int, float_status *status);
-int64_t float32_to_int64_scalbn(float32, int, int, float_status *status);
+int16_t float32_to_int16_scalbn(float32, FloatRoundMode, int, float_status *);
+int32_t float32_to_int32_scalbn(float32, FloatRoundMode, int, float_status *);
+int64_t float32_to_int64_scalbn(float32, FloatRoundMode, int, float_status *);
int16_t float32_to_int16(float32, float_status *status);
int32_t float32_to_int32(float32, float_status *status);
@@ -310,9 +313,9 @@ int16_t float32_to_int16_round_to_zero(float32, float_status *status);
int32_t float32_to_int32_round_to_zero(float32, float_status *status);
int64_t float32_to_int64_round_to_zero(float32, float_status *status);
-uint16_t float32_to_uint16_scalbn(float32, int, int, float_status *status);
-uint32_t float32_to_uint32_scalbn(float32, int, int, float_status *status);
-uint64_t float32_to_uint64_scalbn(float32, int, int, float_status *status);
+uint16_t float32_to_uint16_scalbn(float32, FloatRoundMode, int, float_status *);
+uint32_t float32_to_uint32_scalbn(float32, FloatRoundMode, int, float_status *);
+uint64_t float32_to_uint64_scalbn(float32, FloatRoundMode, int, float_status *);
uint16_t float32_to_uint16(float32, float_status *status);
uint32_t float32_to_uint32(float32, float_status *status);
@@ -455,9 +458,9 @@ float32 float32_default_nan(float_status *status);
| Software IEC/IEEE double-precision conversion routines.
*----------------------------------------------------------------------------*/
-int16_t float64_to_int16_scalbn(float64, int, int, float_status *status);
-int32_t float64_to_int32_scalbn(float64, int, int, float_status *status);
-int64_t float64_to_int64_scalbn(float64, int, int, float_status *status);
+int16_t float64_to_int16_scalbn(float64, FloatRoundMode, int, float_status *);
+int32_t float64_to_int32_scalbn(float64, FloatRoundMode, int, float_status *);
+int64_t float64_to_int64_scalbn(float64, FloatRoundMode, int, float_status *);
int16_t float64_to_int16(float64, float_status *status);
int32_t float64_to_int32(float64, float_status *status);
@@ -467,9 +470,9 @@ int16_t float64_to_int16_round_to_zero(float64, float_status *status);
int32_t float64_to_int32_round_to_zero(float64, float_status *status);
int64_t float64_to_int64_round_to_zero(float64, float_status *status);
-uint16_t float64_to_uint16_scalbn(float64, int, int, float_status *status);
-uint32_t float64_to_uint32_scalbn(float64, int, int, float_status *status);
-uint64_t float64_to_uint64_scalbn(float64, int, int, float_status *status);
+uint16_t float64_to_uint16_scalbn(float64, FloatRoundMode, int, float_status *);
+uint32_t float64_to_uint32_scalbn(float64, FloatRoundMode, int, float_status *);
+uint64_t float64_to_uint64_scalbn(float64, FloatRoundMode, int, float_status *);
uint16_t float64_to_uint16(float64, float_status *status);
uint32_t float64_to_uint32(float64, float_status *status);
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 65d457a548..93d8a03de6 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -759,6 +759,8 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
case float_round_to_odd:
inc = frac & frac_lsb ? 0 : round_mask;
break;
+ default:
+ break;
}
flags |= float_flag_inexact;
frac += inc;
@@ -1928,7 +1930,7 @@ float32 float64_to_float32(float64 a, float_status *s)
* Arithmetic.
*/
-static FloatParts round_to_int(FloatParts a, int rmode,
+static FloatParts round_to_int(FloatParts a, FloatRoundMode rmode,
int scale, float_status *s)
{
switch (a.cls) {
@@ -2061,8 +2063,8 @@ float64 float64_round_to_int(float64 a, float_status *s)
* is returned.
*/
-static int64_t round_to_int_and_pack(FloatParts in, int rmode, int scale,
- int64_t min, int64_t max,
+static int64_t round_to_int_and_pack(FloatParts in, FloatRoundMode rmode,
+ int scale, int64_t min, int64_t max,
float_status *s)
{
uint64_t r;
@@ -2107,63 +2109,63 @@ static int64_t round_to_int_and_pack(FloatParts in, int rmode, int scale,
}
}
-int16_t float16_to_int16_scalbn(float16 a, int rmode, int scale,
+int16_t float16_to_int16_scalbn(float16 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float16_unpack_canonical(a, s),
rmode, scale, INT16_MIN, INT16_MAX, s);
}
-int32_t float16_to_int32_scalbn(float16 a, int rmode, int scale,
+int32_t float16_to_int32_scalbn(float16 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float16_unpack_canonical(a, s),
rmode, scale, INT32_MIN, INT32_MAX, s);
}
-int64_t float16_to_int64_scalbn(float16 a, int rmode, int scale,
+int64_t float16_to_int64_scalbn(float16 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float16_unpack_canonical(a, s),
rmode, scale, INT64_MIN, INT64_MAX, s);
}
-int16_t float32_to_int16_scalbn(float32 a, int rmode, int scale,
+int16_t float32_to_int16_scalbn(float32 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float32_unpack_canonical(a, s),
rmode, scale, INT16_MIN, INT16_MAX, s);
}
-int32_t float32_to_int32_scalbn(float32 a, int rmode, int scale,
+int32_t float32_to_int32_scalbn(float32 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float32_unpack_canonical(a, s),
rmode, scale, INT32_MIN, INT32_MAX, s);
}
-int64_t float32_to_int64_scalbn(float32 a, int rmode, int scale,
+int64_t float32_to_int64_scalbn(float32 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float32_unpack_canonical(a, s),
rmode, scale, INT64_MIN, INT64_MAX, s);
}
-int16_t float64_to_int16_scalbn(float64 a, int rmode, int scale,
+int16_t float64_to_int16_scalbn(float64 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float64_unpack_canonical(a, s),
rmode, scale, INT16_MIN, INT16_MAX, s);
}
-int32_t float64_to_int32_scalbn(float64 a, int rmode, int scale,
+int32_t float64_to_int32_scalbn(float64 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float64_unpack_canonical(a, s),
rmode, scale, INT32_MIN, INT32_MAX, s);
}
-int64_t float64_to_int64_scalbn(float64 a, int rmode, int scale,
+int64_t float64_to_int64_scalbn(float64 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_int_and_pack(float64_unpack_canonical(a, s),
@@ -2273,8 +2275,9 @@ int64_t float64_to_int64_round_to_zero(float64 a, float_status *s)
* flag.
*/
-static uint64_t round_to_uint_and_pack(FloatParts in, int rmode, int scale,
- uint64_t max, float_status *s)
+static uint64_t round_to_uint_and_pack(FloatParts in, FloatRoundMode rmode,
+ int scale, uint64_t max,
+ float_status *s)
{
int orig_flags = get_float_exception_flags(s);
FloatParts p = round_to_int(in, rmode, scale, s);
@@ -2319,63 +2322,63 @@ static uint64_t round_to_uint_and_pack(FloatParts in, int rmode, int scale,
}
}
-uint16_t float16_to_uint16_scalbn(float16 a, int rmode, int scale,
+uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float16_unpack_canonical(a, s),
rmode, scale, UINT16_MAX, s);
}
-uint32_t float16_to_uint32_scalbn(float16 a, int rmode, int scale,
+uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float16_unpack_canonical(a, s),
rmode, scale, UINT32_MAX, s);
}
-uint64_t float16_to_uint64_scalbn(float16 a, int rmode, int scale,
+uint64_t float16_to_uint64_scalbn(float16 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float16_unpack_canonical(a, s),
rmode, scale, UINT64_MAX, s);
}
-uint16_t float32_to_uint16_scalbn(float32 a, int rmode, int scale,
+uint16_t float32_to_uint16_scalbn(float32 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float32_unpack_canonical(a, s),
rmode, scale, UINT16_MAX, s);
}
-uint32_t float32_to_uint32_scalbn(float32 a, int rmode, int scale,
+uint32_t float32_to_uint32_scalbn(float32 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float32_unpack_canonical(a, s),
rmode, scale, UINT32_MAX, s);
}
-uint64_t float32_to_uint64_scalbn(float32 a, int rmode, int scale,
+uint64_t float32_to_uint64_scalbn(float32 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float32_unpack_canonical(a, s),
rmode, scale, UINT64_MAX, s);
}
-uint16_t float64_to_uint16_scalbn(float64 a, int rmode, int scale,
+uint16_t float64_to_uint16_scalbn(float64 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float64_unpack_canonical(a, s),
rmode, scale, UINT16_MAX, s);
}
-uint32_t float64_to_uint32_scalbn(float64 a, int rmode, int scale,
+uint32_t float64_to_uint32_scalbn(float64 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float64_unpack_canonical(a, s),
rmode, scale, UINT32_MAX, s);
}
-uint64_t float64_to_uint64_scalbn(float64 a, int rmode, int scale,
+uint64_t float64_to_uint64_scalbn(float64 a, FloatRoundMode rmode, int scale,
float_status *s)
{
return round_to_uint_and_pack(float64_unpack_canonical(a, s),
@@ -5715,6 +5718,11 @@ floatx80 floatx80_round_to_int(floatx80 a, float_status *status)
return
aSign ? packFloatx80( 1, 0, 0 )
: packFloatx80( 0, 0x3FFF, UINT64_C(0x8000000000000000));
+
+ case float_round_to_zero:
+ break;
+ default:
+ g_assert_not_reached();
}
return packFloatx80( aSign, 0, 0 );
}
@@ -7047,6 +7055,9 @@ float128 float128_round_to_int(float128 a, float_status *status)
case float_round_to_odd:
return packFloat128(aSign, 0x3FFF, 0, 0);
+
+ case float_round_to_zero:
+ break;
}
return packFloat128( aSign, 0, 0, 0 );
}
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 42625747d1..0920694764 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -697,9 +697,9 @@ static bool round_to_inf(float_status *fpst, bool sign_bit)
return sign_bit;
case float_round_to_zero: /* Round to Zero */
return false;
+ default:
+ g_assert_not_reached();
}
-
- g_assert_not_reached();
}
uint32_t HELPER(recpe_f16)(uint32_t input, void *fpstp)
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c
index 4137542ec0..36e6c704d1 100644
--- a/target/m68k/fpu_helper.c
+++ b/target/m68k/fpu_helper.c
@@ -149,7 +149,7 @@ void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val)
void HELPER(fitrunc)(CPUM68KState *env, FPReg *res, FPReg *val)
{
- int rounding_mode = get_float_rounding_mode(&env->fp_status);
+ FloatRoundMode rounding_mode = get_float_rounding_mode(&env->fp_status);
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
res->d = floatx80_round_to_int(val->d, &env->fp_status);
set_float_rounding_mode(rounding_mode, &env->fp_status);
@@ -300,7 +300,7 @@ void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
- int rounding_mode = get_float_rounding_mode(&env->fp_status);
+ FloatRoundMode rounding_mode = get_float_rounding_mode(&env->fp_status);
floatx80 a, b;
PREC_BEGIN(32);
@@ -333,7 +333,7 @@ void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
- int rounding_mode = get_float_rounding_mode(&env->fp_status);
+ FloatRoundMode rounding_mode = get_float_rounding_mode(&env->fp_status);
floatx80 a, b;
PREC_BEGIN(32);
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 05/10] softfloat: Name compare relation enum
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
` (3 preceding siblings ...)
2020-05-15 19:01 ` [PATCH 04/10] softfloat: Name rounding mode enum Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-16 5:32 ` Philippe Mathieu-Daudé
2020-05-19 9:08 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 06/10] softfloat: Inline float32 compare specializations Richard Henderson
` (5 subsequent siblings)
10 siblings, 2 replies; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Give the previously unnamed enum a typedef name. Use it in the
prototypes of compare functions. Use it to hold the results
of the compare functions.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat.h | 25 +++++++++++----------
target/i386/ops_sse.h | 8 +++----
fpu/softfloat.c | 40 ++++++++++++++++++---------------
target/arm/vfp_helper.c | 2 +-
target/hppa/op_helper.c | 7 +++---
target/i386/fpu_helper.c | 8 +++----
target/openrisc/fpu_helper.c | 4 ++--
target/ppc/int_helper.c | 13 ++++++-----
target/s390x/fpu_helper.c | 22 +++++++++---------
target/sparc/fop_helper.c | 4 ++--
target/unicore32/ucf64_helper.c | 6 ++---
target/xtensa/fpu_helper.c | 6 ++---
12 files changed, 75 insertions(+), 70 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index ca75f764aa..7f84235122 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -85,12 +85,13 @@ this code that are retained.
/*----------------------------------------------------------------------------
| Software IEC/IEEE floating-point ordering relations
*----------------------------------------------------------------------------*/
-enum {
+
+typedef enum {
float_relation_less = -1,
float_relation_equal = 0,
float_relation_greater = 1,
float_relation_unordered = 2
-};
+} FloatRelation;
#include "fpu/softfloat-types.h"
#include "fpu/softfloat-helpers.h"
@@ -231,8 +232,8 @@ float16 float16_maxnum(float16, float16, float_status *status);
float16 float16_minnummag(float16, float16, float_status *status);
float16 float16_maxnummag(float16, float16, float_status *status);
float16 float16_sqrt(float16, float_status *status);
-int float16_compare(float16, float16, float_status *status);
-int float16_compare_quiet(float16, float16, float_status *status);
+FloatRelation float16_compare(float16, float16, float_status *status);
+FloatRelation float16_compare_quiet(float16, float16, float_status *status);
int float16_is_quiet_nan(float16, float_status *status);
int float16_is_signaling_nan(float16, float_status *status);
@@ -350,8 +351,8 @@ int float32_eq_quiet(float32, float32, float_status *status);
int float32_le_quiet(float32, float32, float_status *status);
int float32_lt_quiet(float32, float32, float_status *status);
int float32_unordered_quiet(float32, float32, float_status *status);
-int float32_compare(float32, float32, float_status *status);
-int float32_compare_quiet(float32, float32, float_status *status);
+FloatRelation float32_compare(float32, float32, float_status *status);
+FloatRelation float32_compare_quiet(float32, float32, float_status *status);
float32 float32_min(float32, float32, float_status *status);
float32 float32_max(float32, float32, float_status *status);
float32 float32_minnum(float32, float32, float_status *status);
@@ -506,8 +507,8 @@ int float64_eq_quiet(float64, float64, float_status *status);
int float64_le_quiet(float64, float64, float_status *status);
int float64_lt_quiet(float64, float64, float_status *status);
int float64_unordered_quiet(float64, float64, float_status *status);
-int float64_compare(float64, float64, float_status *status);
-int float64_compare_quiet(float64, float64, float_status *status);
+FloatRelation float64_compare(float64, float64, float_status *status);
+FloatRelation float64_compare_quiet(float64, float64, float_status *status);
float64 float64_min(float64, float64, float_status *status);
float64 float64_max(float64, float64, float_status *status);
float64 float64_minnum(float64, float64, float_status *status);
@@ -630,8 +631,8 @@ int floatx80_eq_quiet(floatx80, floatx80, float_status *status);
int floatx80_le_quiet(floatx80, floatx80, float_status *status);
int floatx80_lt_quiet(floatx80, floatx80, float_status *status);
int floatx80_unordered_quiet(floatx80, floatx80, float_status *status);
-int floatx80_compare(floatx80, floatx80, float_status *status);
-int floatx80_compare_quiet(floatx80, floatx80, float_status *status);
+FloatRelation floatx80_compare(floatx80, floatx80, float_status *status);
+FloatRelation floatx80_compare_quiet(floatx80, floatx80, float_status *status);
int floatx80_is_quiet_nan(floatx80, float_status *status);
int floatx80_is_signaling_nan(floatx80, float_status *status);
floatx80 floatx80_silence_nan(floatx80, float_status *status);
@@ -842,8 +843,8 @@ int float128_eq_quiet(float128, float128, float_status *status);
int float128_le_quiet(float128, float128, float_status *status);
int float128_lt_quiet(float128, float128, float_status *status);
int float128_unordered_quiet(float128, float128, float_status *status);
-int float128_compare(float128, float128, float_status *status);
-int float128_compare_quiet(float128, float128, float_status *status);
+FloatRelation float128_compare(float128, float128, float_status *status);
+FloatRelation float128_compare_quiet(float128, float128, float_status *status);
int float128_is_quiet_nan(float128, float_status *status);
int float128_is_signaling_nan(float128, float_status *status);
float128 float128_silence_nan(float128, float_status *status);
diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index ec1ec745d0..4658768de2 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -1031,7 +1031,7 @@ static const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s)
{
- int ret;
+ FloatRelation ret;
float32 s0, s1;
s0 = d->ZMM_S(0);
@@ -1042,7 +1042,7 @@ void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s)
void helper_comiss(CPUX86State *env, Reg *d, Reg *s)
{
- int ret;
+ FloatRelation ret;
float32 s0, s1;
s0 = d->ZMM_S(0);
@@ -1053,7 +1053,7 @@ void helper_comiss(CPUX86State *env, Reg *d, Reg *s)
void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s)
{
- int ret;
+ FloatRelation ret;
float64 d0, d1;
d0 = d->ZMM_D(0);
@@ -1064,7 +1064,7 @@ void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s)
void helper_comisd(CPUX86State *env, Reg *d, Reg *s)
{
- int ret;
+ FloatRelation ret;
float64 d0, d1;
d0 = d->ZMM_D(0);
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 93d8a03de6..60b9ae5f05 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -2848,8 +2848,8 @@ MINMAX(64, maxnummag, false, true, true)
#undef MINMAX
/* Floating point compare */
-static int compare_floats(FloatParts a, FloatParts b, bool is_quiet,
- float_status *s)
+static FloatRelation compare_floats(FloatParts a, FloatParts b, bool is_quiet,
+ float_status *s)
{
if (is_nan(a.cls) || is_nan(b.cls)) {
if (!is_quiet ||
@@ -2920,17 +2920,17 @@ COMPARE(soft_f64_compare, QEMU_SOFTFLOAT_ATTR, 64)
#undef COMPARE
-int float16_compare(float16 a, float16 b, float_status *s)
+FloatRelation float16_compare(float16 a, float16 b, float_status *s)
{
return soft_f16_compare(a, b, false, s);
}
-int float16_compare_quiet(float16 a, float16 b, float_status *s)
+FloatRelation float16_compare_quiet(float16 a, float16 b, float_status *s)
{
return soft_f16_compare(a, b, true, s);
}
-static int QEMU_FLATTEN
+static FloatRelation QEMU_FLATTEN
f32_compare(float32 xa, float32 xb, bool is_quiet, float_status *s)
{
union_float32 ua, ub;
@@ -2959,17 +2959,17 @@ f32_compare(float32 xa, float32 xb, bool is_quiet, float_status *s)
return soft_f32_compare(ua.s, ub.s, is_quiet, s);
}
-int float32_compare(float32 a, float32 b, float_status *s)
+FloatRelation float32_compare(float32 a, float32 b, float_status *s)
{
return f32_compare(a, b, false, s);
}
-int float32_compare_quiet(float32 a, float32 b, float_status *s)
+FloatRelation float32_compare_quiet(float32 a, float32 b, float_status *s)
{
return f32_compare(a, b, true, s);
}
-static int QEMU_FLATTEN
+static FloatRelation QEMU_FLATTEN
f64_compare(float64 xa, float64 xb, bool is_quiet, float_status *s)
{
union_float64 ua, ub;
@@ -2998,12 +2998,12 @@ f64_compare(float64 xa, float64 xb, bool is_quiet, float_status *s)
return soft_f64_compare(ua.s, ub.s, is_quiet, s);
}
-int float64_compare(float64 a, float64 b, float_status *s)
+FloatRelation float64_compare(float64 a, float64 b, float_status *s)
{
return f64_compare(a, b, false, s);
}
-int float64_compare_quiet(float64 a, float64 b, float_status *s)
+FloatRelation float64_compare_quiet(float64 a, float64 b, float_status *s)
{
return f64_compare(a, b, true, s);
}
@@ -7892,8 +7892,9 @@ int float128_unordered_quiet(float128 a, float128 b, float_status *status)
return 0;
}
-static inline int floatx80_compare_internal(floatx80 a, floatx80 b,
- int is_quiet, float_status *status)
+static inline FloatRelation
+floatx80_compare_internal(floatx80 a, floatx80 b, bool is_quiet,
+ float_status *status)
{
bool aSign, bSign;
@@ -7939,18 +7940,20 @@ static inline int floatx80_compare_internal(floatx80 a, floatx80 b,
}
}
-int floatx80_compare(floatx80 a, floatx80 b, float_status *status)
+FloatRelation floatx80_compare(floatx80 a, floatx80 b, float_status *status)
{
return floatx80_compare_internal(a, b, 0, status);
}
-int floatx80_compare_quiet(floatx80 a, floatx80 b, float_status *status)
+FloatRelation floatx80_compare_quiet(floatx80 a, floatx80 b,
+ float_status *status)
{
return floatx80_compare_internal(a, b, 1, status);
}
-static inline int float128_compare_internal(float128 a, float128 b,
- int is_quiet, float_status *status)
+static inline FloatRelation
+float128_compare_internal(float128 a, float128 b, bool is_quiet,
+ float_status *status)
{
bool aSign, bSign;
@@ -7983,12 +7986,13 @@ static inline int float128_compare_internal(float128 a, float128 b,
}
}
-int float128_compare(float128 a, float128 b, float_status *status)
+FloatRelation float128_compare(float128 a, float128 b, float_status *status)
{
return float128_compare_internal(a, b, 0, status);
}
-int float128_compare_quiet(float128 a, float128 b, float_status *status)
+FloatRelation float128_compare_quiet(float128 a, float128 b,
+ float_status *status)
{
return float128_compare_internal(a, b, 1, status);
}
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 0920694764..60dcd4bf14 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -281,7 +281,7 @@ float64 VFP_HELPER(sqrt, d)(float64 a, CPUARMState *env)
return float64_sqrt(a, &env->vfp.fp_status);
}
-static void softfloat_to_vfp_compare(CPUARMState *env, int cmp)
+static void softfloat_to_vfp_compare(CPUARMState *env, FloatRelation cmp)
{
uint32_t flags;
switch (cmp) {
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index 7823706e9c..5685e303ab 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -523,7 +523,8 @@ uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
return ret;
}
-static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int r)
+static void update_fr0_cmp(CPUHPPAState *env, uint32_t y,
+ uint32_t c, FloatRelation r)
{
uint32_t shadow = env->fr0_shadow;
@@ -565,7 +566,7 @@ static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int r)
void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
uint32_t y, uint32_t c)
{
- int r;
+ FloatRelation r;
if (c & 1) {
r = float32_compare(a, b, &env->fp_status);
} else {
@@ -578,7 +579,7 @@ void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
uint32_t y, uint32_t c)
{
- int r;
+ FloatRelation r;
if (c & 1) {
r = float64_compare(a, b, &env->fp_status);
} else {
diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c
index 792a128a6d..b34fa784eb 100644
--- a/target/i386/fpu_helper.c
+++ b/target/i386/fpu_helper.c
@@ -420,7 +420,7 @@ static const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
void helper_fcom_ST0_FT0(CPUX86State *env)
{
- int ret;
+ FloatRelation ret;
ret = floatx80_compare(ST0, FT0, &env->fp_status);
env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
@@ -428,7 +428,7 @@ void helper_fcom_ST0_FT0(CPUX86State *env)
void helper_fucom_ST0_FT0(CPUX86State *env)
{
- int ret;
+ FloatRelation ret;
ret = floatx80_compare_quiet(ST0, FT0, &env->fp_status);
env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
@@ -439,7 +439,7 @@ static const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
void helper_fcomi_ST0_FT0(CPUX86State *env)
{
int eflags;
- int ret;
+ FloatRelation ret;
ret = floatx80_compare(ST0, FT0, &env->fp_status);
eflags = cpu_cc_compute_all(env, CC_OP);
@@ -450,7 +450,7 @@ void helper_fcomi_ST0_FT0(CPUX86State *env)
void helper_fucomi_ST0_FT0(CPUX86State *env)
{
int eflags;
- int ret;
+ FloatRelation ret;
ret = floatx80_compare_quiet(ST0, FT0, &env->fp_status);
eflags = cpu_cc_compute_all(env, CC_OP);
diff --git a/target/openrisc/fpu_helper.c b/target/openrisc/fpu_helper.c
index 6f75ea0505..f9e34fa2cc 100644
--- a/target/openrisc/fpu_helper.c
+++ b/target/openrisc/fpu_helper.c
@@ -155,13 +155,13 @@ FLOAT_CMP(un, unordered_quiet)
target_ulong helper_float_ ## name ## _d(CPUOpenRISCState *env, \
uint64_t fdt0, uint64_t fdt1) \
{ \
- int r = float64_compare_quiet(fdt0, fdt1, &env->fp_status); \
+ FloatRelation r = float64_compare_quiet(fdt0, fdt1, &env->fp_status); \
return expr; \
} \
target_ulong helper_float_ ## name ## _s(CPUOpenRISCState *env, \
uint32_t fdt0, uint32_t fdt1) \
{ \
- int r = float32_compare_quiet(fdt0, fdt1, &env->fp_status); \
+ FloatRelation r = float32_compare_quiet(fdt0, fdt1, &env->fp_status); \
return expr; \
}
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 6d238b989d..be53cd6f68 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -770,8 +770,9 @@ VCMPNE(w, u32, uint32_t, 0)
\
for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \
uint32_t result; \
- int rel = float32_compare_quiet(a->f32[i], b->f32[i], \
- &env->vec_status); \
+ FloatRelation rel = \
+ float32_compare_quiet(a->f32[i], b->f32[i], \
+ &env->vec_status); \
if (rel == float_relation_unordered) { \
result = 0; \
} else if (rel compare order) { \
@@ -803,15 +804,15 @@ static inline void vcmpbfp_internal(CPUPPCState *env, ppc_avr_t *r,
int all_in = 0;
for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
- int le_rel = float32_compare_quiet(a->f32[i], b->f32[i],
- &env->vec_status);
+ FloatRelation le_rel = float32_compare_quiet(a->f32[i], b->f32[i],
+ &env->vec_status);
if (le_rel == float_relation_unordered) {
r->u32[i] = 0xc0000000;
all_in = 1;
} else {
float32 bneg = float32_chs(b->f32[i]);
- int ge_rel = float32_compare_quiet(a->f32[i], bneg,
- &env->vec_status);
+ FloatRelation ge_rel = float32_compare_quiet(a->f32[i], bneg,
+ &env->vec_status);
int le = le_rel != float_relation_greater;
int ge = ge_rel != float_relation_less;
diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c
index 8bb9f54fd0..f155bc048c 100644
--- a/target/s390x/fpu_helper.c
+++ b/target/s390x/fpu_helper.c
@@ -112,7 +112,7 @@ static void handle_exceptions(CPUS390XState *env, bool XxC, uintptr_t retaddr)
}
}
-int float_comp_to_cc(CPUS390XState *env, int float_compare)
+int float_comp_to_cc(CPUS390XState *env, FloatRelation float_compare)
{
switch (float_compare) {
case float_relation_equal:
@@ -368,7 +368,7 @@ uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, uint64_t al,
/* 32-bit FP compare */
uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
{
- int cmp = float32_compare_quiet(f1, f2, &env->fpu_status);
+ FloatRelation cmp = float32_compare_quiet(f1, f2, &env->fpu_status);
handle_exceptions(env, false, GETPC());
return float_comp_to_cc(env, cmp);
}
@@ -376,7 +376,7 @@ uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
/* 64-bit FP compare */
uint32_t HELPER(cdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
{
- int cmp = float64_compare_quiet(f1, f2, &env->fpu_status);
+ FloatRelation cmp = float64_compare_quiet(f1, f2, &env->fpu_status);
handle_exceptions(env, false, GETPC());
return float_comp_to_cc(env, cmp);
}
@@ -385,9 +385,9 @@ uint32_t HELPER(cdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
uint32_t HELPER(cxb)(CPUS390XState *env, uint64_t ah, uint64_t al,
uint64_t bh, uint64_t bl)
{
- int cmp = float128_compare_quiet(make_float128(ah, al),
- make_float128(bh, bl),
- &env->fpu_status);
+ FloatRelation cmp = float128_compare_quiet(make_float128(ah, al),
+ make_float128(bh, bl),
+ &env->fpu_status);
handle_exceptions(env, false, GETPC());
return float_comp_to_cc(env, cmp);
}
@@ -675,7 +675,7 @@ uint64_t HELPER(fixb)(CPUS390XState *env, uint64_t ah, uint64_t al,
/* 32-bit FP compare and signal */
uint32_t HELPER(keb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
{
- int cmp = float32_compare(f1, f2, &env->fpu_status);
+ FloatRelation cmp = float32_compare(f1, f2, &env->fpu_status);
handle_exceptions(env, false, GETPC());
return float_comp_to_cc(env, cmp);
}
@@ -683,7 +683,7 @@ uint32_t HELPER(keb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
/* 64-bit FP compare and signal */
uint32_t HELPER(kdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
{
- int cmp = float64_compare(f1, f2, &env->fpu_status);
+ FloatRelation cmp = float64_compare(f1, f2, &env->fpu_status);
handle_exceptions(env, false, GETPC());
return float_comp_to_cc(env, cmp);
}
@@ -692,9 +692,9 @@ uint32_t HELPER(kdb)(CPUS390XState *env, uint64_t f1, uint64_t f2)
uint32_t HELPER(kxb)(CPUS390XState *env, uint64_t ah, uint64_t al,
uint64_t bh, uint64_t bl)
{
- int cmp = float128_compare(make_float128(ah, al),
- make_float128(bh, bl),
- &env->fpu_status);
+ FloatRelation cmp = float128_compare(make_float128(ah, al),
+ make_float128(bh, bl),
+ &env->fpu_status);
handle_exceptions(env, false, GETPC());
return float_comp_to_cc(env, cmp);
}
diff --git a/target/sparc/fop_helper.c b/target/sparc/fop_helper.c
index 9eb9b75718..e6dd3fc313 100644
--- a/target/sparc/fop_helper.c
+++ b/target/sparc/fop_helper.c
@@ -264,7 +264,7 @@ void helper_fsqrtq(CPUSPARCState *env)
#define GEN_FCMP(name, size, reg1, reg2, FS, E) \
target_ulong glue(helper_, name) (CPUSPARCState *env) \
{ \
- int ret; \
+ FloatRelation ret; \
target_ulong fsr; \
if (E) { \
ret = glue(size, _compare)(reg1, reg2, &env->fp_status); \
@@ -295,7 +295,7 @@ void helper_fsqrtq(CPUSPARCState *env)
#define GEN_FCMP_T(name, size, FS, E) \
target_ulong glue(helper_, name)(CPUSPARCState *env, size src1, size src2)\
{ \
- int ret; \
+ FloatRelation ret; \
target_ulong fsr; \
if (E) { \
ret = glue(size, _compare)(src1, src2, &env->fp_status); \
diff --git a/target/unicore32/ucf64_helper.c b/target/unicore32/ucf64_helper.c
index e078e84437..12a91900f6 100644
--- a/target/unicore32/ucf64_helper.c
+++ b/target/unicore32/ucf64_helper.c
@@ -174,8 +174,7 @@ float64 HELPER(ucf64_absd)(float64 a)
void HELPER(ucf64_cmps)(float32 a, float32 b, uint32_t c,
CPUUniCore32State *env)
{
- int flag;
- flag = float32_compare_quiet(a, b, &env->ucf64.fp_status);
+ FloatRelation flag = float32_compare_quiet(a, b, &env->ucf64.fp_status);
env->CF = 0;
switch (c & 0x7) {
case 0: /* F */
@@ -223,8 +222,7 @@ void HELPER(ucf64_cmps)(float32 a, float32 b, uint32_t c,
void HELPER(ucf64_cmpd)(float64 a, float64 b, uint32_t c,
CPUUniCore32State *env)
{
- int flag;
- flag = float64_compare_quiet(a, b, &env->ucf64.fp_status);
+ FloatRelation flag = float64_compare_quiet(a, b, &env->ucf64.fp_status);
env->CF = 0;
switch (c & 0x7) {
case 0: /* F */
diff --git a/target/xtensa/fpu_helper.c b/target/xtensa/fpu_helper.c
index f8bbb6cdd8..87487293f9 100644
--- a/target/xtensa/fpu_helper.c
+++ b/target/xtensa/fpu_helper.c
@@ -139,7 +139,7 @@ void HELPER(oeq_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
void HELPER(ueq_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
{
- int v = float32_compare_quiet(a, b, &env->fp_status);
+ FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
set_br(env, v == float_relation_equal || v == float_relation_unordered, br);
}
@@ -150,7 +150,7 @@ void HELPER(olt_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
void HELPER(ult_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
{
- int v = float32_compare_quiet(a, b, &env->fp_status);
+ FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
set_br(env, v == float_relation_less || v == float_relation_unordered, br);
}
@@ -161,6 +161,6 @@ void HELPER(ole_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
void HELPER(ule_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
{
- int v = float32_compare_quiet(a, b, &env->fp_status);
+ FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
set_br(env, v != float_relation_greater, br);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 06/10] softfloat: Inline float32 compare specializations
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
` (4 preceding siblings ...)
2020-05-15 19:01 ` [PATCH 05/10] softfloat: Name compare relation enum Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-19 9:38 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 07/10] softfloat: Inline float64 " Richard Henderson
` (4 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Replace the float32 compare specializations with inline functions
that call the standard float32_compare{,_quiet} functions.
Use bool as the return type.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat.h | 49 +++++++--
fpu/softfloat.c | 216 ----------------------------------------
2 files changed, 41 insertions(+), 224 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 7f84235122..4d1af6ab45 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -343,14 +343,6 @@ float32 float32_muladd(float32, float32, float32, int, float_status *status);
float32 float32_sqrt(float32, float_status *status);
float32 float32_exp2(float32, float_status *status);
float32 float32_log2(float32, float_status *status);
-int float32_eq(float32, float32, float_status *status);
-int float32_le(float32, float32, float_status *status);
-int float32_lt(float32, float32, float_status *status);
-int float32_unordered(float32, float32, float_status *status);
-int float32_eq_quiet(float32, float32, float_status *status);
-int float32_le_quiet(float32, float32, float_status *status);
-int float32_lt_quiet(float32, float32, float_status *status);
-int float32_unordered_quiet(float32, float32, float_status *status);
FloatRelation float32_compare(float32, float32, float_status *status);
FloatRelation float32_compare_quiet(float32, float32, float_status *status);
float32 float32_min(float32, float32, float_status *status);
@@ -425,6 +417,47 @@ static inline float32 float32_set_sign(float32 a, int sign)
return make_float32((float32_val(a) & 0x7fffffff) | (sign << 31));
}
+static inline bool float32_eq(float32 a, float32 b, float_status *s)
+{
+ return float32_compare(a, b, s) == float_relation_equal;
+}
+
+static inline bool float32_le(float32 a, float32 b, float_status *s)
+{
+ return float32_compare(a, b, s) <= float_relation_equal;
+}
+
+static inline bool float32_lt(float32 a, float32 b, float_status *s)
+{
+ return float32_compare(a, b, s) < float_relation_equal;
+}
+
+static inline bool float32_unordered(float32 a, float32 b, float_status *s)
+{
+ return float32_compare(a, b, s) == float_relation_unordered;
+}
+
+static inline bool float32_eq_quiet(float32 a, float32 b, float_status *s)
+{
+ return float32_compare_quiet(a, b, s) == float_relation_equal;
+}
+
+static inline bool float32_le_quiet(float32 a, float32 b, float_status *s)
+{
+ return float32_compare_quiet(a, b, s) <= float_relation_equal;
+}
+
+static inline bool float32_lt_quiet(float32 a, float32 b, float_status *s)
+{
+ return float32_compare_quiet(a, b, s) < float_relation_equal;
+}
+
+static inline bool float32_unordered_quiet(float32 a, float32 b,
+ float_status *s)
+{
+ return float32_compare_quiet(a, b, s) == float_relation_unordered;
+}
+
#define float32_zero make_float32(0)
#define float32_half make_float32(0x3f000000)
#define float32_one make_float32(0x3f800000)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 60b9ae5f05..f6bfc40c97 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -4733,222 +4733,6 @@ float32 float32_log2(float32 a, float_status *status)
return normalizeRoundAndPackFloat32(zSign, 0x85, zSig, status);
}
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is equal to
-| the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. Otherwise, the comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float32_eq(float32 a, float32 b, float_status *status)
-{
- uint32_t av, bv;
- a = float32_squash_input_denormal(a, status);
- b = float32_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- av = float32_val(a);
- bv = float32_val(b);
- return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is less than
-| or equal to the corresponding value `b', and 0 otherwise. The invalid
-| exception is raised if either operand is a NaN. The comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float32_le(float32 a, float32 b, float_status *status)
-{
- bool aSign, bSign;
- uint32_t av, bv;
- a = float32_squash_input_denormal(a, status);
- b = float32_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- av = float32_val(a);
- bv = float32_val(b);
- if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
- return ( av == bv ) || ( aSign ^ ( av < bv ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. The comparison is performed according
-| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float32_lt(float32 a, float32 b, float_status *status)
-{
- bool aSign, bSign;
- uint32_t av, bv;
- a = float32_squash_input_denormal(a, status);
- b = float32_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- av = float32_val(a);
- bv = float32_val(b);
- if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
- return ( av != bv ) && ( aSign ^ ( av < bv ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point values `a' and `b' cannot
-| be compared, and 0 otherwise. The invalid exception is raised if either
-| operand is a NaN. The comparison is performed according to the IEC/IEEE
-| Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float32_unordered(float32 a, float32 b, float_status *status)
-{
- a = float32_squash_input_denormal(a, status);
- b = float32_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 1;
- }
- return 0;
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is equal to
-| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
-| exception. The comparison is performed according to the IEC/IEEE Standard
-| for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float32_eq_quiet(float32 a, float32 b, float_status *status)
-{
- a = float32_squash_input_denormal(a, status);
- b = float32_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if (float32_is_signaling_nan(a, status)
- || float32_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- return ( float32_val(a) == float32_val(b) ) ||
- ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 );
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is less than or
-| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
-| cause an exception. Otherwise, the comparison is performed according to the
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float32_le_quiet(float32 a, float32 b, float_status *status)
-{
- bool aSign, bSign;
- uint32_t av, bv;
- a = float32_squash_input_denormal(a, status);
- b = float32_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if (float32_is_signaling_nan(a, status)
- || float32_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- av = float32_val(a);
- bv = float32_val(b);
- if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
- return ( av == bv ) || ( aSign ^ ( av < bv ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
-| exception. Otherwise, the comparison is performed according to the IEC/IEEE
-| Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float32_lt_quiet(float32 a, float32 b, float_status *status)
-{
- bool aSign, bSign;
- uint32_t av, bv;
- a = float32_squash_input_denormal(a, status);
- b = float32_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if (float32_is_signaling_nan(a, status)
- || float32_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- av = float32_val(a);
- bv = float32_val(b);
- if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
- return ( av != bv ) && ( aSign ^ ( av < bv ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point values `a' and `b' cannot
-| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
-| comparison is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float32_unordered_quiet(float32 a, float32 b, float_status *status)
-{
- a = float32_squash_input_denormal(a, status);
- b = float32_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if (float32_is_signaling_nan(a, status)
- || float32_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 1;
- }
- return 0;
-}
-
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the extended double-precision floating-point format. The conversion
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 07/10] softfloat: Inline float64 compare specializations
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
` (5 preceding siblings ...)
2020-05-15 19:01 ` [PATCH 06/10] softfloat: Inline float32 compare specializations Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-19 9:41 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 08/10] softfloat: Inline float128 " Richard Henderson
` (3 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Replace the float64 compare specializations with inline functions
that call the standard float64_compare{,_quiet} functions.
Use bool as the return type.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat.h | 49 ++++++--
fpu/softfloat.c | 220 ----------------------------------
target/s390x/vec_fpu_helper.c | 2 +-
3 files changed, 42 insertions(+), 229 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 4d1af6ab45..281f0fd971 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -532,14 +532,6 @@ float64 float64_rem(float64, float64, float_status *status);
float64 float64_muladd(float64, float64, float64, int, float_status *status);
float64 float64_sqrt(float64, float_status *status);
float64 float64_log2(float64, float_status *status);
-int float64_eq(float64, float64, float_status *status);
-int float64_le(float64, float64, float_status *status);
-int float64_lt(float64, float64, float_status *status);
-int float64_unordered(float64, float64, float_status *status);
-int float64_eq_quiet(float64, float64, float_status *status);
-int float64_le_quiet(float64, float64, float_status *status);
-int float64_lt_quiet(float64, float64, float_status *status);
-int float64_unordered_quiet(float64, float64, float_status *status);
FloatRelation float64_compare(float64, float64, float_status *status);
FloatRelation float64_compare_quiet(float64, float64, float_status *status);
float64 float64_min(float64, float64, float_status *status);
@@ -615,6 +607,47 @@ static inline float64 float64_set_sign(float64 a, int sign)
| ((int64_t)sign << 63));
}
+static inline bool float64_eq(float64 a, float64 b, float_status *s)
+{
+ return float64_compare(a, b, s) == float_relation_equal;
+}
+
+static inline bool float64_le(float64 a, float64 b, float_status *s)
+{
+ return float64_compare(a, b, s) <= float_relation_equal;
+}
+
+static inline bool float64_lt(float64 a, float64 b, float_status *s)
+{
+ return float64_compare(a, b, s) < float_relation_equal;
+}
+
+static inline bool float64_unordered(float64 a, float64 b, float_status *s)
+{
+ return float64_compare(a, b, s) == float_relation_unordered;
+}
+
+static inline bool float64_eq_quiet(float64 a, float64 b, float_status *s)
+{
+ return float64_compare_quiet(a, b, s) == float_relation_equal;
+}
+
+static inline bool float64_le_quiet(float64 a, float64 b, float_status *s)
+{
+ return float64_compare_quiet(a, b, s) <= float_relation_equal;
+}
+
+static inline bool float64_lt_quiet(float64 a, float64 b, float_status *s)
+{
+ return float64_compare_quiet(a, b, s) < float_relation_equal;
+}
+
+static inline bool float64_unordered_quiet(float64 a, float64 b,
+ float_status *s)
+{
+ return float64_compare_quiet(a, b, s) == float_relation_unordered;
+}
+
#define float64_zero make_float64(0)
#define float64_half make_float64(0x3fe0000000000000LL)
#define float64_one make_float64(0x3ff0000000000000LL)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index f6bfc40c97..5d7fc2c17a 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -4941,226 +4941,6 @@ float64 float64_log2(float64 a, float_status *status)
return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status);
}
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is equal to the
-| corresponding value `b', and 0 otherwise. The invalid exception is raised
-| if either operand is a NaN. Otherwise, the comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float64_eq(float64 a, float64 b, float_status *status)
-{
- uint64_t av, bv;
- a = float64_squash_input_denormal(a, status);
- b = float64_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- av = float64_val(a);
- bv = float64_val(b);
- return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is less than or
-| equal to the corresponding value `b', and 0 otherwise. The invalid
-| exception is raised if either operand is a NaN. The comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float64_le(float64 a, float64 b, float_status *status)
-{
- bool aSign, bSign;
- uint64_t av, bv;
- a = float64_squash_input_denormal(a, status);
- b = float64_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- av = float64_val(a);
- bv = float64_val(b);
- if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
- return ( av == bv ) || ( aSign ^ ( av < bv ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. The comparison is performed according
-| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float64_lt(float64 a, float64 b, float_status *status)
-{
- bool aSign, bSign;
- uint64_t av, bv;
-
- a = float64_squash_input_denormal(a, status);
- b = float64_squash_input_denormal(b, status);
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- av = float64_val(a);
- bv = float64_val(b);
- if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
- return ( av != bv ) && ( aSign ^ ( av < bv ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point values `a' and `b' cannot
-| be compared, and 0 otherwise. The invalid exception is raised if either
-| operand is a NaN. The comparison is performed according to the IEC/IEEE
-| Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float64_unordered(float64 a, float64 b, float_status *status)
-{
- a = float64_squash_input_denormal(a, status);
- b = float64_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 1;
- }
- return 0;
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is equal to the
-| corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
-| exception.The comparison is performed according to the IEC/IEEE Standard
-| for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float64_eq_quiet(float64 a, float64 b, float_status *status)
-{
- uint64_t av, bv;
- a = float64_squash_input_denormal(a, status);
- b = float64_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- if (float64_is_signaling_nan(a, status)
- || float64_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- av = float64_val(a);
- bv = float64_val(b);
- return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is less than or
-| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
-| cause an exception. Otherwise, the comparison is performed according to the
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float64_le_quiet(float64 a, float64 b, float_status *status)
-{
- bool aSign, bSign;
- uint64_t av, bv;
- a = float64_squash_input_denormal(a, status);
- b = float64_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- if (float64_is_signaling_nan(a, status)
- || float64_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- av = float64_val(a);
- bv = float64_val(b);
- if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
- return ( av == bv ) || ( aSign ^ ( av < bv ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
-| exception. Otherwise, the comparison is performed according to the IEC/IEEE
-| Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float64_lt_quiet(float64 a, float64 b, float_status *status)
-{
- bool aSign, bSign;
- uint64_t av, bv;
- a = float64_squash_input_denormal(a, status);
- b = float64_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- if (float64_is_signaling_nan(a, status)
- || float64_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- av = float64_val(a);
- bv = float64_val(b);
- if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
- return ( av != bv ) && ( aSign ^ ( av < bv ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point values `a' and `b' cannot
-| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
-| comparison is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float64_unordered_quiet(float64 a, float64 b, float_status *status)
-{
- a = float64_squash_input_denormal(a, status);
- b = float64_squash_input_denormal(b, status);
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- if (float64_is_signaling_nan(a, status)
- || float64_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 1;
- }
- return 0;
-}
-
/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format. The
diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
index a48bd704bc..c1564e819b 100644
--- a/target/s390x/vec_fpu_helper.c
+++ b/target/s390x/vec_fpu_helper.c
@@ -174,7 +174,7 @@ void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
env->cc_op = wfc64(v1, v2, env, true, GETPC());
}
-typedef int (*vfc64_fn)(float64 a, float64 b, float_status *status);
+typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
{
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 08/10] softfloat: Inline float128 compare specializations
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
` (6 preceding siblings ...)
2020-05-15 19:01 ` [PATCH 07/10] softfloat: Inline float64 " Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-19 9:41 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 09/10] softfloat: Inline floatx80 " Richard Henderson
` (2 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Replace the float128 compare specializations with inline functions
that call the standard float128_compare{,_quiet} functions.
Use bool as the return type.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat.h | 49 +++++++--
fpu/softfloat.c | 238 ----------------------------------------
2 files changed, 41 insertions(+), 246 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 281f0fd971..cfb3cda46b 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -901,14 +901,6 @@ float128 float128_mul(float128, float128, float_status *status);
float128 float128_div(float128, float128, float_status *status);
float128 float128_rem(float128, float128, float_status *status);
float128 float128_sqrt(float128, float_status *status);
-int float128_eq(float128, float128, float_status *status);
-int float128_le(float128, float128, float_status *status);
-int float128_lt(float128, float128, float_status *status);
-int float128_unordered(float128, float128, float_status *status);
-int float128_eq_quiet(float128, float128, float_status *status);
-int float128_le_quiet(float128, float128, float_status *status);
-int float128_lt_quiet(float128, float128, float_status *status);
-int float128_unordered_quiet(float128, float128, float_status *status);
FloatRelation float128_compare(float128, float128, float_status *status);
FloatRelation float128_compare_quiet(float128, float128, float_status *status);
int float128_is_quiet_nan(float128, float_status *status);
@@ -964,6 +956,47 @@ static inline int float128_is_any_nan(float128 a)
((a.low != 0) || ((a.high & 0xffffffffffffLL) != 0));
}
+static inline bool float128_eq(float128 a, float128 b, float_status *s)
+{
+ return float128_compare(a, b, s) == float_relation_equal;
+}
+
+static inline bool float128_le(float128 a, float128 b, float_status *s)
+{
+ return float128_compare(a, b, s) <= float_relation_equal;
+}
+
+static inline bool float128_lt(float128 a, float128 b, float_status *s)
+{
+ return float128_compare(a, b, s) < float_relation_equal;
+}
+
+static inline bool float128_unordered(float128 a, float128 b, float_status *s)
+{
+ return float128_compare(a, b, s) == float_relation_unordered;
+}
+
+static inline bool float128_eq_quiet(float128 a, float128 b, float_status *s)
+{
+ return float128_compare_quiet(a, b, s) == float_relation_equal;
+}
+
+static inline bool float128_le_quiet(float128 a, float128 b, float_status *s)
+{
+ return float128_compare_quiet(a, b, s) <= float_relation_equal;
+}
+
+static inline bool float128_lt_quiet(float128 a, float128 b, float_status *s)
+{
+ return float128_compare_quiet(a, b, s) < float_relation_equal;
+}
+
+static inline bool float128_unordered_quiet(float128 a, float128 b,
+ float_status *s)
+{
+ return float128_compare_quiet(a, b, s) == float_relation_unordered;
+}
+
#define float128_zero make_float128(0, 0)
/*----------------------------------------------------------------------------
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 5d7fc2c17a..4567dda112 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -7218,244 +7218,6 @@ float128 float128_sqrt(float128 a, float_status *status)
}
-/*----------------------------------------------------------------------------
-| Returns 1 if the quadruple-precision floating-point value `a' is equal to
-| the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. Otherwise, the comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float128_eq(float128 a, float128 b, float_status *status)
-{
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- return
- ( a.low == b.low )
- && ( ( a.high == b.high )
- || ( ( a.low == 0 )
- && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
- );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the quadruple-precision floating-point value `a' is less than
-| or equal to the corresponding value `b', and 0 otherwise. The invalid
-| exception is raised if either operand is a NaN. The comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float128_le(float128 a, float128 b, float_status *status)
-{
- bool aSign, bSign;
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- == 0 );
- }
- return
- aSign ? le128( b.high, b.low, a.high, a.low )
- : le128( a.high, a.low, b.high, b.low );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the quadruple-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. The comparison is performed according
-| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float128_lt(float128 a, float128 b, float_status *status)
-{
- bool aSign, bSign;
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- != 0 );
- }
- return
- aSign ? lt128( b.high, b.low, a.high, a.low )
- : lt128( a.high, a.low, b.high, b.low );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
-| be compared, and 0 otherwise. The invalid exception is raised if either
-| operand is a NaN. The comparison is performed according to the IEC/IEEE
-| Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float128_unordered(float128 a, float128 b, float_status *status)
-{
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- float_raise(float_flag_invalid, status);
- return 1;
- }
- return 0;
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the quadruple-precision floating-point value `a' is equal to
-| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
-| exception. The comparison is performed according to the IEC/IEEE Standard
-| for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float128_eq_quiet(float128 a, float128 b, float_status *status)
-{
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- if (float128_is_signaling_nan(a, status)
- || float128_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- return
- ( a.low == b.low )
- && ( ( a.high == b.high )
- || ( ( a.low == 0 )
- && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
- );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the quadruple-precision floating-point value `a' is less than
-| or equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
-| cause an exception. Otherwise, the comparison is performed according to the
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float128_le_quiet(float128 a, float128 b, float_status *status)
-{
- bool aSign, bSign;
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- if (float128_is_signaling_nan(a, status)
- || float128_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- == 0 );
- }
- return
- aSign ? le128( b.high, b.low, a.high, a.low )
- : le128( a.high, a.low, b.high, b.low );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the quadruple-precision floating-point value `a' is less than
-| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
-| exception. Otherwise, the comparison is performed according to the IEC/IEEE
-| Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float128_lt_quiet(float128 a, float128 b, float_status *status)
-{
- bool aSign, bSign;
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- if (float128_is_signaling_nan(a, status)
- || float128_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- != 0 );
- }
- return
- aSign ? lt128( b.high, b.low, a.high, a.low )
- : lt128( a.high, a.low, b.high, b.low );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
-| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
-| comparison is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int float128_unordered_quiet(float128 a, float128 b, float_status *status)
-{
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- if (float128_is_signaling_nan(a, status)
- || float128_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 1;
- }
- return 0;
-}
-
static inline FloatRelation
floatx80_compare_internal(floatx80 a, floatx80 b, bool is_quiet,
float_status *status)
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 09/10] softfloat: Inline floatx80 compare specializations
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
` (7 preceding siblings ...)
2020-05-15 19:01 ` [PATCH 08/10] softfloat: Inline float128 " Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-19 9:41 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 10/10] softfloat: Return bool from all classification predicates Richard Henderson
2020-05-16 10:58 ` [PATCH 00/10] softfloat: misc cleanups no-reply
10 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
Replace the floatx80 compare specializations with inline functions
that call the standard floatx80_compare{,_quiet} functions.
Use bool as the return type.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat.h | 49 ++++++--
fpu/softfloat.c | 257 ----------------------------------------
2 files changed, 41 insertions(+), 265 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index cfb3cda46b..37217d9b9b 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -689,14 +689,6 @@ floatx80 floatx80_mul(floatx80, floatx80, float_status *status);
floatx80 floatx80_div(floatx80, floatx80, float_status *status);
floatx80 floatx80_rem(floatx80, floatx80, float_status *status);
floatx80 floatx80_sqrt(floatx80, float_status *status);
-int floatx80_eq(floatx80, floatx80, float_status *status);
-int floatx80_le(floatx80, floatx80, float_status *status);
-int floatx80_lt(floatx80, floatx80, float_status *status);
-int floatx80_unordered(floatx80, floatx80, float_status *status);
-int floatx80_eq_quiet(floatx80, floatx80, float_status *status);
-int floatx80_le_quiet(floatx80, floatx80, float_status *status);
-int floatx80_lt_quiet(floatx80, floatx80, float_status *status);
-int floatx80_unordered_quiet(floatx80, floatx80, float_status *status);
FloatRelation floatx80_compare(floatx80, floatx80, float_status *status);
FloatRelation floatx80_compare_quiet(floatx80, floatx80, float_status *status);
int floatx80_is_quiet_nan(floatx80, float_status *status);
@@ -746,6 +738,47 @@ static inline int floatx80_is_any_nan(floatx80 a)
return ((a.high & 0x7fff) == 0x7fff) && (a.low<<1);
}
+static inline bool floatx80_eq(floatx80 a, floatx80 b, float_status *s)
+{
+ return floatx80_compare(a, b, s) == float_relation_equal;
+}
+
+static inline bool floatx80_le(floatx80 a, floatx80 b, float_status *s)
+{
+ return floatx80_compare(a, b, s) <= float_relation_equal;
+}
+
+static inline bool floatx80_lt(floatx80 a, floatx80 b, float_status *s)
+{
+ return floatx80_compare(a, b, s) < float_relation_equal;
+}
+
+static inline bool floatx80_unordered(floatx80 a, floatx80 b, float_status *s)
+{
+ return floatx80_compare(a, b, s) == float_relation_unordered;
+}
+
+static inline bool floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *s)
+{
+ return floatx80_compare_quiet(a, b, s) == float_relation_equal;
+}
+
+static inline bool floatx80_le_quiet(floatx80 a, floatx80 b, float_status *s)
+{
+ return floatx80_compare_quiet(a, b, s) <= float_relation_equal;
+}
+
+static inline bool floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *s)
+{
+ return floatx80_compare_quiet(a, b, s) < float_relation_equal;
+}
+
+static inline bool floatx80_unordered_quiet(floatx80 a, floatx80 b,
+ float_status *s)
+{
+ return floatx80_compare_quiet(a, b, s) == float_relation_unordered;
+}
+
/*----------------------------------------------------------------------------
| Return whether the given value is an invalid floatx80 encoding.
| Invalid floatx80 encodings arise when the integer bit is not set, but
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 4567dda112..6c8f2d597a 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -5849,263 +5849,6 @@ floatx80 floatx80_sqrt(floatx80 a, float_status *status)
0, zExp, zSig0, zSig1, status);
}
-/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point value `a' is equal
-| to the corresponding value `b', and 0 otherwise. The invalid exception is
-| raised if either operand is a NaN. Otherwise, the comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int floatx80_eq(floatx80 a, floatx80 b, float_status *status)
-{
-
- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
- || (extractFloatx80Exp(a) == 0x7FFF
- && (uint64_t) (extractFloatx80Frac(a) << 1))
- || (extractFloatx80Exp(b) == 0x7FFF
- && (uint64_t) (extractFloatx80Frac(b) << 1))
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- return
- ( a.low == b.low )
- && ( ( a.high == b.high )
- || ( ( a.low == 0 )
- && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
- );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point value `a' is
-| less than or equal to the corresponding value `b', and 0 otherwise. The
-| invalid exception is raised if either operand is a NaN. The comparison is
-| performed according to the IEC/IEEE Standard for Binary Floating-Point
-| Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int floatx80_le(floatx80 a, floatx80 b, float_status *status)
-{
- bool aSign, bSign;
-
- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
- || (extractFloatx80Exp(a) == 0x7FFF
- && (uint64_t) (extractFloatx80Frac(a) << 1))
- || (extractFloatx80Exp(b) == 0x7FFF
- && (uint64_t) (extractFloatx80Frac(b) << 1))
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- == 0 );
- }
- return
- aSign ? le128( b.high, b.low, a.high, a.low )
- : le128( a.high, a.low, b.high, b.low );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point value `a' is
-| less than the corresponding value `b', and 0 otherwise. The invalid
-| exception is raised if either operand is a NaN. The comparison is performed
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int floatx80_lt(floatx80 a, floatx80 b, float_status *status)
-{
- bool aSign, bSign;
-
- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
- || (extractFloatx80Exp(a) == 0x7FFF
- && (uint64_t) (extractFloatx80Frac(a) << 1))
- || (extractFloatx80Exp(b) == 0x7FFF
- && (uint64_t) (extractFloatx80Frac(b) << 1))
- ) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- != 0 );
- }
- return
- aSign ? lt128( b.high, b.low, a.high, a.low )
- : lt128( a.high, a.low, b.high, b.low );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point values `a' and `b'
-| cannot be compared, and 0 otherwise. The invalid exception is raised if
-| either operand is a NaN. The comparison is performed according to the
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-int floatx80_unordered(floatx80 a, floatx80 b, float_status *status)
-{
- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
- || (extractFloatx80Exp(a) == 0x7FFF
- && (uint64_t) (extractFloatx80Frac(a) << 1))
- || (extractFloatx80Exp(b) == 0x7FFF
- && (uint64_t) (extractFloatx80Frac(b) << 1))
- ) {
- float_raise(float_flag_invalid, status);
- return 1;
- }
- return 0;
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point value `a' is
-| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
-| cause an exception. The comparison is performed according to the IEC/IEEE
-| Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *status)
-{
-
- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- if (floatx80_is_signaling_nan(a, status)
- || floatx80_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- return
- ( a.low == b.low )
- && ( ( a.high == b.high )
- || ( ( a.low == 0 )
- && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
- );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point value `a' is less
-| than or equal to the corresponding value `b', and 0 otherwise. Quiet NaNs
-| do not cause an exception. Otherwise, the comparison is performed according
-| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status)
-{
- bool aSign, bSign;
-
- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- if (floatx80_is_signaling_nan(a, status)
- || floatx80_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- == 0 );
- }
- return
- aSign ? le128( b.high, b.low, a.high, a.low )
- : le128( a.high, a.low, b.high, b.low );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point value `a' is less
-| than the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause
-| an exception. Otherwise, the comparison is performed according to the
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status)
-{
- bool aSign, bSign;
-
- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
- float_raise(float_flag_invalid, status);
- return 0;
- }
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- if (floatx80_is_signaling_nan(a, status)
- || floatx80_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 0;
- }
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- != 0 );
- }
- return
- aSign ? lt128( b.high, b.low, a.high, a.low )
- : lt128( a.high, a.low, b.high, b.low );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the extended double-precision floating-point values `a' and `b'
-| cannot be compared, and 0 otherwise. Quiet NaNs do not cause an exception.
-| The comparison is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-int floatx80_unordered_quiet(floatx80 a, floatx80 b, float_status *status)
-{
- if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
- float_raise(float_flag_invalid, status);
- return 1;
- }
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- if (floatx80_is_signaling_nan(a, status)
- || floatx80_is_signaling_nan(b, status)) {
- float_raise(float_flag_invalid, status);
- }
- return 1;
- }
- return 0;
-}
-
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 32-bit two's complement integer format. The conversion
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 10/10] softfloat: Return bool from all classification predicates
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
` (8 preceding siblings ...)
2020-05-15 19:01 ` [PATCH 09/10] softfloat: Inline floatx80 " Richard Henderson
@ 2020-05-15 19:01 ` Richard Henderson
2020-05-16 5:33 ` Philippe Mathieu-Daudé
2020-05-19 10:10 ` Alex Bennée
2020-05-16 10:58 ` [PATCH 00/10] softfloat: misc cleanups no-reply
10 siblings, 2 replies; 27+ messages in thread
From: Richard Henderson @ 2020-05-15 19:01 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee
This includes *_is_any_nan, *_is_neg, *_is_inf, etc.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat.h | 66 +++++++++++++++++-----------------
fpu/softfloat-specialize.inc.c | 16 ++++-----
2 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 37217d9b9b..16ca697a73 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -235,31 +235,31 @@ float16 float16_sqrt(float16, float_status *status);
FloatRelation float16_compare(float16, float16, float_status *status);
FloatRelation float16_compare_quiet(float16, float16, float_status *status);
-int float16_is_quiet_nan(float16, float_status *status);
-int float16_is_signaling_nan(float16, float_status *status);
+bool float16_is_quiet_nan(float16, float_status *status);
+bool float16_is_signaling_nan(float16, float_status *status);
float16 float16_silence_nan(float16, float_status *status);
-static inline int float16_is_any_nan(float16 a)
+static inline bool float16_is_any_nan(float16 a)
{
return ((float16_val(a) & ~0x8000) > 0x7c00);
}
-static inline int float16_is_neg(float16 a)
+static inline bool float16_is_neg(float16 a)
{
return float16_val(a) >> 15;
}
-static inline int float16_is_infinity(float16 a)
+static inline bool float16_is_infinity(float16 a)
{
return (float16_val(a) & 0x7fff) == 0x7c00;
}
-static inline int float16_is_zero(float16 a)
+static inline bool float16_is_zero(float16 a)
{
return (float16_val(a) & 0x7fff) == 0;
}
-static inline int float16_is_zero_or_denormal(float16 a)
+static inline bool float16_is_zero_or_denormal(float16 a)
{
return (float16_val(a) & 0x7c00) == 0;
}
@@ -351,8 +351,8 @@ float32 float32_minnum(float32, float32, float_status *status);
float32 float32_maxnum(float32, float32, float_status *status);
float32 float32_minnummag(float32, float32, float_status *status);
float32 float32_maxnummag(float32, float32, float_status *status);
-int float32_is_quiet_nan(float32, float_status *status);
-int float32_is_signaling_nan(float32, float_status *status);
+bool float32_is_quiet_nan(float32, float_status *status);
+bool float32_is_signaling_nan(float32, float_status *status);
float32 float32_silence_nan(float32, float_status *status);
float32 float32_scalbn(float32, int, float_status *status);
@@ -372,27 +372,27 @@ static inline float32 float32_chs(float32 a)
return make_float32(float32_val(a) ^ 0x80000000);
}
-static inline int float32_is_infinity(float32 a)
+static inline bool float32_is_infinity(float32 a)
{
return (float32_val(a) & 0x7fffffff) == 0x7f800000;
}
-static inline int float32_is_neg(float32 a)
+static inline bool float32_is_neg(float32 a)
{
return float32_val(a) >> 31;
}
-static inline int float32_is_zero(float32 a)
+static inline bool float32_is_zero(float32 a)
{
return (float32_val(a) & 0x7fffffff) == 0;
}
-static inline int float32_is_any_nan(float32 a)
+static inline bool float32_is_any_nan(float32 a)
{
return ((float32_val(a) & ~(1 << 31)) > 0x7f800000UL);
}
-static inline int float32_is_zero_or_denormal(float32 a)
+static inline bool float32_is_zero_or_denormal(float32 a)
{
return (float32_val(a) & 0x7f800000) == 0;
}
@@ -540,8 +540,8 @@ float64 float64_minnum(float64, float64, float_status *status);
float64 float64_maxnum(float64, float64, float_status *status);
float64 float64_minnummag(float64, float64, float_status *status);
float64 float64_maxnummag(float64, float64, float_status *status);
-int float64_is_quiet_nan(float64 a, float_status *status);
-int float64_is_signaling_nan(float64, float_status *status);
+bool float64_is_quiet_nan(float64 a, float_status *status);
+bool float64_is_signaling_nan(float64, float_status *status);
float64 float64_silence_nan(float64, float_status *status);
float64 float64_scalbn(float64, int, float_status *status);
@@ -561,27 +561,27 @@ static inline float64 float64_chs(float64 a)
return make_float64(float64_val(a) ^ 0x8000000000000000LL);
}
-static inline int float64_is_infinity(float64 a)
+static inline bool float64_is_infinity(float64 a)
{
return (float64_val(a) & 0x7fffffffffffffffLL ) == 0x7ff0000000000000LL;
}
-static inline int float64_is_neg(float64 a)
+static inline bool float64_is_neg(float64 a)
{
return float64_val(a) >> 63;
}
-static inline int float64_is_zero(float64 a)
+static inline bool float64_is_zero(float64 a)
{
return (float64_val(a) & 0x7fffffffffffffffLL) == 0;
}
-static inline int float64_is_any_nan(float64 a)
+static inline bool float64_is_any_nan(float64 a)
{
return ((float64_val(a) & ~(1ULL << 63)) > 0x7ff0000000000000ULL);
}
-static inline int float64_is_zero_or_denormal(float64 a)
+static inline bool float64_is_zero_or_denormal(float64 a)
{
return (float64_val(a) & 0x7ff0000000000000LL) == 0;
}
@@ -708,7 +708,7 @@ static inline floatx80 floatx80_chs(floatx80 a)
return a;
}
-static inline int floatx80_is_infinity(floatx80 a)
+static inline bool floatx80_is_infinity(floatx80 a)
{
#if defined(TARGET_M68K)
return (a.high & 0x7fff) == floatx80_infinity.high && !(a.low << 1);
@@ -718,22 +718,22 @@ static inline int floatx80_is_infinity(floatx80 a)
#endif
}
-static inline int floatx80_is_neg(floatx80 a)
+static inline bool floatx80_is_neg(floatx80 a)
{
return a.high >> 15;
}
-static inline int floatx80_is_zero(floatx80 a)
+static inline bool floatx80_is_zero(floatx80 a)
{
return (a.high & 0x7fff) == 0 && a.low == 0;
}
-static inline int floatx80_is_zero_or_denormal(floatx80 a)
+static inline bool floatx80_is_zero_or_denormal(floatx80 a)
{
return (a.high & 0x7fff) == 0;
}
-static inline int floatx80_is_any_nan(floatx80 a)
+static inline bool floatx80_is_any_nan(floatx80 a)
{
return ((a.high & 0x7fff) == 0x7fff) && (a.low<<1);
}
@@ -936,8 +936,8 @@ float128 float128_rem(float128, float128, float_status *status);
float128 float128_sqrt(float128, float_status *status);
FloatRelation float128_compare(float128, float128, float_status *status);
FloatRelation float128_compare_quiet(float128, float128, float_status *status);
-int float128_is_quiet_nan(float128, float_status *status);
-int float128_is_signaling_nan(float128, float_status *status);
+bool float128_is_quiet_nan(float128, float_status *status);
+bool float128_is_signaling_nan(float128, float_status *status);
float128 float128_silence_nan(float128, float_status *status);
float128 float128_scalbn(float128, int, float_status *status);
@@ -953,22 +953,22 @@ static inline float128 float128_chs(float128 a)
return a;
}
-static inline int float128_is_infinity(float128 a)
+static inline bool float128_is_infinity(float128 a)
{
return (a.high & 0x7fffffffffffffffLL) == 0x7fff000000000000LL && a.low == 0;
}
-static inline int float128_is_neg(float128 a)
+static inline bool float128_is_neg(float128 a)
{
return a.high >> 63;
}
-static inline int float128_is_zero(float128 a)
+static inline bool float128_is_zero(float128 a)
{
return (a.high & 0x7fffffffffffffffLL) == 0 && a.low == 0;
}
-static inline int float128_is_zero_or_denormal(float128 a)
+static inline bool float128_is_zero_or_denormal(float128 a)
{
return (a.high & 0x7fff000000000000LL) == 0;
}
@@ -983,7 +983,7 @@ static inline bool float128_is_denormal(float128 a)
return float128_is_zero_or_denormal(a) && !float128_is_zero(a);
}
-static inline int float128_is_any_nan(float128 a)
+static inline bool float128_is_any_nan(float128 a)
{
return ((a.high >> 48) & 0x7fff) == 0x7fff &&
((a.low != 0) || ((a.high & 0xffffffffffffLL) != 0));
diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c
index 025ee4f991..44f5b661f8 100644
--- a/fpu/softfloat-specialize.inc.c
+++ b/fpu/softfloat-specialize.inc.c
@@ -245,7 +245,7 @@ typedef struct {
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
-int float16_is_quiet_nan(float16 a_, float_status *status)
+bool float16_is_quiet_nan(float16 a_, float_status *status)
{
#ifdef NO_SIGNALING_NANS
return float16_is_any_nan(a_);
@@ -264,7 +264,7 @@ int float16_is_quiet_nan(float16 a_, float_status *status)
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
-int float16_is_signaling_nan(float16 a_, float_status *status)
+bool float16_is_signaling_nan(float16 a_, float_status *status)
{
#ifdef NO_SIGNALING_NANS
return 0;
@@ -283,7 +283,7 @@ int float16_is_signaling_nan(float16 a_, float_status *status)
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
-int float32_is_quiet_nan(float32 a_, float_status *status)
+bool float32_is_quiet_nan(float32 a_, float_status *status)
{
#ifdef NO_SIGNALING_NANS
return float32_is_any_nan(a_);
@@ -302,7 +302,7 @@ int float32_is_quiet_nan(float32 a_, float_status *status)
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
-int float32_is_signaling_nan(float32 a_, float_status *status)
+bool float32_is_signaling_nan(float32 a_, float_status *status)
{
#ifdef NO_SIGNALING_NANS
return 0;
@@ -637,7 +637,7 @@ static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
-int float64_is_quiet_nan(float64 a_, float_status *status)
+bool float64_is_quiet_nan(float64 a_, float_status *status)
{
#ifdef NO_SIGNALING_NANS
return float64_is_any_nan(a_);
@@ -657,7 +657,7 @@ int float64_is_quiet_nan(float64 a_, float_status *status)
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
-int float64_is_signaling_nan(float64 a_, float_status *status)
+bool float64_is_signaling_nan(float64 a_, float_status *status)
{
#ifdef NO_SIGNALING_NANS
return 0;
@@ -939,7 +939,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status)
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
-int float128_is_quiet_nan(float128 a, float_status *status)
+bool float128_is_quiet_nan(float128 a, float_status *status)
{
#ifdef NO_SIGNALING_NANS
return float128_is_any_nan(a);
@@ -959,7 +959,7 @@ int float128_is_quiet_nan(float128 a, float_status *status)
| signaling NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
-int float128_is_signaling_nan(float128 a, float_status *status)
+bool float128_is_signaling_nan(float128 a, float_status *status)
{
#ifdef NO_SIGNALING_NANS
return 0;
--
2.20.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 02/10] softfloat: Replace flag with bool
2020-05-15 19:01 ` [PATCH 02/10] softfloat: Replace flag with bool Richard Henderson
@ 2020-05-16 5:27 ` Philippe Mathieu-Daudé
2020-05-19 8:53 ` Alex Bennée
1 sibling, 0 replies; 27+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-16 5:27 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: alex.bennee
On 5/15/20 9:01 PM, Richard Henderson wrote:
> We have had this on the to-do list for quite some time.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/fpu/softfloat-helpers.h | 14 +--
> include/fpu/softfloat-macros.h | 24 ++--
> include/fpu/softfloat-types.h | 14 +--
> include/fpu/softfloat.h | 10 +-
> fpu/softfloat-specialize.inc.c | 16 +--
> fpu/softfloat.c | 190 ++++++++++++++++----------------
> target/arm/sve_helper.c | 8 +-
> target/arm/vfp_helper.c | 8 +-
> target/m68k/softfloat.c | 70 ++++++------
> target/mips/msa_helper.c | 10 +-
> 10 files changed, 174 insertions(+), 190 deletions(-)
>
[...]
> diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h
> index 2aae6a89b1..619b875df6 100644
> --- a/include/fpu/softfloat-types.h
> +++ b/include/fpu/softfloat-types.h
> @@ -80,12 +80,6 @@ this code that are retained.
> #ifndef SOFTFLOAT_TYPES_H
> #define SOFTFLOAT_TYPES_H
>
> -/* This 'flag' type must be able to hold at least 0 and 1. It should
> - * probably be replaced with 'bool' but the uses would need to be audited
> - * to check that they weren't accidentally relying on it being a larger type.
> - */
> -typedef uint8_t flag;
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> -
> /*
> * Software IEC/IEEE floating-point types.
> */
> @@ -169,12 +163,12 @@ typedef struct float_status {
> uint8_t float_exception_flags;
> signed char floatx80_rounding_precision;
> /* should denormalised results go to zero and set the inexact flag? */
> - flag flush_to_zero;
> + bool flush_to_zero;
> /* should denormalised inputs go to zero and set the input_denormal flag? */
> - flag flush_inputs_to_zero;
> - flag default_nan_mode;
> + bool flush_inputs_to_zero;
> + bool default_nan_mode;
> /* not always used -- see snan_bit_is_one() in softfloat-specialize.h */
> - flag snan_bit_is_one;
> + bool snan_bit_is_one;
> } float_status;
>
> #endif /* SOFTFLOAT_TYPES_H */
[...]
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 04/10] softfloat: Name rounding mode enum
2020-05-15 19:01 ` [PATCH 04/10] softfloat: Name rounding mode enum Richard Henderson
@ 2020-05-16 5:30 ` Philippe Mathieu-Daudé
2020-05-19 9:06 ` Alex Bennée
1 sibling, 0 replies; 27+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-16 5:30 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: alex.bennee
On 5/15/20 9:01 PM, Richard Henderson wrote:
> Give the previously unnamed enum a typedef name. Use the packed
> attribute so that we do not affect the layout of the float_status
> struct. Use it in the prototypes of relevant functions.
>
> Adjust switch statements as necessary to avoid compiler warnings.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/fpu/softfloat-helpers.h | 5 +--
> include/fpu/softfloat-types.h | 6 ++--
> include/fpu/softfloat.h | 39 +++++++++++-----------
> fpu/softfloat.c | 57 ++++++++++++++++++++-------------
> target/arm/vfp_helper.c | 4 +--
> target/m68k/fpu_helper.c | 6 ++--
> 6 files changed, 66 insertions(+), 51 deletions(-)
>
> diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helpers.h
> index 40d32a6d5d..735ed6b653 100644
> --- a/include/fpu/softfloat-helpers.h
> +++ b/include/fpu/softfloat-helpers.h
> @@ -58,7 +58,8 @@ static inline void set_float_detect_tininess(bool val, float_status *status)
> status->tininess_before_rounding = val;
> }
>
> -static inline void set_float_rounding_mode(int val, float_status *status)
> +static inline void set_float_rounding_mode(FloatRoundMode val,
> + float_status *status)
> {
> status->float_rounding_mode = val;
> }
> @@ -99,7 +100,7 @@ static inline bool get_float_detect_tininess(float_status *status)
> return status->tininess_before_rounding;
> }
>
> -static inline int get_float_rounding_mode(float_status *status)
> +static inline FloatRoundMode get_float_rounding_mode(float_status *status)
> {
> return status->float_rounding_mode;
> }
> diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h
> index 874ddd9f93..7680193ebc 100644
> --- a/include/fpu/softfloat-types.h
> +++ b/include/fpu/softfloat-types.h
> @@ -123,7 +123,7 @@ typedef struct {
> *Software IEC/IEEE floating-point rounding mode.
> */
>
> -enum {
> +typedef enum __attribute__((__packed__)) {
> float_round_nearest_even = 0,
> float_round_down = 1,
> float_round_up = 2,
> @@ -131,7 +131,7 @@ enum {
> float_round_ties_away = 4,
> /* Not an IEEE rounding mode: round to the closest odd mantissa value */
> float_round_to_odd = 5,
> -};
> +} FloatRoundMode;
[...]
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 05/10] softfloat: Name compare relation enum
2020-05-15 19:01 ` [PATCH 05/10] softfloat: Name compare relation enum Richard Henderson
@ 2020-05-16 5:32 ` Philippe Mathieu-Daudé
2020-05-19 9:08 ` Alex Bennée
1 sibling, 0 replies; 27+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-16 5:32 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: alex.bennee
On 5/15/20 9:01 PM, Richard Henderson wrote:
> Give the previously unnamed enum a typedef name. Use it in the
> prototypes of compare functions. Use it to hold the results
> of the compare functions.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/fpu/softfloat.h | 25 +++++++++++----------
> target/i386/ops_sse.h | 8 +++----
> fpu/softfloat.c | 40 ++++++++++++++++++---------------
> target/arm/vfp_helper.c | 2 +-
> target/hppa/op_helper.c | 7 +++---
> target/i386/fpu_helper.c | 8 +++----
> target/openrisc/fpu_helper.c | 4 ++--
> target/ppc/int_helper.c | 13 ++++++-----
> target/s390x/fpu_helper.c | 22 +++++++++---------
> target/sparc/fop_helper.c | 4 ++--
> target/unicore32/ucf64_helper.c | 6 ++---
> target/xtensa/fpu_helper.c | 6 ++---
> 12 files changed, 75 insertions(+), 70 deletions(-)
>
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index ca75f764aa..7f84235122 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -85,12 +85,13 @@ this code that are retained.
> /*----------------------------------------------------------------------------
> | Software IEC/IEEE floating-point ordering relations
> *----------------------------------------------------------------------------*/
> -enum {
> +
> +typedef enum {
> float_relation_less = -1,
> float_relation_equal = 0,
> float_relation_greater = 1,
> float_relation_unordered = 2
> -};
> +} FloatRelation;
[...]
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 10/10] softfloat: Return bool from all classification predicates
2020-05-15 19:01 ` [PATCH 10/10] softfloat: Return bool from all classification predicates Richard Henderson
@ 2020-05-16 5:33 ` Philippe Mathieu-Daudé
2020-05-19 10:10 ` Alex Bennée
1 sibling, 0 replies; 27+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-16 5:33 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: alex.bennee
On 5/15/20 9:01 PM, Richard Henderson wrote:
> This includes *_is_any_nan, *_is_neg, *_is_inf, etc.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/fpu/softfloat.h | 66 +++++++++++++++++-----------------
> fpu/softfloat-specialize.inc.c | 16 ++++-----
> 2 files changed, 41 insertions(+), 41 deletions(-)
[...]
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 00/10] softfloat: misc cleanups
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
` (9 preceding siblings ...)
2020-05-15 19:01 ` [PATCH 10/10] softfloat: Return bool from all classification predicates Richard Henderson
@ 2020-05-16 10:58 ` no-reply
10 siblings, 0 replies; 27+ messages in thread
From: no-reply @ 2020-05-16 10:58 UTC (permalink / raw)
To: richard.henderson; +Cc: alex.bennee, qemu-devel
Patchew URL: https://patchew.org/QEMU/20200515190153.6017-1-richard.henderson@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200515190153.6017-1-richard.henderson@linaro.org
Subject: [PATCH 00/10] softfloat: misc cleanups
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
d6c1572 softfloat: Return bool from all classification predicates
d5219e0 softfloat: Inline floatx80 compare specializations
174c114 softfloat: Inline float128 compare specializations
5359fcf softfloat: Inline float64 compare specializations
dfbd82c softfloat: Inline float32 compare specializations
4800e27 softfloat: Name compare relation enum
7fa3297 softfloat: Name rounding mode enum
7cd2649 softfloat: Change tininess_before_rounding to bool
e7c55dd softfloat: Replace flag with bool
a611c6d softfloat: Use post test for floatN_mul
=== OUTPUT BEGIN ===
1/10 Checking commit a611c6d2a057 (softfloat: Use post test for floatN_mul)
2/10 Checking commit e7c55dd7e0d5 (softfloat: Replace flag with bool)
3/10 Checking commit 7cd2649f0ce0 (softfloat: Change tininess_before_rounding to bool)
ERROR: space prohibited before that close parenthesis ')'
#67: FILE: fpu/softfloat.c:3877:
+ || (zExp < 0 )
total: 1 errors, 0 warnings, 143 lines checked
Patch 3/10 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/10 Checking commit 7fa3297e0cfe (softfloat: Name rounding mode enum)
5/10 Checking commit 4800e2753ad9 (softfloat: Name compare relation enum)
6/10 Checking commit dfbd82cf4b75 (softfloat: Inline float32 compare specializations)
7/10 Checking commit 5359fcfe6a48 (softfloat: Inline float64 compare specializations)
8/10 Checking commit 174c1143cfd1 (softfloat: Inline float128 compare specializations)
9/10 Checking commit d5219e08fe69 (softfloat: Inline floatx80 compare specializations)
10/10 Checking commit d6c1572c791c (softfloat: Return bool from all classification predicates)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20200515190153.6017-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 01/10] softfloat: Use post test for floatN_mul
2020-05-15 19:01 ` [PATCH 01/10] softfloat: Use post test for floatN_mul Richard Henderson
@ 2020-05-19 8:48 ` Alex Bennée
0 siblings, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 8:48 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> The existing f{32,64}_addsub_post test, which checks for zero
> inputs, is identical to f{32,64}_mul_fast_test. Which means
> we can eliminate the fast_test/fast_op hooks in favor of
> reusing the same post hook.
>
> This means we have one fewer test along the fast path for multiply.
I was worried that we were missing an opportunity for the early fast
path but fp-bench disagrees.
Before:
./fp-bench -o mul
139.01 MFlops
After:
./fp-bench -o mul
155.28 MFlops
So:
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> fpu/softfloat.c | 65 +++++++++++--------------------------------------
> 1 file changed, 14 insertions(+), 51 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index a362bf89ca..5fb4ef75bb 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -339,12 +339,10 @@ static inline bool f64_is_inf(union_float64 a)
> return float64_is_infinity(a.s);
> }
>
> -/* Note: @fast_test and @post can be NULL */
> static inline float32
> float32_gen2(float32 xa, float32 xb, float_status *s,
> hard_f32_op2_fn hard, soft_f32_op2_fn soft,
> - f32_check_fn pre, f32_check_fn post,
> - f32_check_fn fast_test, soft_f32_op2_fn fast_op)
> + f32_check_fn pre, f32_check_fn post)
> {
> union_float32 ua, ub, ur;
>
> @@ -359,17 +357,12 @@ float32_gen2(float32 xa, float32 xb, float_status *s,
> if (unlikely(!pre(ua, ub))) {
> goto soft;
> }
> - if (fast_test && fast_test(ua, ub)) {
> - return fast_op(ua.s, ub.s, s);
> - }
>
> ur.h = hard(ua.h, ub.h);
> if (unlikely(f32_is_inf(ur))) {
> s->float_exception_flags |= float_flag_overflow;
> - } else if (unlikely(fabsf(ur.h) <= FLT_MIN)) {
> - if (post == NULL || post(ua, ub)) {
> - goto soft;
> - }
> + } else if (unlikely(fabsf(ur.h) <= FLT_MIN) && post(ua, ub)) {
> + goto soft;
> }
> return ur.s;
>
> @@ -380,8 +373,7 @@ float32_gen2(float32 xa, float32 xb, float_status *s,
> static inline float64
> float64_gen2(float64 xa, float64 xb, float_status *s,
> hard_f64_op2_fn hard, soft_f64_op2_fn soft,
> - f64_check_fn pre, f64_check_fn post,
> - f64_check_fn fast_test, soft_f64_op2_fn fast_op)
> + f64_check_fn pre, f64_check_fn post)
> {
> union_float64 ua, ub, ur;
>
> @@ -396,17 +388,12 @@ float64_gen2(float64 xa, float64 xb, float_status *s,
> if (unlikely(!pre(ua, ub))) {
> goto soft;
> }
> - if (fast_test && fast_test(ua, ub)) {
> - return fast_op(ua.s, ub.s, s);
> - }
>
> ur.h = hard(ua.h, ub.h);
> if (unlikely(f64_is_inf(ur))) {
> s->float_exception_flags |= float_flag_overflow;
> - } else if (unlikely(fabs(ur.h) <= DBL_MIN)) {
> - if (post == NULL || post(ua, ub)) {
> - goto soft;
> - }
> + } else if (unlikely(fabs(ur.h) <= DBL_MIN) && post(ua, ub)) {
> + goto soft;
> }
> return ur.s;
>
> @@ -1115,7 +1102,7 @@ static double hard_f64_sub(double a, double b)
> return a - b;
> }
>
> -static bool f32_addsub_post(union_float32 a, union_float32 b)
> +static bool f32_addsubmul_post(union_float32 a, union_float32 b)
> {
> if (QEMU_HARDFLOAT_2F32_USE_FP) {
> return !(fpclassify(a.h) == FP_ZERO && fpclassify(b.h) == FP_ZERO);
> @@ -1123,7 +1110,7 @@ static bool f32_addsub_post(union_float32 a, union_float32 b)
> return !(float32_is_zero(a.s) && float32_is_zero(b.s));
> }
>
> -static bool f64_addsub_post(union_float64 a, union_float64 b)
> +static bool f64_addsubmul_post(union_float64 a, union_float64 b)
> {
> if (QEMU_HARDFLOAT_2F64_USE_FP) {
> return !(fpclassify(a.h) == FP_ZERO && fpclassify(b.h) == FP_ZERO);
> @@ -1136,14 +1123,14 @@ static float32 float32_addsub(float32 a, float32 b, float_status *s,
> hard_f32_op2_fn hard, soft_f32_op2_fn soft)
> {
> return float32_gen2(a, b, s, hard, soft,
> - f32_is_zon2, f32_addsub_post, NULL, NULL);
> + f32_is_zon2, f32_addsubmul_post);
> }
>
> static float64 float64_addsub(float64 a, float64 b, float_status *s,
> hard_f64_op2_fn hard, soft_f64_op2_fn soft)
> {
> return float64_gen2(a, b, s, hard, soft,
> - f64_is_zon2, f64_addsub_post, NULL, NULL);
> + f64_is_zon2, f64_addsubmul_post);
> }
>
> float32 QEMU_FLATTEN
> @@ -1258,42 +1245,18 @@ static double hard_f64_mul(double a, double b)
> return a * b;
> }
>
> -static bool f32_mul_fast_test(union_float32 a, union_float32 b)
> -{
> - return float32_is_zero(a.s) || float32_is_zero(b.s);
> -}
> -
> -static bool f64_mul_fast_test(union_float64 a, union_float64 b)
> -{
> - return float64_is_zero(a.s) || float64_is_zero(b.s);
> -}
> -
> -static float32 f32_mul_fast_op(float32 a, float32 b, float_status *s)
> -{
> - bool signbit = float32_is_neg(a) ^ float32_is_neg(b);
> -
> - return float32_set_sign(float32_zero, signbit);
> -}
> -
> -static float64 f64_mul_fast_op(float64 a, float64 b, float_status *s)
> -{
> - bool signbit = float64_is_neg(a) ^ float64_is_neg(b);
> -
> - return float64_set_sign(float64_zero, signbit);
> -}
> -
> float32 QEMU_FLATTEN
> float32_mul(float32 a, float32 b, float_status *s)
> {
> return float32_gen2(a, b, s, hard_f32_mul, soft_f32_mul,
> - f32_is_zon2, NULL, f32_mul_fast_test, f32_mul_fast_op);
> + f32_is_zon2, f32_addsubmul_post);
> }
>
> float64 QEMU_FLATTEN
> float64_mul(float64 a, float64 b, float_status *s)
> {
> return float64_gen2(a, b, s, hard_f64_mul, soft_f64_mul,
> - f64_is_zon2, NULL, f64_mul_fast_test, f64_mul_fast_op);
> + f64_is_zon2, f64_addsubmul_post);
> }
>
> /*
> @@ -1834,14 +1797,14 @@ float32 QEMU_FLATTEN
> float32_div(float32 a, float32 b, float_status *s)
> {
> return float32_gen2(a, b, s, hard_f32_div, soft_f32_div,
> - f32_div_pre, f32_div_post, NULL, NULL);
> + f32_div_pre, f32_div_post);
> }
>
> float64 QEMU_FLATTEN
> float64_div(float64 a, float64 b, float_status *s)
> {
> return float64_gen2(a, b, s, hard_f64_div, soft_f64_div,
> - f64_div_pre, f64_div_post, NULL, NULL);
> + f64_div_pre, f64_div_post);
> }
>
> /*
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 02/10] softfloat: Replace flag with bool
2020-05-15 19:01 ` [PATCH 02/10] softfloat: Replace flag with bool Richard Henderson
2020-05-16 5:27 ` Philippe Mathieu-Daudé
@ 2020-05-19 8:53 ` Alex Bennée
1 sibling, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 8:53 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> We have had this on the to-do list for quite some time.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 03/10] softfloat: Change tininess_before_rounding to bool
2020-05-15 19:01 ` [PATCH 03/10] softfloat: Change tininess_before_rounding to bool Richard Henderson
@ 2020-05-19 8:55 ` Alex Bennée
0 siblings, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 8:55 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> Slightly tidies the usage within softfloat.c and the
> representation in float_status.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 04/10] softfloat: Name rounding mode enum
2020-05-15 19:01 ` [PATCH 04/10] softfloat: Name rounding mode enum Richard Henderson
2020-05-16 5:30 ` Philippe Mathieu-Daudé
@ 2020-05-19 9:06 ` Alex Bennée
1 sibling, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 9:06 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> Give the previously unnamed enum a typedef name. Use the packed
> attribute so that we do not affect the layout of the float_status
> struct. Use it in the prototypes of relevant functions.
>
> Adjust switch statements as necessary to avoid compiler warnings.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 05/10] softfloat: Name compare relation enum
2020-05-15 19:01 ` [PATCH 05/10] softfloat: Name compare relation enum Richard Henderson
2020-05-16 5:32 ` Philippe Mathieu-Daudé
@ 2020-05-19 9:08 ` Alex Bennée
1 sibling, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 9:08 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> Give the previously unnamed enum a typedef name. Use it in the
> prototypes of compare functions. Use it to hold the results
> of the compare functions.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 06/10] softfloat: Inline float32 compare specializations
2020-05-15 19:01 ` [PATCH 06/10] softfloat: Inline float32 compare specializations Richard Henderson
@ 2020-05-19 9:38 ` Alex Bennée
0 siblings, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 9:38 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> Replace the float32 compare specializations with inline functions
> that call the standard float32_compare{,_quiet} functions.
> Use bool as the return type.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/fpu/softfloat.h | 49 +++++++--
> fpu/softfloat.c | 216 ----------------------------------------
> 2 files changed, 41 insertions(+), 224 deletions(-)
\o/
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
<snip>
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 07/10] softfloat: Inline float64 compare specializations
2020-05-15 19:01 ` [PATCH 07/10] softfloat: Inline float64 " Richard Henderson
@ 2020-05-19 9:41 ` Alex Bennée
0 siblings, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 9:41 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> Replace the float64 compare specializations with inline functions
> that call the standard float64_compare{,_quiet} functions.
> Use bool as the return type.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/fpu/softfloat.h | 49 ++++++--
> fpu/softfloat.c | 220 ----------------------------------
> target/s390x/vec_fpu_helper.c | 2 +-
> 3 files changed, 42 insertions(+), 229 deletions(-)
👋👏
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index 4d1af6ab45..281f0fd971 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -532,14 +532,6 @@ float64 float64_rem(float64, float64, float_status *status);
> float64 float64_muladd(float64, float64, float64, int, float_status *status);
> float64 float64_sqrt(float64, float_status *status);
> float64 float64_log2(float64, float_status *status);
> -int float64_eq(float64, float64, float_status *status);
> -int float64_le(float64, float64, float_status *status);
> -int float64_lt(float64, float64, float_status *status);
> -int float64_unordered(float64, float64, float_status *status);
> -int float64_eq_quiet(float64, float64, float_status *status);
> -int float64_le_quiet(float64, float64, float_status *status);
> -int float64_lt_quiet(float64, float64, float_status *status);
> -int float64_unordered_quiet(float64, float64, float_status *status);
> FloatRelation float64_compare(float64, float64, float_status *status);
> FloatRelation float64_compare_quiet(float64, float64, float_status *status);
> float64 float64_min(float64, float64, float_status *status);
> @@ -615,6 +607,47 @@ static inline float64 float64_set_sign(float64 a, int sign)
> | ((int64_t)sign << 63));
> }
>
> +static inline bool float64_eq(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare(a, b, s) == float_relation_equal;
> +}
> +
> +static inline bool float64_le(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare(a, b, s) <= float_relation_equal;
> +}
> +
> +static inline bool float64_lt(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare(a, b, s) < float_relation_equal;
> +}
> +
> +static inline bool float64_unordered(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare(a, b, s) == float_relation_unordered;
> +}
> +
> +static inline bool float64_eq_quiet(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare_quiet(a, b, s) == float_relation_equal;
> +}
> +
> +static inline bool float64_le_quiet(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare_quiet(a, b, s) <= float_relation_equal;
> +}
> +
> +static inline bool float64_lt_quiet(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare_quiet(a, b, s) < float_relation_equal;
> +}
> +
> +static inline bool float64_unordered_quiet(float64 a, float64 b,
> + float_status *s)
> +{
> + return float64_compare_quiet(a, b, s) == float_relation_unordered;
> +}
> +
> #define float64_zero make_float64(0)
> #define float64_half make_float64(0x3fe0000000000000LL)
> #define float64_one make_float64(0x3ff0000000000000LL)
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index f6bfc40c97..5d7fc2c17a 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -4941,226 +4941,6 @@ float64 float64_log2(float64 a, float_status *status)
> return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status);
> }
>
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is equal to the
> -| corresponding value `b', and 0 otherwise. The invalid exception is raised
> -| if either operand is a NaN. Otherwise, the comparison is performed
> -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_eq(float64 a, float64 b, float_status *status)
> -{
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - av = float64_val(a);
> - bv = float64_val(b);
> - return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is less than or
> -| equal to the corresponding value `b', and 0 otherwise. The invalid
> -| exception is raised if either operand is a NaN. The comparison is performed
> -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_le(float64 a, float64 b, float_status *status)
> -{
> - bool aSign, bSign;
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - aSign = extractFloat64Sign( a );
> - bSign = extractFloat64Sign( b );
> - av = float64_val(a);
> - bv = float64_val(b);
> - if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
> - return ( av == bv ) || ( aSign ^ ( av < bv ) );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is less than
> -| the corresponding value `b', and 0 otherwise. The invalid exception is
> -| raised if either operand is a NaN. The comparison is performed according
> -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_lt(float64 a, float64 b, float_status *status)
> -{
> - bool aSign, bSign;
> - uint64_t av, bv;
> -
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - aSign = extractFloat64Sign( a );
> - bSign = extractFloat64Sign( b );
> - av = float64_val(a);
> - bv = float64_val(b);
> - if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
> - return ( av != bv ) && ( aSign ^ ( av < bv ) );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point values `a' and `b' cannot
> -| be compared, and 0 otherwise. The invalid exception is raised if either
> -| operand is a NaN. The comparison is performed according to the IEC/IEEE
> -| Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_unordered(float64 a, float64 b, float_status *status)
> -{
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 1;
> - }
> - return 0;
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is equal to the
> -| corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
> -| exception.The comparison is performed according to the IEC/IEEE Standard
> -| for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_eq_quiet(float64 a, float64 b, float_status *status)
> -{
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - if (float64_is_signaling_nan(a, status)
> - || float64_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - av = float64_val(a);
> - bv = float64_val(b);
> - return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is less than or
> -| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
> -| cause an exception. Otherwise, the comparison is performed according to the
> -| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_le_quiet(float64 a, float64 b, float_status *status)
> -{
> - bool aSign, bSign;
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - if (float64_is_signaling_nan(a, status)
> - || float64_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - aSign = extractFloat64Sign( a );
> - bSign = extractFloat64Sign( b );
> - av = float64_val(a);
> - bv = float64_val(b);
> - if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
> - return ( av == bv ) || ( aSign ^ ( av < bv ) );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is less than
> -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
> -| exception. Otherwise, the comparison is performed according to the IEC/IEEE
> -| Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_lt_quiet(float64 a, float64 b, float_status *status)
> -{
> - bool aSign, bSign;
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - if (float64_is_signaling_nan(a, status)
> - || float64_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - aSign = extractFloat64Sign( a );
> - bSign = extractFloat64Sign( b );
> - av = float64_val(a);
> - bv = float64_val(b);
> - if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
> - return ( av != bv ) && ( aSign ^ ( av < bv ) );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point values `a' and `b' cannot
> -| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
> -| comparison is performed according to the IEC/IEEE Standard for Binary
> -| Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_unordered_quiet(float64 a, float64 b, float_status *status)
> -{
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - if (float64_is_signaling_nan(a, status)
> - || float64_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 1;
> - }
> - return 0;
> -}
> -
> /*----------------------------------------------------------------------------
> | Returns the result of converting the extended double-precision floating-
> | point value `a' to the 32-bit two's complement integer format. The
> diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
> index a48bd704bc..c1564e819b 100644
> --- a/target/s390x/vec_fpu_helper.c
> +++ b/target/s390x/vec_fpu_helper.c
> @@ -174,7 +174,7 @@ void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
> env->cc_op = wfc64(v1, v2, env, true, GETPC());
> }
>
> -typedef int (*vfc64_fn)(float64 a, float64 b, float_status *status);
> +typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
> static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
> CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
> {
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 08/10] softfloat: Inline float128 compare specializations
2020-05-15 19:01 ` [PATCH 08/10] softfloat: Inline float128 " Richard Henderson
@ 2020-05-19 9:41 ` Alex Bennée
0 siblings, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 9:41 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> Replace the float128 compare specializations with inline functions
> that call the standard float128_compare{,_quiet} functions.
> Use bool as the return type.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> include/fpu/softfloat.h | 49 +++++++--
> fpu/softfloat.c | 238 ----------------------------------------
> 2 files changed, 41 insertions(+), 246 deletions(-)
>
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index 281f0fd971..cfb3cda46b 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -901,14 +901,6 @@ float128 float128_mul(float128, float128, float_status *status);
> float128 float128_div(float128, float128, float_status *status);
> float128 float128_rem(float128, float128, float_status *status);
> float128 float128_sqrt(float128, float_status *status);
> -int float128_eq(float128, float128, float_status *status);
> -int float128_le(float128, float128, float_status *status);
> -int float128_lt(float128, float128, float_status *status);
> -int float128_unordered(float128, float128, float_status *status);
> -int float128_eq_quiet(float128, float128, float_status *status);
> -int float128_le_quiet(float128, float128, float_status *status);
> -int float128_lt_quiet(float128, float128, float_status *status);
> -int float128_unordered_quiet(float128, float128, float_status *status);
> FloatRelation float128_compare(float128, float128, float_status *status);
> FloatRelation float128_compare_quiet(float128, float128, float_status *status);
> int float128_is_quiet_nan(float128, float_status *status);
> @@ -964,6 +956,47 @@ static inline int float128_is_any_nan(float128 a)
> ((a.low != 0) || ((a.high & 0xffffffffffffLL) != 0));
> }
>
> +static inline bool float128_eq(float128 a, float128 b, float_status *s)
> +{
> + return float128_compare(a, b, s) == float_relation_equal;
> +}
> +
> +static inline bool float128_le(float128 a, float128 b, float_status *s)
> +{
> + return float128_compare(a, b, s) <= float_relation_equal;
> +}
> +
> +static inline bool float128_lt(float128 a, float128 b, float_status *s)
> +{
> + return float128_compare(a, b, s) < float_relation_equal;
> +}
> +
> +static inline bool float128_unordered(float128 a, float128 b, float_status *s)
> +{
> + return float128_compare(a, b, s) == float_relation_unordered;
> +}
> +
> +static inline bool float128_eq_quiet(float128 a, float128 b, float_status *s)
> +{
> + return float128_compare_quiet(a, b, s) == float_relation_equal;
> +}
> +
> +static inline bool float128_le_quiet(float128 a, float128 b, float_status *s)
> +{
> + return float128_compare_quiet(a, b, s) <= float_relation_equal;
> +}
> +
> +static inline bool float128_lt_quiet(float128 a, float128 b, float_status *s)
> +{
> + return float128_compare_quiet(a, b, s) < float_relation_equal;
> +}
> +
> +static inline bool float128_unordered_quiet(float128 a, float128 b,
> + float_status *s)
> +{
> + return float128_compare_quiet(a, b, s) == float_relation_unordered;
> +}
> +
> #define float128_zero make_float128(0, 0)
>
> /*----------------------------------------------------------------------------
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 5d7fc2c17a..4567dda112 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -7218,244 +7218,6 @@ float128 float128_sqrt(float128 a, float_status *status)
>
> }
>
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the quadruple-precision floating-point value `a' is equal to
> -| the corresponding value `b', and 0 otherwise. The invalid exception is
> -| raised if either operand is a NaN. Otherwise, the comparison is performed
> -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float128_eq(float128 a, float128 b, float_status *status)
> -{
> -
> - if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
> - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
> - || ( ( extractFloat128Exp( b ) == 0x7FFF )
> - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - return
> - ( a.low == b.low )
> - && ( ( a.high == b.high )
> - || ( ( a.low == 0 )
> - && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
> - );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the quadruple-precision floating-point value `a' is less than
> -| or equal to the corresponding value `b', and 0 otherwise. The invalid
> -| exception is raised if either operand is a NaN. The comparison is performed
> -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float128_le(float128 a, float128 b, float_status *status)
> -{
> - bool aSign, bSign;
> -
> - if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
> - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
> - || ( ( extractFloat128Exp( b ) == 0x7FFF )
> - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - aSign = extractFloat128Sign( a );
> - bSign = extractFloat128Sign( b );
> - if ( aSign != bSign ) {
> - return
> - aSign
> - || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
> - == 0 );
> - }
> - return
> - aSign ? le128( b.high, b.low, a.high, a.low )
> - : le128( a.high, a.low, b.high, b.low );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the quadruple-precision floating-point value `a' is less than
> -| the corresponding value `b', and 0 otherwise. The invalid exception is
> -| raised if either operand is a NaN. The comparison is performed according
> -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float128_lt(float128 a, float128 b, float_status *status)
> -{
> - bool aSign, bSign;
> -
> - if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
> - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
> - || ( ( extractFloat128Exp( b ) == 0x7FFF )
> - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - aSign = extractFloat128Sign( a );
> - bSign = extractFloat128Sign( b );
> - if ( aSign != bSign ) {
> - return
> - aSign
> - && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
> - != 0 );
> - }
> - return
> - aSign ? lt128( b.high, b.low, a.high, a.low )
> - : lt128( a.high, a.low, b.high, b.low );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
> -| be compared, and 0 otherwise. The invalid exception is raised if either
> -| operand is a NaN. The comparison is performed according to the IEC/IEEE
> -| Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float128_unordered(float128 a, float128 b, float_status *status)
> -{
> - if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
> - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
> - || ( ( extractFloat128Exp( b ) == 0x7FFF )
> - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 1;
> - }
> - return 0;
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the quadruple-precision floating-point value `a' is equal to
> -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
> -| exception. The comparison is performed according to the IEC/IEEE Standard
> -| for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float128_eq_quiet(float128 a, float128 b, float_status *status)
> -{
> -
> - if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
> - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
> - || ( ( extractFloat128Exp( b ) == 0x7FFF )
> - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
> - ) {
> - if (float128_is_signaling_nan(a, status)
> - || float128_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - return
> - ( a.low == b.low )
> - && ( ( a.high == b.high )
> - || ( ( a.low == 0 )
> - && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
> - );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the quadruple-precision floating-point value `a' is less than
> -| or equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
> -| cause an exception. Otherwise, the comparison is performed according to the
> -| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float128_le_quiet(float128 a, float128 b, float_status *status)
> -{
> - bool aSign, bSign;
> -
> - if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
> - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
> - || ( ( extractFloat128Exp( b ) == 0x7FFF )
> - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
> - ) {
> - if (float128_is_signaling_nan(a, status)
> - || float128_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - aSign = extractFloat128Sign( a );
> - bSign = extractFloat128Sign( b );
> - if ( aSign != bSign ) {
> - return
> - aSign
> - || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
> - == 0 );
> - }
> - return
> - aSign ? le128( b.high, b.low, a.high, a.low )
> - : le128( a.high, a.low, b.high, b.low );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the quadruple-precision floating-point value `a' is less than
> -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
> -| exception. Otherwise, the comparison is performed according to the IEC/IEEE
> -| Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float128_lt_quiet(float128 a, float128 b, float_status *status)
> -{
> - bool aSign, bSign;
> -
> - if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
> - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
> - || ( ( extractFloat128Exp( b ) == 0x7FFF )
> - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
> - ) {
> - if (float128_is_signaling_nan(a, status)
> - || float128_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - aSign = extractFloat128Sign( a );
> - bSign = extractFloat128Sign( b );
> - if ( aSign != bSign ) {
> - return
> - aSign
> - && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
> - != 0 );
> - }
> - return
> - aSign ? lt128( b.high, b.low, a.high, a.low )
> - : lt128( a.high, a.low, b.high, b.low );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
> -| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
> -| comparison is performed according to the IEC/IEEE Standard for Binary
> -| Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float128_unordered_quiet(float128 a, float128 b, float_status *status)
> -{
> - if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
> - && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
> - || ( ( extractFloat128Exp( b ) == 0x7FFF )
> - && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
> - ) {
> - if (float128_is_signaling_nan(a, status)
> - || float128_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 1;
> - }
> - return 0;
> -}
> -
> static inline FloatRelation
> floatx80_compare_internal(floatx80 a, floatx80 b, bool is_quiet,
> float_status *status)
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 09/10] softfloat: Inline floatx80 compare specializations
2020-05-15 19:01 ` [PATCH 09/10] softfloat: Inline floatx80 " Richard Henderson
@ 2020-05-19 9:41 ` Alex Bennée
0 siblings, 0 replies; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 9:41 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> Replace the floatx80 compare specializations with inline functions
> that call the standard floatx80_compare{,_quiet} functions.
> Use bool as the return type.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> include/fpu/softfloat.h | 49 ++++++--
> fpu/softfloat.c | 257 ----------------------------------------
> 2 files changed, 41 insertions(+), 265 deletions(-)
>
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index cfb3cda46b..37217d9b9b 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -689,14 +689,6 @@ floatx80 floatx80_mul(floatx80, floatx80, float_status *status);
> floatx80 floatx80_div(floatx80, floatx80, float_status *status);
> floatx80 floatx80_rem(floatx80, floatx80, float_status *status);
> floatx80 floatx80_sqrt(floatx80, float_status *status);
> -int floatx80_eq(floatx80, floatx80, float_status *status);
> -int floatx80_le(floatx80, floatx80, float_status *status);
> -int floatx80_lt(floatx80, floatx80, float_status *status);
> -int floatx80_unordered(floatx80, floatx80, float_status *status);
> -int floatx80_eq_quiet(floatx80, floatx80, float_status *status);
> -int floatx80_le_quiet(floatx80, floatx80, float_status *status);
> -int floatx80_lt_quiet(floatx80, floatx80, float_status *status);
> -int floatx80_unordered_quiet(floatx80, floatx80, float_status *status);
> FloatRelation floatx80_compare(floatx80, floatx80, float_status *status);
> FloatRelation floatx80_compare_quiet(floatx80, floatx80, float_status *status);
> int floatx80_is_quiet_nan(floatx80, float_status *status);
> @@ -746,6 +738,47 @@ static inline int floatx80_is_any_nan(floatx80 a)
> return ((a.high & 0x7fff) == 0x7fff) && (a.low<<1);
> }
>
> +static inline bool floatx80_eq(floatx80 a, floatx80 b, float_status *s)
> +{
> + return floatx80_compare(a, b, s) == float_relation_equal;
> +}
> +
> +static inline bool floatx80_le(floatx80 a, floatx80 b, float_status *s)
> +{
> + return floatx80_compare(a, b, s) <= float_relation_equal;
> +}
> +
> +static inline bool floatx80_lt(floatx80 a, floatx80 b, float_status *s)
> +{
> + return floatx80_compare(a, b, s) < float_relation_equal;
> +}
> +
> +static inline bool floatx80_unordered(floatx80 a, floatx80 b, float_status *s)
> +{
> + return floatx80_compare(a, b, s) == float_relation_unordered;
> +}
> +
> +static inline bool floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *s)
> +{
> + return floatx80_compare_quiet(a, b, s) == float_relation_equal;
> +}
> +
> +static inline bool floatx80_le_quiet(floatx80 a, floatx80 b, float_status *s)
> +{
> + return floatx80_compare_quiet(a, b, s) <= float_relation_equal;
> +}
> +
> +static inline bool floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *s)
> +{
> + return floatx80_compare_quiet(a, b, s) < float_relation_equal;
> +}
> +
> +static inline bool floatx80_unordered_quiet(floatx80 a, floatx80 b,
> + float_status *s)
> +{
> + return floatx80_compare_quiet(a, b, s) == float_relation_unordered;
> +}
> +
> /*----------------------------------------------------------------------------
> | Return whether the given value is an invalid floatx80 encoding.
> | Invalid floatx80 encodings arise when the integer bit is not set, but
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 4567dda112..6c8f2d597a 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -5849,263 +5849,6 @@ floatx80 floatx80_sqrt(floatx80 a, float_status *status)
> 0, zExp, zSig0, zSig1, status);
> }
>
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the extended double-precision floating-point value `a' is equal
> -| to the corresponding value `b', and 0 otherwise. The invalid exception is
> -| raised if either operand is a NaN. Otherwise, the comparison is performed
> -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int floatx80_eq(floatx80 a, floatx80 b, float_status *status)
> -{
> -
> - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
> - || (extractFloatx80Exp(a) == 0x7FFF
> - && (uint64_t) (extractFloatx80Frac(a) << 1))
> - || (extractFloatx80Exp(b) == 0x7FFF
> - && (uint64_t) (extractFloatx80Frac(b) << 1))
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - return
> - ( a.low == b.low )
> - && ( ( a.high == b.high )
> - || ( ( a.low == 0 )
> - && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
> - );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the extended double-precision floating-point value `a' is
> -| less than or equal to the corresponding value `b', and 0 otherwise. The
> -| invalid exception is raised if either operand is a NaN. The comparison is
> -| performed according to the IEC/IEEE Standard for Binary Floating-Point
> -| Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int floatx80_le(floatx80 a, floatx80 b, float_status *status)
> -{
> - bool aSign, bSign;
> -
> - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
> - || (extractFloatx80Exp(a) == 0x7FFF
> - && (uint64_t) (extractFloatx80Frac(a) << 1))
> - || (extractFloatx80Exp(b) == 0x7FFF
> - && (uint64_t) (extractFloatx80Frac(b) << 1))
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - aSign = extractFloatx80Sign( a );
> - bSign = extractFloatx80Sign( b );
> - if ( aSign != bSign ) {
> - return
> - aSign
> - || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
> - == 0 );
> - }
> - return
> - aSign ? le128( b.high, b.low, a.high, a.low )
> - : le128( a.high, a.low, b.high, b.low );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the extended double-precision floating-point value `a' is
> -| less than the corresponding value `b', and 0 otherwise. The invalid
> -| exception is raised if either operand is a NaN. The comparison is performed
> -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int floatx80_lt(floatx80 a, floatx80 b, float_status *status)
> -{
> - bool aSign, bSign;
> -
> - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
> - || (extractFloatx80Exp(a) == 0x7FFF
> - && (uint64_t) (extractFloatx80Frac(a) << 1))
> - || (extractFloatx80Exp(b) == 0x7FFF
> - && (uint64_t) (extractFloatx80Frac(b) << 1))
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - aSign = extractFloatx80Sign( a );
> - bSign = extractFloatx80Sign( b );
> - if ( aSign != bSign ) {
> - return
> - aSign
> - && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
> - != 0 );
> - }
> - return
> - aSign ? lt128( b.high, b.low, a.high, a.low )
> - : lt128( a.high, a.low, b.high, b.low );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the extended double-precision floating-point values `a' and `b'
> -| cannot be compared, and 0 otherwise. The invalid exception is raised if
> -| either operand is a NaN. The comparison is performed according to the
> -| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -int floatx80_unordered(floatx80 a, floatx80 b, float_status *status)
> -{
> - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
> - || (extractFloatx80Exp(a) == 0x7FFF
> - && (uint64_t) (extractFloatx80Frac(a) << 1))
> - || (extractFloatx80Exp(b) == 0x7FFF
> - && (uint64_t) (extractFloatx80Frac(b) << 1))
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 1;
> - }
> - return 0;
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the extended double-precision floating-point value `a' is
> -| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
> -| cause an exception. The comparison is performed according to the IEC/IEEE
> -| Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *status)
> -{
> -
> - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
> - && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
> - || ( ( extractFloatx80Exp( b ) == 0x7FFF )
> - && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
> - ) {
> - if (floatx80_is_signaling_nan(a, status)
> - || floatx80_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - return
> - ( a.low == b.low )
> - && ( ( a.high == b.high )
> - || ( ( a.low == 0 )
> - && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
> - );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the extended double-precision floating-point value `a' is less
> -| than or equal to the corresponding value `b', and 0 otherwise. Quiet NaNs
> -| do not cause an exception. Otherwise, the comparison is performed according
> -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status)
> -{
> - bool aSign, bSign;
> -
> - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
> - && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
> - || ( ( extractFloatx80Exp( b ) == 0x7FFF )
> - && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
> - ) {
> - if (floatx80_is_signaling_nan(a, status)
> - || floatx80_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - aSign = extractFloatx80Sign( a );
> - bSign = extractFloatx80Sign( b );
> - if ( aSign != bSign ) {
> - return
> - aSign
> - || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
> - == 0 );
> - }
> - return
> - aSign ? le128( b.high, b.low, a.high, a.low )
> - : le128( a.high, a.low, b.high, b.low );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the extended double-precision floating-point value `a' is less
> -| than the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause
> -| an exception. Otherwise, the comparison is performed according to the
> -| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status)
> -{
> - bool aSign, bSign;
> -
> - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
> - && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
> - || ( ( extractFloatx80Exp( b ) == 0x7FFF )
> - && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
> - ) {
> - if (floatx80_is_signaling_nan(a, status)
> - || floatx80_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - aSign = extractFloatx80Sign( a );
> - bSign = extractFloatx80Sign( b );
> - if ( aSign != bSign ) {
> - return
> - aSign
> - && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
> - != 0 );
> - }
> - return
> - aSign ? lt128( b.high, b.low, a.high, a.low )
> - : lt128( a.high, a.low, b.high, b.low );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the extended double-precision floating-point values `a' and `b'
> -| cannot be compared, and 0 otherwise. Quiet NaNs do not cause an exception.
> -| The comparison is performed according to the IEC/IEEE Standard for Binary
> -| Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -int floatx80_unordered_quiet(floatx80 a, floatx80 b, float_status *status)
> -{
> - if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
> - float_raise(float_flag_invalid, status);
> - return 1;
> - }
> - if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
> - && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
> - || ( ( extractFloatx80Exp( b ) == 0x7FFF )
> - && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
> - ) {
> - if (floatx80_is_signaling_nan(a, status)
> - || floatx80_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 1;
> - }
> - return 0;
> -}
> -
> /*----------------------------------------------------------------------------
> | Returns the result of converting the quadruple-precision floating-point
> | value `a' to the 32-bit two's complement integer format. The conversion
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 10/10] softfloat: Return bool from all classification predicates
2020-05-15 19:01 ` [PATCH 10/10] softfloat: Return bool from all classification predicates Richard Henderson
2020-05-16 5:33 ` Philippe Mathieu-Daudé
@ 2020-05-19 10:10 ` Alex Bennée
2020-05-19 15:47 ` Richard Henderson
1 sibling, 1 reply; 27+ messages in thread
From: Alex Bennée @ 2020-05-19 10:10 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> This includes *_is_any_nan, *_is_neg, *_is_inf, etc.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
As an aside do you think we'll see any benefit from rolling up the
classifications with the decomposed versions? I would hope the compiler
could drop the stuff it doesn't need but I guess we loose the ability to
inline in the target helpers?
> ---
> include/fpu/softfloat.h | 66 +++++++++++++++++-----------------
> fpu/softfloat-specialize.inc.c | 16 ++++-----
> 2 files changed, 41 insertions(+), 41 deletions(-)
>
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index 37217d9b9b..16ca697a73 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -235,31 +235,31 @@ float16 float16_sqrt(float16, float_status *status);
> FloatRelation float16_compare(float16, float16, float_status *status);
> FloatRelation float16_compare_quiet(float16, float16, float_status *status);
>
> -int float16_is_quiet_nan(float16, float_status *status);
> -int float16_is_signaling_nan(float16, float_status *status);
> +bool float16_is_quiet_nan(float16, float_status *status);
> +bool float16_is_signaling_nan(float16, float_status *status);
> float16 float16_silence_nan(float16, float_status *status);
>
> -static inline int float16_is_any_nan(float16 a)
> +static inline bool float16_is_any_nan(float16 a)
> {
> return ((float16_val(a) & ~0x8000) > 0x7c00);
> }
>
> -static inline int float16_is_neg(float16 a)
> +static inline bool float16_is_neg(float16 a)
> {
> return float16_val(a) >> 15;
> }
>
> -static inline int float16_is_infinity(float16 a)
> +static inline bool float16_is_infinity(float16 a)
> {
> return (float16_val(a) & 0x7fff) == 0x7c00;
> }
>
> -static inline int float16_is_zero(float16 a)
> +static inline bool float16_is_zero(float16 a)
> {
> return (float16_val(a) & 0x7fff) == 0;
> }
>
> -static inline int float16_is_zero_or_denormal(float16 a)
> +static inline bool float16_is_zero_or_denormal(float16 a)
> {
> return (float16_val(a) & 0x7c00) == 0;
> }
> @@ -351,8 +351,8 @@ float32 float32_minnum(float32, float32, float_status *status);
> float32 float32_maxnum(float32, float32, float_status *status);
> float32 float32_minnummag(float32, float32, float_status *status);
> float32 float32_maxnummag(float32, float32, float_status *status);
> -int float32_is_quiet_nan(float32, float_status *status);
> -int float32_is_signaling_nan(float32, float_status *status);
> +bool float32_is_quiet_nan(float32, float_status *status);
> +bool float32_is_signaling_nan(float32, float_status *status);
> float32 float32_silence_nan(float32, float_status *status);
> float32 float32_scalbn(float32, int, float_status *status);
>
> @@ -372,27 +372,27 @@ static inline float32 float32_chs(float32 a)
> return make_float32(float32_val(a) ^ 0x80000000);
> }
>
> -static inline int float32_is_infinity(float32 a)
> +static inline bool float32_is_infinity(float32 a)
> {
> return (float32_val(a) & 0x7fffffff) == 0x7f800000;
> }
>
> -static inline int float32_is_neg(float32 a)
> +static inline bool float32_is_neg(float32 a)
> {
> return float32_val(a) >> 31;
> }
>
> -static inline int float32_is_zero(float32 a)
> +static inline bool float32_is_zero(float32 a)
> {
> return (float32_val(a) & 0x7fffffff) == 0;
> }
>
> -static inline int float32_is_any_nan(float32 a)
> +static inline bool float32_is_any_nan(float32 a)
> {
> return ((float32_val(a) & ~(1 << 31)) > 0x7f800000UL);
> }
>
> -static inline int float32_is_zero_or_denormal(float32 a)
> +static inline bool float32_is_zero_or_denormal(float32 a)
> {
> return (float32_val(a) & 0x7f800000) == 0;
> }
> @@ -540,8 +540,8 @@ float64 float64_minnum(float64, float64, float_status *status);
> float64 float64_maxnum(float64, float64, float_status *status);
> float64 float64_minnummag(float64, float64, float_status *status);
> float64 float64_maxnummag(float64, float64, float_status *status);
> -int float64_is_quiet_nan(float64 a, float_status *status);
> -int float64_is_signaling_nan(float64, float_status *status);
> +bool float64_is_quiet_nan(float64 a, float_status *status);
> +bool float64_is_signaling_nan(float64, float_status *status);
> float64 float64_silence_nan(float64, float_status *status);
> float64 float64_scalbn(float64, int, float_status *status);
>
> @@ -561,27 +561,27 @@ static inline float64 float64_chs(float64 a)
> return make_float64(float64_val(a) ^ 0x8000000000000000LL);
> }
>
> -static inline int float64_is_infinity(float64 a)
> +static inline bool float64_is_infinity(float64 a)
> {
> return (float64_val(a) & 0x7fffffffffffffffLL ) == 0x7ff0000000000000LL;
> }
>
> -static inline int float64_is_neg(float64 a)
> +static inline bool float64_is_neg(float64 a)
> {
> return float64_val(a) >> 63;
> }
>
> -static inline int float64_is_zero(float64 a)
> +static inline bool float64_is_zero(float64 a)
> {
> return (float64_val(a) & 0x7fffffffffffffffLL) == 0;
> }
>
> -static inline int float64_is_any_nan(float64 a)
> +static inline bool float64_is_any_nan(float64 a)
> {
> return ((float64_val(a) & ~(1ULL << 63)) > 0x7ff0000000000000ULL);
> }
>
> -static inline int float64_is_zero_or_denormal(float64 a)
> +static inline bool float64_is_zero_or_denormal(float64 a)
> {
> return (float64_val(a) & 0x7ff0000000000000LL) == 0;
> }
> @@ -708,7 +708,7 @@ static inline floatx80 floatx80_chs(floatx80 a)
> return a;
> }
>
> -static inline int floatx80_is_infinity(floatx80 a)
> +static inline bool floatx80_is_infinity(floatx80 a)
> {
> #if defined(TARGET_M68K)
> return (a.high & 0x7fff) == floatx80_infinity.high && !(a.low << 1);
> @@ -718,22 +718,22 @@ static inline int floatx80_is_infinity(floatx80 a)
> #endif
> }
>
> -static inline int floatx80_is_neg(floatx80 a)
> +static inline bool floatx80_is_neg(floatx80 a)
> {
> return a.high >> 15;
> }
>
> -static inline int floatx80_is_zero(floatx80 a)
> +static inline bool floatx80_is_zero(floatx80 a)
> {
> return (a.high & 0x7fff) == 0 && a.low == 0;
> }
>
> -static inline int floatx80_is_zero_or_denormal(floatx80 a)
> +static inline bool floatx80_is_zero_or_denormal(floatx80 a)
> {
> return (a.high & 0x7fff) == 0;
> }
>
> -static inline int floatx80_is_any_nan(floatx80 a)
> +static inline bool floatx80_is_any_nan(floatx80 a)
> {
> return ((a.high & 0x7fff) == 0x7fff) && (a.low<<1);
> }
> @@ -936,8 +936,8 @@ float128 float128_rem(float128, float128, float_status *status);
> float128 float128_sqrt(float128, float_status *status);
> FloatRelation float128_compare(float128, float128, float_status *status);
> FloatRelation float128_compare_quiet(float128, float128, float_status *status);
> -int float128_is_quiet_nan(float128, float_status *status);
> -int float128_is_signaling_nan(float128, float_status *status);
> +bool float128_is_quiet_nan(float128, float_status *status);
> +bool float128_is_signaling_nan(float128, float_status *status);
> float128 float128_silence_nan(float128, float_status *status);
> float128 float128_scalbn(float128, int, float_status *status);
>
> @@ -953,22 +953,22 @@ static inline float128 float128_chs(float128 a)
> return a;
> }
>
> -static inline int float128_is_infinity(float128 a)
> +static inline bool float128_is_infinity(float128 a)
> {
> return (a.high & 0x7fffffffffffffffLL) == 0x7fff000000000000LL && a.low == 0;
> }
>
> -static inline int float128_is_neg(float128 a)
> +static inline bool float128_is_neg(float128 a)
> {
> return a.high >> 63;
> }
>
> -static inline int float128_is_zero(float128 a)
> +static inline bool float128_is_zero(float128 a)
> {
> return (a.high & 0x7fffffffffffffffLL) == 0 && a.low == 0;
> }
>
> -static inline int float128_is_zero_or_denormal(float128 a)
> +static inline bool float128_is_zero_or_denormal(float128 a)
> {
> return (a.high & 0x7fff000000000000LL) == 0;
> }
> @@ -983,7 +983,7 @@ static inline bool float128_is_denormal(float128 a)
> return float128_is_zero_or_denormal(a) && !float128_is_zero(a);
> }
>
> -static inline int float128_is_any_nan(float128 a)
> +static inline bool float128_is_any_nan(float128 a)
> {
> return ((a.high >> 48) & 0x7fff) == 0x7fff &&
> ((a.low != 0) || ((a.high & 0xffffffffffffLL) != 0));
> diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c
> index 025ee4f991..44f5b661f8 100644
> --- a/fpu/softfloat-specialize.inc.c
> +++ b/fpu/softfloat-specialize.inc.c
> @@ -245,7 +245,7 @@ typedef struct {
> | NaN; otherwise returns 0.
> *----------------------------------------------------------------------------*/
>
> -int float16_is_quiet_nan(float16 a_, float_status *status)
> +bool float16_is_quiet_nan(float16 a_, float_status *status)
> {
> #ifdef NO_SIGNALING_NANS
> return float16_is_any_nan(a_);
> @@ -264,7 +264,7 @@ int float16_is_quiet_nan(float16 a_, float_status *status)
> | NaN; otherwise returns 0.
> *----------------------------------------------------------------------------*/
>
> -int float16_is_signaling_nan(float16 a_, float_status *status)
> +bool float16_is_signaling_nan(float16 a_, float_status *status)
> {
> #ifdef NO_SIGNALING_NANS
> return 0;
> @@ -283,7 +283,7 @@ int float16_is_signaling_nan(float16 a_, float_status *status)
> | NaN; otherwise returns 0.
> *----------------------------------------------------------------------------*/
>
> -int float32_is_quiet_nan(float32 a_, float_status *status)
> +bool float32_is_quiet_nan(float32 a_, float_status *status)
> {
> #ifdef NO_SIGNALING_NANS
> return float32_is_any_nan(a_);
> @@ -302,7 +302,7 @@ int float32_is_quiet_nan(float32 a_, float_status *status)
> | NaN; otherwise returns 0.
> *----------------------------------------------------------------------------*/
>
> -int float32_is_signaling_nan(float32 a_, float_status *status)
> +bool float32_is_signaling_nan(float32 a_, float_status *status)
> {
> #ifdef NO_SIGNALING_NANS
> return 0;
> @@ -637,7 +637,7 @@ static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
> | NaN; otherwise returns 0.
> *----------------------------------------------------------------------------*/
>
> -int float64_is_quiet_nan(float64 a_, float_status *status)
> +bool float64_is_quiet_nan(float64 a_, float_status *status)
> {
> #ifdef NO_SIGNALING_NANS
> return float64_is_any_nan(a_);
> @@ -657,7 +657,7 @@ int float64_is_quiet_nan(float64 a_, float_status *status)
> | NaN; otherwise returns 0.
> *----------------------------------------------------------------------------*/
>
> -int float64_is_signaling_nan(float64 a_, float_status *status)
> +bool float64_is_signaling_nan(float64 a_, float_status *status)
> {
> #ifdef NO_SIGNALING_NANS
> return 0;
> @@ -939,7 +939,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status)
> | NaN; otherwise returns 0.
> *----------------------------------------------------------------------------*/
>
> -int float128_is_quiet_nan(float128 a, float_status *status)
> +bool float128_is_quiet_nan(float128 a, float_status *status)
> {
> #ifdef NO_SIGNALING_NANS
> return float128_is_any_nan(a);
> @@ -959,7 +959,7 @@ int float128_is_quiet_nan(float128 a, float_status *status)
> | signaling NaN; otherwise returns 0.
> *----------------------------------------------------------------------------*/
>
> -int float128_is_signaling_nan(float128 a, float_status *status)
> +bool float128_is_signaling_nan(float128 a, float_status *status)
> {
> #ifdef NO_SIGNALING_NANS
> return 0;
--
Alex Bennée
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 10/10] softfloat: Return bool from all classification predicates
2020-05-19 10:10 ` Alex Bennée
@ 2020-05-19 15:47 ` Richard Henderson
0 siblings, 0 replies; 27+ messages in thread
From: Richard Henderson @ 2020-05-19 15:47 UTC (permalink / raw)
To: Alex Bennée; +Cc: qemu-devel
On 5/19/20 3:10 AM, Alex Bennée wrote:
>
> Richard Henderson <richard.henderson@linaro.org> writes:
>
>> This includes *_is_any_nan, *_is_neg, *_is_inf, etc.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>
> As an aside do you think we'll see any benefit from rolling up the
> classifications with the decomposed versions? I would hope the compiler
> could drop the stuff it doesn't need but I guess we loose the ability to
> inline in the target helpers?
I think these classification macros are simple enough that we'd lose if we
tried to merge it with the decompose stuff.
r~
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2020-05-19 15:48 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
2020-05-15 19:01 ` [PATCH 01/10] softfloat: Use post test for floatN_mul Richard Henderson
2020-05-19 8:48 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 02/10] softfloat: Replace flag with bool Richard Henderson
2020-05-16 5:27 ` Philippe Mathieu-Daudé
2020-05-19 8:53 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 03/10] softfloat: Change tininess_before_rounding to bool Richard Henderson
2020-05-19 8:55 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 04/10] softfloat: Name rounding mode enum Richard Henderson
2020-05-16 5:30 ` Philippe Mathieu-Daudé
2020-05-19 9:06 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 05/10] softfloat: Name compare relation enum Richard Henderson
2020-05-16 5:32 ` Philippe Mathieu-Daudé
2020-05-19 9:08 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 06/10] softfloat: Inline float32 compare specializations Richard Henderson
2020-05-19 9:38 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 07/10] softfloat: Inline float64 " Richard Henderson
2020-05-19 9:41 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 08/10] softfloat: Inline float128 " Richard Henderson
2020-05-19 9:41 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 09/10] softfloat: Inline floatx80 " Richard Henderson
2020-05-19 9:41 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 10/10] softfloat: Return bool from all classification predicates Richard Henderson
2020-05-16 5:33 ` Philippe Mathieu-Daudé
2020-05-19 10:10 ` Alex Bennée
2020-05-19 15:47 ` Richard Henderson
2020-05-16 10:58 ` [PATCH 00/10] softfloat: misc cleanups no-reply
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.