All of lore.kernel.org
 help / color / mirror / Atom feed
From: Pratyush Yadav <p.yadav@ti.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	Sekhar Nori <nsekhar@ti.com>,
	Mason Yang <masonccyang@mxic.com.tw>
Subject: Re: [PATCH v6 04/19] spi: spi-mem: allow specifying a command's extension
Date: Fri, 22 May 2020 23:53:05 +0530	[thread overview]
Message-ID: <20200522182257.wneqsmfm22farzus@ti.com> (raw)
In-Reply-To: <20200521202256.5816eb32@collabora.com>

Hi Boris,

On 21/05/20 08:22PM, Boris Brezillon wrote:
> On Wed, 20 May 2020 22:00:38 +0530
> Pratyush Yadav <p.yadav@ti.com> wrote:
> 
> As mentioned in one of my previous review, you should patch the mxic
> driver before extending the opcode field:
> 
> --->8---
> diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
> index 69491f3a515d..c3f4136a7c1d 100644
> --- a/drivers/spi/spi-mxic.c
> +++ b/drivers/spi/spi-mxic.c
> @@ -356,6 +356,7 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
>         int nio = 1, i, ret;
>         u32 ss_ctrl;
>         u8 addr[8];
> +       u8 cmd[2];

Regarding your comment about bisect-ability, how about I change this to:
  
  u8 cmd[sizeof(op->cmd.opcode)];

and put this patch before the change to 2-byte opcodes. This should also 
make it resistent to further changes in opcode size. Does that sound 
like a sane idea?
  
>         ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz);
>         if (ret)
> @@ -393,7 +394,10 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
>         writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
>                mxic->regs + HC_CFG);
>  
> -       ret = mxic_spi_data_xfer(mxic, &op->cmd.opcode, NULL, 1);
> +       for (i = 0; i < op->cmd.nbytes; i++)
> +               cmd[i] = op->cmd.opcode >> (8 * (op->cmd.nbytes - i - 1));
> +
> +       ret = mxic_spi_data_xfer(mxic, cmd, NULL, op->cmd.nbytes);
>         if (ret)
>                 goto out;
>  

-- 
Regards,
Pratyush Yadav
Texas Instruments India

WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Mason Yang <masonccyang@mxic.com.tw>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Richard Weinberger <richard@nod.at>, Sekhar Nori <nsekhar@ti.com>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	linux-kernel@vger.kernel.org,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Mark Brown <broonie@kernel.org>,
	linux-mtd@lists.infradead.org,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-mediatek@lists.infradead.org, linux-spi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 04/19] spi: spi-mem: allow specifying a command's extension
Date: Fri, 22 May 2020 23:53:05 +0530	[thread overview]
Message-ID: <20200522182257.wneqsmfm22farzus@ti.com> (raw)
In-Reply-To: <20200521202256.5816eb32@collabora.com>

Hi Boris,

On 21/05/20 08:22PM, Boris Brezillon wrote:
> On Wed, 20 May 2020 22:00:38 +0530
> Pratyush Yadav <p.yadav@ti.com> wrote:
> 
> As mentioned in one of my previous review, you should patch the mxic
> driver before extending the opcode field:
> 
> --->8---
> diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
> index 69491f3a515d..c3f4136a7c1d 100644
> --- a/drivers/spi/spi-mxic.c
> +++ b/drivers/spi/spi-mxic.c
> @@ -356,6 +356,7 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
>         int nio = 1, i, ret;
>         u32 ss_ctrl;
>         u8 addr[8];
> +       u8 cmd[2];

Regarding your comment about bisect-ability, how about I change this to:
  
  u8 cmd[sizeof(op->cmd.opcode)];

and put this patch before the change to 2-byte opcodes. This should also 
make it resistent to further changes in opcode size. Does that sound 
like a sane idea?
  
>         ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz);
>         if (ret)
> @@ -393,7 +394,10 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
>         writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
>                mxic->regs + HC_CFG);
>  
> -       ret = mxic_spi_data_xfer(mxic, &op->cmd.opcode, NULL, 1);
> +       for (i = 0; i < op->cmd.nbytes; i++)
> +               cmd[i] = op->cmd.opcode >> (8 * (op->cmd.nbytes - i - 1));
> +
> +       ret = mxic_spi_data_xfer(mxic, cmd, NULL, op->cmd.nbytes);
>         if (ret)
>                 goto out;
>  

-- 
Regards,
Pratyush Yadav
Texas Instruments India

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Mason Yang <masonccyang@mxic.com.tw>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Richard Weinberger <richard@nod.at>, Sekhar Nori <nsekhar@ti.com>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	linux-kernel@vger.kernel.org,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Mark Brown <broonie@kernel.org>,
	linux-mtd@lists.infradead.org,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-mediatek@lists.infradead.org, linux-spi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 04/19] spi: spi-mem: allow specifying a command's extension
Date: Fri, 22 May 2020 23:53:05 +0530	[thread overview]
Message-ID: <20200522182257.wneqsmfm22farzus@ti.com> (raw)
In-Reply-To: <20200521202256.5816eb32@collabora.com>

Hi Boris,

On 21/05/20 08:22PM, Boris Brezillon wrote:
> On Wed, 20 May 2020 22:00:38 +0530
> Pratyush Yadav <p.yadav@ti.com> wrote:
> 
> As mentioned in one of my previous review, you should patch the mxic
> driver before extending the opcode field:
> 
> --->8---
> diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
> index 69491f3a515d..c3f4136a7c1d 100644
> --- a/drivers/spi/spi-mxic.c
> +++ b/drivers/spi/spi-mxic.c
> @@ -356,6 +356,7 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
>         int nio = 1, i, ret;
>         u32 ss_ctrl;
>         u8 addr[8];
> +       u8 cmd[2];

Regarding your comment about bisect-ability, how about I change this to:
  
  u8 cmd[sizeof(op->cmd.opcode)];

and put this patch before the change to 2-byte opcodes. This should also 
make it resistent to further changes in opcode size. Does that sound 
like a sane idea?
  
>         ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz);
>         if (ret)
> @@ -393,7 +394,10 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
>         writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
>                mxic->regs + HC_CFG);
>  
> -       ret = mxic_spi_data_xfer(mxic, &op->cmd.opcode, NULL, 1);
> +       for (i = 0; i < op->cmd.nbytes; i++)
> +               cmd[i] = op->cmd.opcode >> (8 * (op->cmd.nbytes - i - 1));
> +
> +       ret = mxic_spi_data_xfer(mxic, cmd, NULL, op->cmd.nbytes);
>         if (ret)
>                 goto out;
>  

-- 
Regards,
Pratyush Yadav
Texas Instruments India

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Mason Yang <masonccyang@mxic.com.tw>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Richard Weinberger <richard@nod.at>, Sekhar Nori <nsekhar@ti.com>,
	linux-kernel@vger.kernel.org,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Mark Brown <broonie@kernel.org>,
	linux-mtd@lists.infradead.org,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-mediatek@lists.infradead.org, linux-spi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 04/19] spi: spi-mem: allow specifying a command's extension
Date: Fri, 22 May 2020 23:53:05 +0530	[thread overview]
Message-ID: <20200522182257.wneqsmfm22farzus@ti.com> (raw)
In-Reply-To: <20200521202256.5816eb32@collabora.com>

Hi Boris,

On 21/05/20 08:22PM, Boris Brezillon wrote:
> On Wed, 20 May 2020 22:00:38 +0530
> Pratyush Yadav <p.yadav@ti.com> wrote:
> 
> As mentioned in one of my previous review, you should patch the mxic
> driver before extending the opcode field:
> 
> --->8---
> diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
> index 69491f3a515d..c3f4136a7c1d 100644
> --- a/drivers/spi/spi-mxic.c
> +++ b/drivers/spi/spi-mxic.c
> @@ -356,6 +356,7 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
>         int nio = 1, i, ret;
>         u32 ss_ctrl;
>         u8 addr[8];
> +       u8 cmd[2];

Regarding your comment about bisect-ability, how about I change this to:
  
  u8 cmd[sizeof(op->cmd.opcode)];

and put this patch before the change to 2-byte opcodes. This should also 
make it resistent to further changes in opcode size. Does that sound 
like a sane idea?
  
>         ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz);
>         if (ret)
> @@ -393,7 +394,10 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
>         writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
>                mxic->regs + HC_CFG);
>  
> -       ret = mxic_spi_data_xfer(mxic, &op->cmd.opcode, NULL, 1);
> +       for (i = 0; i < op->cmd.nbytes; i++)
> +               cmd[i] = op->cmd.opcode >> (8 * (op->cmd.nbytes - i - 1));
> +
> +       ret = mxic_spi_data_xfer(mxic, cmd, NULL, op->cmd.nbytes);
>         if (ret)
>                 goto out;
>  

-- 
Regards,
Pratyush Yadav
Texas Instruments India

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-05-22 18:23 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-20 16:30 [PATCH v6 00/19] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-05-20 16:30 ` Pratyush Yadav
2020-05-20 16:30 ` Pratyush Yadav
2020-05-20 16:30 ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 01/19] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 02/19] spi: atmel-quadspi: reject DTR ops Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 03/19] spi: spi-mtk-nor: " Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 04/19] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-21 18:22   ` Boris Brezillon
2020-05-21 18:22     ` Boris Brezillon
2020-05-21 18:22     ` Boris Brezillon
2020-05-21 18:22     ` Boris Brezillon
2020-05-21 19:41     ` Pratyush Yadav
2020-05-21 19:41       ` Pratyush Yadav
2020-05-21 19:41       ` Pratyush Yadav
2020-05-21 19:41       ` Pratyush Yadav
2020-05-21 20:03       ` Pratyush Yadav
2020-05-21 20:03         ` Pratyush Yadav
2020-05-21 20:03         ` Pratyush Yadav
2020-05-21 20:03         ` Pratyush Yadav
2020-05-21 20:16         ` Boris Brezillon
2020-05-21 20:16           ` Boris Brezillon
2020-05-21 20:16           ` Boris Brezillon
2020-05-21 20:16           ` Boris Brezillon
2020-05-22 18:23     ` Pratyush Yadav [this message]
2020-05-22 18:23       ` Pratyush Yadav
2020-05-22 18:23       ` Pratyush Yadav
2020-05-22 18:23       ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 05/19] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 06/19] mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 07/19] mtd: spi-nor: sfdp: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 08/19] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 09/19] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 10/19] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 11/19] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 12/19] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 13/19] mtd: spi-nor: sfdp: do not make invalid quad enable fatal Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 14/19] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 15/19] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 16/19] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 17/19] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 18/19] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30 ` [PATCH v6 19/19] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-20 16:30   ` Pratyush Yadav
2020-05-21 16:39 ` [PATCH v6 00/19] mtd: spi-nor: add xSPI Octal DTR support Mark Brown
2020-05-21 16:39   ` Mark Brown
2020-05-21 16:39   ` Mark Brown
2020-05-21 16:39   ` Mark Brown
2020-05-21 18:05   ` Pratyush Yadav
2020-05-21 18:05     ` Pratyush Yadav
2020-05-21 18:05     ` Pratyush Yadav
2020-05-21 18:05     ` Pratyush Yadav

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200522182257.wneqsmfm22farzus@ti.com \
    --to=p.yadav@ti.com \
    --cc=alexandre.belloni@bootlin.com \
    --cc=boris.brezillon@collabora.com \
    --cc=broonie@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=ludovic.desroches@microchip.com \
    --cc=masonccyang@mxic.com.tw \
    --cc=matthias.bgg@gmail.com \
    --cc=miquel.raynal@bootlin.com \
    --cc=nicolas.ferre@microchip.com \
    --cc=nsekhar@ti.com \
    --cc=richard@nod.at \
    --cc=tudor.ambarus@microchip.com \
    --cc=vigneshr@ti.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.