From: Rob Herring <robh@kernel.org> To: "Ramuthevar,Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com> Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, arnd@arndb.de, brendanhiggins@google.com, tglx@linutronix.de, boris.brezillon@collabora.com, anders.roxell@linaro.org, masonccyang@mxic.com.tw, linux-mips@vger.kernel.org, hauke.mehrtens@intel.com, andriy.shevchenko@intel.com, qi-ming.wu@intel.com, cheol.yong.kim@intel.com Subject: Re: [RESENDPATCH v8 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC Date: Tue, 26 May 2020 14:43:06 -0600 [thread overview] Message-ID: <20200526204306.GA224630@bogus> (raw) In-Reply-To: <20200520000621.49152-2-vadivel.muruganx.ramuthevar@linux.intel.com> On Wed, May 20, 2020 at 08:06:20AM +0800, Ramuthevar,Vadivel MuruganX wrote: > From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > > Add YAML file for dt-bindings to support NAND Flash Controller > on Intel's Lightning Mountain SoC. > > Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > --- > .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 91 ++++++++++++++++++++++ > 1 file changed, 91 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > > diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > new file mode 100644 > index 000000000000..cd4e983a449e > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > @@ -0,0 +1,91 @@ > +# SPDX-License-Identifier: GPL-2.0 Still not dual licensed. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel LGM SoC NAND Controller Device Tree Bindings > + > +allOf: > + - $ref: "nand-controller.yaml" > + > +maintainers: > + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > + > +properties: > + compatible: > + const: intel,lgm-nand-controller Still doesn't match the example. And the example will fail when it does. > + > + reg: > + items: > + - description: ebunand registers > + - description: hsnand registers > + - description: nand_cs0 external flash access > + - description: nand_cs1 external flash access > + - description: addr_sel0 memory region enable and access > + - description: addr_sel1 memory region enable and access reg-names? > + > + clocks: > + maxItems: 1 > + > + dmas: > + maxItems: 2 > + > + dma-names: > + items: > + - const: tx > + - const: rx > + > +patternProperties: > + "^nand@[a-f0-9]+$": > + type: object > + properties: > + reg: > + minimum: 0 > + maximum: 7 > + > + nand-ecc-mode: true > + > + nand-ecc-algo: > + const: hw > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names Not documented or should be dropped. > + - dmas > + - dma-names > + > +additionalProperties: false > + > +examples: > + - | > + nand-controller@e0f00000 { > + compatible = "intel,lgm-nand"; > + reg = <0xe0f00000 0x100>, > + <0xe1000000 0x300>, > + <0xe1400000 0x8000>, > + <0xe1c00000 0x1000>, > + <0x17400000 0x4>, > + <0x17c00000 0x4>; > + reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1", > + "addr_sel0","addr_sel1"; Not documented. And needs a space after the ','. > + clocks = <&cgu0 125>; > + dmas = <&dma0 8>, <&dma0 9>; > + dma-names = "tx", "rx"; > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <1>; Should be removed? > + > + nand@0 { > + reg = <0>; > + nand-on-flash-bbt; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + }; > + > +... > -- > 2.11.0 >
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> To: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com> Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org, qi-ming.wu@intel.com, anders.roxell@linaro.org, vigneshr@ti.com, arnd@arndb.de, hauke.mehrtens@intel.com, richard@nod.at, brendanhiggins@google.com, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, boris.brezillon@collabora.com, linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com, tglx@linutronix.de, masonccyang@mxic.com.tw, andriy.shevchenko@intel.com Subject: Re: [RESENDPATCH v8 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC Date: Tue, 26 May 2020 14:43:06 -0600 [thread overview] Message-ID: <20200526204306.GA224630@bogus> (raw) In-Reply-To: <20200520000621.49152-2-vadivel.muruganx.ramuthevar@linux.intel.com> On Wed, May 20, 2020 at 08:06:20AM +0800, Ramuthevar,Vadivel MuruganX wrote: > From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > > Add YAML file for dt-bindings to support NAND Flash Controller > on Intel's Lightning Mountain SoC. > > Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > --- > .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 91 ++++++++++++++++++++++ > 1 file changed, 91 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > > diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > new file mode 100644 > index 000000000000..cd4e983a449e > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > @@ -0,0 +1,91 @@ > +# SPDX-License-Identifier: GPL-2.0 Still not dual licensed. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel LGM SoC NAND Controller Device Tree Bindings > + > +allOf: > + - $ref: "nand-controller.yaml" > + > +maintainers: > + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > + > +properties: > + compatible: > + const: intel,lgm-nand-controller Still doesn't match the example. And the example will fail when it does. > + > + reg: > + items: > + - description: ebunand registers > + - description: hsnand registers > + - description: nand_cs0 external flash access > + - description: nand_cs1 external flash access > + - description: addr_sel0 memory region enable and access > + - description: addr_sel1 memory region enable and access reg-names? > + > + clocks: > + maxItems: 1 > + > + dmas: > + maxItems: 2 > + > + dma-names: > + items: > + - const: tx > + - const: rx > + > +patternProperties: > + "^nand@[a-f0-9]+$": > + type: object > + properties: > + reg: > + minimum: 0 > + maximum: 7 > + > + nand-ecc-mode: true > + > + nand-ecc-algo: > + const: hw > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names Not documented or should be dropped. > + - dmas > + - dma-names > + > +additionalProperties: false > + > +examples: > + - | > + nand-controller@e0f00000 { > + compatible = "intel,lgm-nand"; > + reg = <0xe0f00000 0x100>, > + <0xe1000000 0x300>, > + <0xe1400000 0x8000>, > + <0xe1c00000 0x1000>, > + <0x17400000 0x4>, > + <0x17c00000 0x4>; > + reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1", > + "addr_sel0","addr_sel1"; Not documented. And needs a space after the ','. > + clocks = <&cgu0 125>; > + dmas = <&dma0 8>, <&dma0 9>; > + dma-names = "tx", "rx"; > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <1>; Should be removed? > + > + nand@0 { > + reg = <0>; > + nand-on-flash-bbt; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + }; > + > +... > -- > 2.11.0 > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-05-26 20:43 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-20 0:06 [RESENDPATCH v8 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX 2020-05-20 0:06 ` Ramuthevar, Vadivel MuruganX 2020-05-20 0:06 ` [RESENDPATCH v8 1/2] dt-bindings: mtd: Add Nand Flash Controller support for " Ramuthevar,Vadivel MuruganX 2020-05-20 0:06 ` Ramuthevar, Vadivel MuruganX 2020-05-26 20:43 ` Rob Herring [this message] 2020-05-26 20:43 ` Rob Herring 2020-05-28 2:58 ` Ramuthevar, Vadivel MuruganX 2020-05-28 2:58 ` Ramuthevar, Vadivel MuruganX 2020-05-20 0:06 ` [RESENDPATCH v8 2/2] mtd: rawnand: Add NAND controller support on " Ramuthevar,Vadivel MuruganX 2020-05-20 0:06 ` Ramuthevar, Vadivel MuruganX
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