[U-boot,0/2] Enable mt7531 switch support for MT7629

[U-boot,0/2] Enable mt7531 switch support for MT7629

[MarkLee]

This patch series enable MT7629 sgmii mode with mt7531 switch support,
	1. enable mt7629 sgmii mode support in mediatek eth driver
	2. enable mt7629 ethernet dts node with sgmii mode and mt7531
	   switch support

MarkLee (2):
  eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver
  arm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629

 arch/arm/dts/mt7629-rfb.dts | 12 +++++++-----
 drivers/net/mtk_eth.h       |  5 +++++
 2 files changed, 12 insertions(+), 5 deletions(-)

-- 
2.17.1

[U-boot, 1/2] eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver

[MarkLee]

The sgmii mode init flow is almost the same for all mediatek SoC, the
only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
for old chip(mt7622) but changed to 0x128 for newer chip(mt7629 and
the following chips).

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
---
 drivers/net/mtk_eth.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h
index f2940c9996..3c85eab91a 100644
--- a/drivers/net/mtk_eth.h
+++ b/drivers/net/mtk_eth.h
@@ -44,7 +44,12 @@
 #define SGMSYS_QPHY_PWR_STATE_CTRL	0xe8
 #define SGMII_PHYA_PWD			BIT(4)
 
+#if defined(CONFIG_TARGET_MT7622)
 #define SGMSYS_GEN2_SPEED		0x2028
+#else
+#define SGMSYS_GEN2_SPEED		0x128
+#endif
+
 #define SGMSYS_SPEED_2500		BIT(2)
 
 /* Frame Engine Registers */
-- 
2.17.1

[U-boot, 2/2] arm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629

[MarkLee]

This patch enable sgmii mode and mt7531 switch support 
in mt7629 ethernet dts node.

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
---
 arch/arm/dts/mt7629-rfb.dts | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts
index 687fe1c029..5864f5551b 100644
--- a/arch/arm/dts/mt7629-rfb.dts
+++ b/arch/arm/dts/mt7629-rfb.dts
@@ -24,12 +24,14 @@
 
 &eth {
 	status = "okay";
-	mediatek,gmac-id = <1>;
-	phy-mode = "gmii";
-	phy-handle = <&phy0>;
+	mediatek,gmac-id = <0>;
+	phy-mode = "sgmii";
+	mediatek,switch = "mt7531";
+	reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
 
-	phy0: ethernet-phy at 0 {
-		reg = <0>;
+	fixed-link {
+		speed = <1000>;
+		full-duplex;
 	};
 };
 
-- 
2.17.1

[U-boot,1/2] eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver

[Simon Glass]

Hi MarkLee,

On Wed, 27 May 2020 at 05:25, MarkLee <Mark-MC.Lee@mediatek.com> wrote:
>
> The sgmii mode init flow is almost the same for all mediatek SoC, the
> only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
> for old chip(mt7622) but changed to 0x128 for newer chip(mt7629 and
> the following chips).
>
> Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
> ---
>  drivers/net/mtk_eth.h | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h
> index f2940c9996..3c85eab91a 100644
> --- a/drivers/net/mtk_eth.h
> +++ b/drivers/net/mtk_eth.h
> @@ -44,7 +44,12 @@
>  #define SGMSYS_QPHY_PWR_STATE_CTRL     0xe8
>  #define SGMII_PHYA_PWD                 BIT(4)
>
> +#if defined(CONFIG_TARGET_MT7622)
>  #define SGMSYS_GEN2_SPEED              0x2028
> +#else
> +#define SGMSYS_GEN2_SPEED              0x128
> +#endif

You can't check #ifdefs in drivers. You should use a compatible
string, then device_get_driver_data() to decide what the value is
here.

Or if this is board-specific you could add it to the device-tree node
as a property, if it is in the binding.

Regards,
Simon

[U-boot,1/2] eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver

[Mark-MC.Lee]

On Sun, 2020-05-31 at 08:08 -0600, Simon Glass wrote:
> Hi MarkLee,
> 
> On Wed, 27 May 2020 at 05:25, MarkLee <Mark-MC.Lee@mediatek.com> wrote:
> >
> > The sgmii mode init flow is almost the same for all mediatek SoC, the
> > only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
> > for old chip(mt7622) but changed to 0x128 for newer chip(mt7629 and
> > the following chips).
> >
> > Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
> > ---
> >  drivers/net/mtk_eth.h | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h
> > index f2940c9996..3c85eab91a 100644
> > --- a/drivers/net/mtk_eth.h
> > +++ b/drivers/net/mtk_eth.h
> > @@ -44,7 +44,12 @@
> >  #define SGMSYS_QPHY_PWR_STATE_CTRL     0xe8
> >  #define SGMII_PHYA_PWD                 BIT(4)
> >
> > +#if defined(CONFIG_TARGET_MT7622)
> >  #define SGMSYS_GEN2_SPEED              0x2028
> > +#else
> > +#define SGMSYS_GEN2_SPEED              0x128
> > +#endif
> 
> You can't check #ifdefs in drivers. You should use a compatible
> string, then device_get_driver_data() to decide what the value is
> here.
Thanks for your review and suggestion, will change to use private data
from dts to decide the value in the following V2 patch.
> 
> Or if this is board-specific you could add it to the device-tree node
> as a property, if it is in the binding.
> 
> Regards,
> Simon