[avpatel:riscv_intc_clint_v1 11/13] drivers/clocksource/timer-clint.c:45:15: error: variable 'clint_ipi_ops' has initializer but incomplete type

* [avpatel:riscv_intc_clint_v1 11/13] drivers/clocksource/timer-clint.c:45:15: error: variable 'clint_ipi_ops' has initializer but incomplete type
@ 2020-06-01 12:23 kbuild test robot
  0 siblings, 0 replies; only message in thread
From: kbuild test robot @ 2020-06-01 12:23 UTC (permalink / raw)
  To: kbuild-all

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tree:   https://github.com/avpatel/linux.git riscv_intc_clint_v1
head:   c2e84ac094e37870f9f5bfb62b8c591e3eed38bb
commit: 810b9c3b9526c82964ce587f250e83d41dc14c36 [11/13] clocksource/drivers: Add CLINT driver
config: riscv-allnoconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout 810b9c3b9526c82964ce587f250e83d41dc14c36
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=riscv 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>

All errors (new ones prefixed by >>, old ones prefixed by <<):

>> drivers/clocksource/timer-clint.c:45:15: error: variable 'clint_ipi_ops' has initializer but incomplete type
45 | static struct riscv_ipi_ops clint_ipi_ops = {
|               ^~~~~~~~~~~~~
>> drivers/clocksource/timer-clint.c:46:3: error: 'struct riscv_ipi_ops' has no member named 'ipi_inject'
46 |  .ipi_inject = clint_send_ipi,
|   ^~~~~~~~~~
drivers/clocksource/timer-clint.c:46:16: warning: excess elements in struct initializer
46 |  .ipi_inject = clint_send_ipi,
|                ^~~~~~~~~~~~~~
drivers/clocksource/timer-clint.c:46:16: note: (near initialization for 'clint_ipi_ops')
>> drivers/clocksource/timer-clint.c:47:3: error: 'struct riscv_ipi_ops' has no member named 'ipi_clear'
47 |  .ipi_clear = clint_clear_ipi,
|   ^~~~~~~~~
drivers/clocksource/timer-clint.c:47:15: warning: excess elements in struct initializer
47 |  .ipi_clear = clint_clear_ipi,
|               ^~~~~~~~~~~~~~~
drivers/clocksource/timer-clint.c:47:15: note: (near initialization for 'clint_ipi_ops')
drivers/clocksource/timer-clint.c: In function 'clint_timer_init_dt':
>> drivers/clocksource/timer-clint.c:172:2: error: implicit declaration of function 'riscv_set_ipi_ops' [-Werror=implicit-function-declaration]
172 |  riscv_set_ipi_ops(&clint_ipi_ops);
|  ^~~~~~~~~~~~~~~~~
drivers/clocksource/timer-clint.c: At top level:
>> drivers/clocksource/timer-clint.c:45:29: error: storage size of 'clint_ipi_ops' isn't known
45 | static struct riscv_ipi_ops clint_ipi_ops = {
|                             ^~~~~~~~~~~~~
cc1: some warnings being treated as errors

vim +/clint_ipi_ops +45 drivers/clocksource/timer-clint.c

    44	
  > 45	static struct riscv_ipi_ops clint_ipi_ops = {
  > 46		.ipi_inject = clint_send_ipi,
  > 47		.ipi_clear = clint_clear_ipi,
    48	};
    49	
    50	#ifdef CONFIG_64BIT
    51	#define clint_get_cycles()	readq_relaxed(clint_time_val)
    52	#else
    53	#define clint_get_cycles()	readl_relaxed(clint_time_val)
    54	#define clint_get_cycles_hi()	readl_relaxed(((u32 *)clint_time_val) + 1)
    55	#endif
    56	
    57	#ifdef CONFIG_64BIT
    58	static u64 clint_get_cycles64(void)
    59	{
    60		return clint_get_cycles();
    61	}
    62	#else /* CONFIG_64BIT */
    63	static u64 clint_get_cycles64(void)
    64	{
    65		u32 hi, lo;
    66	
    67		do {
    68			hi = clint_get_cycles_hi();
    69			lo = clint_get_cycles();
    70		} while (hi != clint_get_cycles_hi());
    71	
    72		return ((u64)hi << 32) | lo;
    73	}
    74	#endif /* CONFIG_64BIT */
    75	
    76	static int clint_clock_next_event(unsigned long delta,
    77					   struct clock_event_device *ce)
    78	{
    79		void __iomem *r = clint_time_cmp +
    80				  cpuid_to_hartid_map(smp_processor_id());
    81	
    82		csr_set(CSR_IE, IE_TIE);
    83		writeq_relaxed(clint_get_cycles64() + delta, r);
    84		return 0;
    85	}
    86	
    87	static DEFINE_PER_CPU(struct clock_event_device, clint_clock_event) = {
    88		.name			= "clint_clockevent",
    89		.features		= CLOCK_EVT_FEAT_ONESHOT,
    90		.rating		= 100,
    91		.set_next_event	= clint_clock_next_event,
    92	};
    93	
    94	static u64 clint_rdtime(struct clocksource *cs)
    95	{
    96		return readq_relaxed(clint_time_val);
    97	}
    98	
    99	static u64 notrace clint_sched_clock(void)
   100	{
   101		return readq_relaxed(clint_time_val);
   102	}
   103	
   104	static struct clocksource clint_clocksource = {
   105		.name		= "clint_clocksource",
   106		.rating	= 300,
   107		.mask		= CLOCKSOURCE_MASK(64),
   108		.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
   109		.read		= clint_rdtime,
   110	};
   111	
   112	static int clint_timer_starting_cpu(unsigned int cpu)
   113	{
   114		struct clock_event_device *ce = per_cpu_ptr(&clint_clock_event, cpu);
   115	
   116		ce->cpumask = cpumask_of(cpu);
   117		clockevents_config_and_register(ce, clint_freq, 100, 0x7fffffff);
   118	
   119		csr_set(CSR_IE, IE_TIE);
   120		return 0;
   121	}
   122	
   123	static int clint_timer_dying_cpu(unsigned int cpu)
   124	{
   125		csr_clear(CSR_IE, IE_TIE);
   126		return 0;
   127	}
   128	
   129	/* called directly from the low-level interrupt handler */
   130	void riscv_timer_interrupt(void)
   131	{
   132		struct clock_event_device *evdev = this_cpu_ptr(&clint_clock_event);
   133	
   134		csr_clear(CSR_IE, IE_TIE);
   135		evdev->event_handler(evdev);
   136	}
   137	
   138	static int __init clint_timer_init_dt(struct device_node *np)
   139	{
   140		int rc;
   141		void __iomem *base;
   142	
   143		base = of_iomap(np, 0);
   144		if (!base) {
   145			pr_err("%pOFP: could not map registers\n", np);
   146			return -ENODEV;
   147		}
   148	
   149		clint_ipi_base = base + CLINT_IPI_OFF;
   150		clint_time_cmp = base + CLINT_TIME_CMP_OFF;
   151		clint_time_val = base + CLINT_TIME_VAL_OFF;
   152		clint_freq = riscv_timebase;
   153	
   154		rc = clocksource_register_hz(&clint_clocksource, clint_freq);
   155		if (rc) {
   156			iounmap(base);
   157			pr_err("%pOFP: clocksource register failed [%d]\n", np, rc);
   158			return rc;
   159		}
   160	
   161		sched_clock_register(clint_sched_clock, 64, clint_freq);
   162	
   163		rc = cpuhp_setup_state(CPUHP_AP_CLINT_TIMER_STARTING,
   164				 "clockevents/clint/timer:starting",
   165				 clint_timer_starting_cpu, clint_timer_dying_cpu);
   166		if (rc) {
   167			iounmap(base);
   168			pr_err("%pOFP: cpuhp setup state failed [%d]\n", np, rc);
   169			return rc;
   170		}
   171	
 > 172		riscv_set_ipi_ops(&clint_ipi_ops);
   173		clint_clear_ipi();
   174	
   175		pr_info("%pOFP: timer running at %ld Hz\n", np, clint_freq);
   176	
   177		return 0;
   178	}
   179	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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