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From: Jim Quinlan <james.quinlan@broadcom.com>
To: linux-pci@vger.kernel.org, Christoph Hellwig <hch@lst.de>,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	bcm-kernel-feedback-list@broadcom.com,
	james.quinlan@broadcom.com
Cc: Jim Quinlan <james.quinlan@broadcom.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Rob Herring <robh@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM
	BCM2711/BCM2835 ARM ARCHITECTURE),
	linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
	BCM2711/BCM2835 ARM ARCHITECTURE),
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v3 05/13] PCI: brcmstb: Add suspend and resume pm_ops
Date: Wed,  3 Jun 2020 15:20:37 -0400	[thread overview]
Message-ID: <20200603192058.35296-6-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20200603192058.35296-1-james.quinlan@broadcom.com>

From: Jim Quinlan <jquinlan@broadcom.com>

Broadcom Set-top (BrcmSTB) boards typically support S2, S3, and S5 suspend
and resume.  Now the PCIe driver may do so as well.

Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
---
 drivers/pci/controller/pcie-brcmstb.c | 49 +++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 7c707e483181..f444751e247c 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -979,6 +979,49 @@ static void brcm_pcie_turn_off(struct brcm_pcie *pcie)
 	brcm_pcie_bridge_sw_init_set(pcie, 1);
 }
 
+static int brcm_pcie_suspend(struct device *dev)
+{
+	struct brcm_pcie *pcie = dev_get_drvdata(dev);
+	int ret = 0;
+
+	brcm_pcie_turn_off(pcie);
+	clk_disable_unprepare(pcie->clk);
+
+	return ret;
+}
+
+static int brcm_pcie_resume(struct device *dev)
+{
+	struct brcm_pcie *pcie = dev_get_drvdata(dev);
+	void __iomem *base;
+	u32 tmp;
+	int ret;
+
+	base = pcie->base;
+	clk_prepare_enable(pcie->clk);
+
+	/* Take bridge out of reset so we can access the SERDES reg */
+	brcm_pcie_bridge_sw_init_set(pcie, 0);
+
+	/* SERDES_IDDQ = 0 */
+	tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
+	u32p_replace_bits(&tmp, 0,
+			  PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
+	writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
+
+	/* wait for serdes to be stable */
+	udelay(100);
+
+	ret = brcm_pcie_setup(pcie);
+	if (ret)
+		return ret;
+
+	if (pcie->msi)
+		brcm_msi_set_regs(pcie->msi);
+
+	return 0;
+}
+
 static void __brcm_pcie_remove(struct brcm_pcie *pcie)
 {
 	brcm_msi_remove(pcie);
@@ -1095,12 +1138,18 @@ static int brcm_pcie_probe(struct platform_device *pdev)
 
 MODULE_DEVICE_TABLE(of, brcm_pcie_match);
 
+static const struct dev_pm_ops brcm_pcie_pm_ops = {
+	.suspend_noirq = brcm_pcie_suspend,
+	.resume_noirq = brcm_pcie_resume,
+};
+
 static struct platform_driver brcm_pcie_driver = {
 	.probe = brcm_pcie_probe,
 	.remove = brcm_pcie_remove,
 	.driver = {
 		.name = "brcm-pcie",
 		.of_match_table = brcm_pcie_match,
+		.pm = &brcm_pcie_pm_ops,
 	},
 };
 module_platform_driver(brcm_pcie_driver);
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Jim Quinlan <james.quinlan@broadcom.com>
To: linux-pci@vger.kernel.org, Christoph Hellwig <hch@lst.de>,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	bcm-kernel-feedback-list@broadcom.com,
	james.quinlan@broadcom.com
Cc: Rob Herring <robh@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	open list <linux-kernel@vger.kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-rpi-kernel@lists.infradead.org>,
	Jim Quinlan <james.quinlan@broadcom.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v3 05/13] PCI: brcmstb: Add suspend and resume pm_ops
Date: Wed,  3 Jun 2020 15:20:37 -0400	[thread overview]
Message-ID: <20200603192058.35296-6-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20200603192058.35296-1-james.quinlan@broadcom.com>

From: Jim Quinlan <jquinlan@broadcom.com>

Broadcom Set-top (BrcmSTB) boards typically support S2, S3, and S5 suspend
and resume.  Now the PCIe driver may do so as well.

Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
---
 drivers/pci/controller/pcie-brcmstb.c | 49 +++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 7c707e483181..f444751e247c 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -979,6 +979,49 @@ static void brcm_pcie_turn_off(struct brcm_pcie *pcie)
 	brcm_pcie_bridge_sw_init_set(pcie, 1);
 }
 
+static int brcm_pcie_suspend(struct device *dev)
+{
+	struct brcm_pcie *pcie = dev_get_drvdata(dev);
+	int ret = 0;
+
+	brcm_pcie_turn_off(pcie);
+	clk_disable_unprepare(pcie->clk);
+
+	return ret;
+}
+
+static int brcm_pcie_resume(struct device *dev)
+{
+	struct brcm_pcie *pcie = dev_get_drvdata(dev);
+	void __iomem *base;
+	u32 tmp;
+	int ret;
+
+	base = pcie->base;
+	clk_prepare_enable(pcie->clk);
+
+	/* Take bridge out of reset so we can access the SERDES reg */
+	brcm_pcie_bridge_sw_init_set(pcie, 0);
+
+	/* SERDES_IDDQ = 0 */
+	tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
+	u32p_replace_bits(&tmp, 0,
+			  PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
+	writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
+
+	/* wait for serdes to be stable */
+	udelay(100);
+
+	ret = brcm_pcie_setup(pcie);
+	if (ret)
+		return ret;
+
+	if (pcie->msi)
+		brcm_msi_set_regs(pcie->msi);
+
+	return 0;
+}
+
 static void __brcm_pcie_remove(struct brcm_pcie *pcie)
 {
 	brcm_msi_remove(pcie);
@@ -1095,12 +1138,18 @@ static int brcm_pcie_probe(struct platform_device *pdev)
 
 MODULE_DEVICE_TABLE(of, brcm_pcie_match);
 
+static const struct dev_pm_ops brcm_pcie_pm_ops = {
+	.suspend_noirq = brcm_pcie_suspend,
+	.resume_noirq = brcm_pcie_resume,
+};
+
 static struct platform_driver brcm_pcie_driver = {
 	.probe = brcm_pcie_probe,
 	.remove = brcm_pcie_remove,
 	.driver = {
 		.name = "brcm-pcie",
 		.of_match_table = brcm_pcie_match,
+		.pm = &brcm_pcie_pm_ops,
 	},
 };
 module_platform_driver(brcm_pcie_driver);
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-06-03 19:21 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-03 19:20 [PATCH v3 00/13] PCI: brcmstb: enable PCIe for STB chips Jim Quinlan
2020-06-03 19:20 ` Jim Quinlan
2020-06-03 19:20 ` Jim Quinlan
2020-06-03 19:20 ` Jim Quinlan via iommu
2020-06-03 19:20 ` Jim Quinlan
2020-06-03 19:20 ` Jim Quinlan
2020-06-03 19:20 ` [PATCH v3 01/13] PCI: brcmstb: PCIE_BRCMSTB depends on ARCH_BRCMSTB Jim Quinlan
2020-06-03 19:20 ` [PATCH v3 02/13] ata: ahci_brcm: Fix use of BCM7216 reset controller Jim Quinlan
2020-06-04  2:57   ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 03/13] dt-bindings: PCI: Add bindings for more Brcmstb chips Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 19:20 ` [PATCH v3 04/13] PCI: brcmstb: Add bcm7278 reigister info Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:28   ` Florian Fainelli
2020-06-03 20:28     ` Florian Fainelli
2020-06-03 19:20 ` Jim Quinlan [this message]
2020-06-03 19:20   ` [PATCH v3 05/13] PCI: brcmstb: Add suspend and resume pm_ops Jim Quinlan
2020-06-03 20:24   ` Bjorn Helgaas
2020-06-03 20:24     ` Bjorn Helgaas
2020-06-03 19:20 ` [PATCH v3 06/13] PCI: brcmstb: Add bcm7278 PERST support Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:28   ` Florian Fainelli
2020-06-03 20:28     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 07/13] PCI: brcmstb: Add control of rescal reset Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:30   ` Florian Fainelli
2020-06-03 20:30     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 08/13] of: Include a dev param in of_dma_get_range() Jim Quinlan
2020-06-03 19:20 ` [PATCH v3 09/13] device core: Introduce multiple dma pfn offsets Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan via iommu
2020-06-04 11:04   ` Dan Carpenter
2020-06-04 11:04     ` Dan Carpenter
2020-06-04 11:04     ` Dan Carpenter
2020-06-04 13:48     ` Jim Quinlan
2020-06-04 13:48       ` Jim Quinlan
2020-06-04 13:48       ` Jim Quinlan via iommu
2020-06-04 14:18       ` Dan Carpenter
2020-06-04 14:18         ` Dan Carpenter
2020-06-04 14:18         ` Dan Carpenter
2020-06-04 14:43         ` Jim Quinlan
2020-06-04 14:43           ` Jim Quinlan
2020-06-04 14:43           ` Jim Quinlan via iommu
2020-06-04 13:53   ` Nicolas Saenz Julienne
2020-06-04 13:53     ` Nicolas Saenz Julienne
2020-06-04 13:53     ` Nicolas Saenz Julienne
2020-06-04 14:35     ` Jim Quinlan
2020-06-04 14:35       ` Jim Quinlan
2020-06-04 14:35       ` Jim Quinlan via iommu
2020-06-04 15:05       ` Andy Shevchenko
2020-06-04 15:05         ` Andy Shevchenko
2020-06-04 15:05         ` Andy Shevchenko
2020-06-04 16:28         ` Jim Quinlan
2020-06-04 16:28           ` Jim Quinlan
2020-06-04 16:28           ` Jim Quinlan via iommu
2020-06-04 16:52       ` Nicolas Saenz Julienne
2020-06-04 16:52         ` Nicolas Saenz Julienne
2020-06-04 16:52         ` Nicolas Saenz Julienne
2020-06-04 18:01         ` Jim Quinlan
2020-06-04 18:01           ` Jim Quinlan
2020-06-04 18:01           ` Jim Quinlan via iommu
2020-06-05 17:27           ` Nicolas Saenz Julienne
2020-06-05 17:27             ` Nicolas Saenz Julienne
2020-06-05 17:27             ` Nicolas Saenz Julienne
2020-06-05 20:41             ` Jim Quinlan
2020-06-05 20:41               ` Jim Quinlan
2020-06-05 20:41               ` Jim Quinlan via iommu
2020-06-03 19:20 ` [PATCH v3 10/13] PCI: brcmstb: Set internal memory viewport sizes Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:33   ` Florian Fainelli
2020-06-03 20:33     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 11/13] PCI: brcmstb: Accommodate MSI for older chips Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-04  2:56   ` Florian Fainelli
2020-06-04  2:56     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 12/13] PCI: brcmstb: Set bus max burst size by chip type Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:06   ` Florian Fainelli
2020-06-03 20:06     ` Florian Fainelli
2020-06-03 19:20 ` [PATCH v3 13/13] PCI: brcmstb: Add bcm7211, bcm7216, bcm7445, bcm7278 to match list Jim Quinlan
2020-06-03 19:20   ` Jim Quinlan
2020-06-03 20:02   ` Florian Fainelli
2020-06-03 20:02     ` Florian Fainelli

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