From: Alexandru Elisei <alexandru.elisei@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: maz@kernel.org, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, Julien Thierry <julien.thierry@arm.com>, Will Deacon <will.deacon@arm.com>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org> Subject: [PATCH v5 3/7] arm64: perf: Remove PMU locking Date: Wed, 17 Jun 2020 12:38:47 +0100 [thread overview] Message-ID: <20200617113851.607706-4-alexandru.elisei@arm.com> (raw) In-Reply-To: <20200617113851.607706-1-alexandru.elisei@arm.com> From: Julien Thierry <julien.thierry@arm.com> The PMU is disabled and enabled, and the counters are programmed from contexts where interrupts or preemption is disabled. The functions to toggle the PMU and to program the PMU counters access the registers directly and don't access data modified by the interrupt handler. That, and the fact that they're always called from non-preemptible contexts, means that we don't need to disable interrupts or use a spinlock. Cc: Will Deacon <will.deacon@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Julien Thierry <julien.thierry@arm.com> [Explained why locking is not needed, removed WARN_ONs] Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- arch/arm64/kernel/perf_event.c | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index e95b5ca70a53..a6195022be7d 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -647,15 +647,10 @@ static inline u32 armv8pmu_getreset_flags(void) static void armv8pmu_enable_event(struct perf_event *event) { - unsigned long flags; - struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - /* * Enable counter and interrupt, and set the counter to count * the event that we're interested in. */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* * Disable counter @@ -678,21 +673,10 @@ static void armv8pmu_enable_event(struct perf_event *event) * Enable counter */ armv8pmu_enable_event_counter(event); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_disable_event(struct perf_event *event) { - unsigned long flags; - struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - /* - * Disable counter and interrupt - */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); - /* * Disable counter */ @@ -702,30 +686,18 @@ static void armv8pmu_disable_event(struct perf_event *event) * Disable interrupt for this counter */ armv8pmu_disable_event_irq(event); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_start(struct arm_pmu *cpu_pmu) { - unsigned long flags; - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* Enable all counters */ armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_E); - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_stop(struct arm_pmu *cpu_pmu) { - unsigned long flags; - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* Disable all counters */ armv8pmu_pmcr_write(armv8pmu_pmcr_read() & ~ARMV8_PMU_PMCR_E); - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static irqreturn_t armv8pmu_handle_irq(struct arm_pmu *cpu_pmu) -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Alexandru Elisei <alexandru.elisei@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: mark.rutland@arm.com, Julien Thierry <julien.thierry@arm.com>, Peter Zijlstra <peterz@infradead.org>, maz@kernel.org, Jiri Olsa <jolsa@redhat.com>, Will Deacon <will.deacon@arm.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Ingo Molnar <mingo@redhat.com>, catalin.marinas@arm.com, Namhyung Kim <namhyung@kernel.org>, will@kernel.org Subject: [PATCH v5 3/7] arm64: perf: Remove PMU locking Date: Wed, 17 Jun 2020 12:38:47 +0100 [thread overview] Message-ID: <20200617113851.607706-4-alexandru.elisei@arm.com> (raw) In-Reply-To: <20200617113851.607706-1-alexandru.elisei@arm.com> From: Julien Thierry <julien.thierry@arm.com> The PMU is disabled and enabled, and the counters are programmed from contexts where interrupts or preemption is disabled. The functions to toggle the PMU and to program the PMU counters access the registers directly and don't access data modified by the interrupt handler. That, and the fact that they're always called from non-preemptible contexts, means that we don't need to disable interrupts or use a spinlock. Cc: Will Deacon <will.deacon@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Julien Thierry <julien.thierry@arm.com> [Explained why locking is not needed, removed WARN_ONs] Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- arch/arm64/kernel/perf_event.c | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index e95b5ca70a53..a6195022be7d 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -647,15 +647,10 @@ static inline u32 armv8pmu_getreset_flags(void) static void armv8pmu_enable_event(struct perf_event *event) { - unsigned long flags; - struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - /* * Enable counter and interrupt, and set the counter to count * the event that we're interested in. */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* * Disable counter @@ -678,21 +673,10 @@ static void armv8pmu_enable_event(struct perf_event *event) * Enable counter */ armv8pmu_enable_event_counter(event); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_disable_event(struct perf_event *event) { - unsigned long flags; - struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - /* - * Disable counter and interrupt - */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); - /* * Disable counter */ @@ -702,30 +686,18 @@ static void armv8pmu_disable_event(struct perf_event *event) * Disable interrupt for this counter */ armv8pmu_disable_event_irq(event); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_start(struct arm_pmu *cpu_pmu) { - unsigned long flags; - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* Enable all counters */ armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_E); - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_stop(struct arm_pmu *cpu_pmu) { - unsigned long flags; - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* Disable all counters */ armv8pmu_pmcr_write(armv8pmu_pmcr_read() & ~ARMV8_PMU_PMCR_E); - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static irqreturn_t armv8pmu_handle_irq(struct arm_pmu *cpu_pmu) -- 2.27.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-06-17 11:38 UTC|newest] Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-17 11:38 [PATCH v5 0/7] arm_pmu: Use NMI for perf interrupt Alexandru Elisei 2020-06-17 11:38 ` Alexandru Elisei 2020-06-17 11:38 ` [PATCH v5 1/7] arm64: perf: Add missing ISB in armv8pmu_enable_event() Alexandru Elisei 2020-06-17 11:38 ` Alexandru Elisei 2020-06-17 20:01 ` Stephen Boyd 2020-06-17 20:01 ` Stephen Boyd 2020-06-18 10:50 ` Alexandru Elisei 2020-06-18 10:50 ` Alexandru Elisei 2020-06-17 11:38 ` [PATCH v5 2/7] arm64: perf: Avoid PMXEV* indirection Alexandru Elisei 2020-06-17 11:38 ` Alexandru Elisei 2020-06-17 20:11 ` Stephen Boyd 2020-06-17 20:11 ` Stephen Boyd 2020-06-18 10:51 ` Alexandru Elisei 2020-06-18 10:51 ` Alexandru Elisei 2020-06-19 8:26 ` Stephen Boyd 2020-06-19 8:26 ` Stephen Boyd 2020-06-17 11:38 ` Alexandru Elisei [this message] 2020-06-17 11:38 ` [PATCH v5 3/7] arm64: perf: Remove PMU locking Alexandru Elisei 2020-06-17 20:17 ` Stephen Boyd 2020-06-17 20:17 ` Stephen Boyd 2020-06-18 10:51 ` Alexandru Elisei 2020-06-18 10:51 ` Alexandru Elisei 2020-06-19 8:29 ` Stephen Boyd 2020-06-19 8:29 ` Stephen Boyd 2020-07-03 13:45 ` Will Deacon 2020-07-03 13:45 ` Will Deacon 2020-06-17 11:38 ` [PATCH v5 4/7] arm64: perf: Defer irq_work to IPI_IRQ_WORK Alexandru Elisei 2020-06-17 11:38 ` Alexandru Elisei 2020-06-22 14:19 ` Mark Rutland 2020-06-23 9:47 ` Alexandru Elisei 2020-06-17 11:38 ` [PATCH v5 5/7] arm64: kvm: pmu: Make overflow handler NMI safe Alexandru Elisei 2020-06-17 11:38 ` Alexandru Elisei 2020-06-17 11:38 ` Alexandru Elisei 2020-06-17 11:38 ` [PATCH v5 6/7] arm_pmu: Introduce pmu_irq_ops Alexandru Elisei 2020-06-17 11:38 ` Alexandru Elisei 2020-06-17 20:23 ` Stephen Boyd 2020-06-17 20:23 ` Stephen Boyd 2020-06-18 10:51 ` Alexandru Elisei 2020-06-18 10:51 ` Alexandru Elisei 2020-06-19 8:33 ` Stephen Boyd 2020-06-19 8:33 ` Stephen Boyd 2020-06-17 11:38 ` [PATCH v5 7/7] arm_pmu: arm64: Use NMIs for PMU Alexandru Elisei 2020-06-17 11:38 ` Alexandru Elisei 2020-06-25 15:11 ` [PATCH v5 0/7] arm_pmu: Use NMI for perf interrupt Alexandru Elisei 2020-06-25 15:11 ` Alexandru Elisei
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