drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c:363 __i915_vma_pin_fence() warn: passing a valid pointer to 'PTR_ERR'

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c:363 __i915_vma_pin_fence() warn: passing a valid pointer to 'PTR_ERR'

[kernel test robot]

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CC: kbuild-all(a)lists.01.org
CC: linux-kernel(a)vger.kernel.org
TO: Chris Wilson <chris@chris-wilson.co.uk>
CC: Mika Kuoppala <mika.kuoppala@linux.intel.com>

Hi Chris,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   9ebcfadb0610322ac537dd7aa5d9cbc2b2894c68
commit: f899f786d181e03f6ca29319bd90ba62231cb44b drm/i915: Move GGTT fence registers under gt/
date:   4 months ago
:::::: branch date: 21 hours ago
:::::: commit date: 4 months ago
config: i386-randconfig-m021-20200629 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-13) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>

smatch warnings:
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c:363 __i915_vma_pin_fence() warn: passing a valid pointer to 'PTR_ERR'

# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f899f786d181e03f6ca29319bd90ba62231cb44b
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git remote update linus
git checkout f899f786d181e03f6ca29319bd90ba62231cb44b
vim +/PTR_ERR +363 drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

41a36b739ae378 drivers/gpu/drm/i915/i915_gem_fence.c     Daniel Vetter 2015-07-24  341  
2850748ef8763a drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-10-04  342  int __i915_vma_pin_fence(struct i915_vma *vma)
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  343  {
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  344  	struct i915_ggtt *ggtt = i915_vm_to_ggtt(vma->vm);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  345  	struct i915_fence_reg *fence;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  346  	struct i915_vma *set = i915_gem_object_is_tiled(vma->obj) ? vma : NULL;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  347  	int err;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  348  
2850748ef8763a drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-10-04  349  	lockdep_assert_held(&vma->vm->mutex);
2850748ef8763a drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-10-04  350  
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  351  	/* Just update our place in the LRU if our fence is getting reused. */
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  352  	if (vma->fence) {
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  353  		fence = vma->fence;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  354  		GEM_BUG_ON(fence->vma != vma);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  355  		atomic_inc(&fence->pin_count);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  356  		if (!fence->dirty) {
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  357  			list_move_tail(&fence->link, &ggtt->fence_list);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  358  			return 0;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  359  		}
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  360  	} else if (set) {
e9d4c9245f54cd drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-10-16  361  		fence = fence_find(ggtt);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  362  		if (IS_ERR(fence))
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22 @363  			return PTR_ERR(fence);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  364  
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  365  		GEM_BUG_ON(atomic_read(&fence->pin_count));
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  366  		atomic_inc(&fence->pin_count);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  367  	} else {
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  368  		return 0;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  369  	}
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  370  
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  371  	err = fence_update(fence, set);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  372  	if (err)
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  373  		goto out_unpin;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  374  
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  375  	GEM_BUG_ON(fence->vma != set);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  376  	GEM_BUG_ON(vma->fence != (set ? fence : NULL));
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  377  
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  378  	if (set)
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  379  		return 0;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  380  
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  381  out_unpin:
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  382  	atomic_dec(&fence->pin_count);
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  383  	return err;
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  384  }
e2ccc50a3a6c90 drivers/gpu/drm/i915/i915_gem_fence_reg.c Chris Wilson  2019-08-22  385  

:::::: The code at line 363 was first introduced by commit
:::::: e2ccc50a3a6c90cace6a9aef40072e558dd13863 drm/i915: Track ggtt fence reservations under its own mutex

:::::: TO: Chris Wilson <chris@chris-wilson.co.uk>
:::::: CC: Chris Wilson <chris@chris-wilson.co.uk>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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