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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 09/12] drm/i915: Move hpd_pin setup to encoder init
Date: Wed,  1 Jul 2020 00:55:58 +0300	[thread overview]
Message-ID: <20200630215601.28557-10-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200630215601.28557-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently DP/HDMI/DDI encoders init their hpd_pin from the
connector init. Let's move it to the encoder init so that
we don't need to add platform specific junk to the connector
init (which is shared by all g4x+ platforms).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c  | 1 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 2 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
 3 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 884b507c5f55..d024491738b3 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4907,6 +4907,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 	encoder->port = port;
 	encoder->cloneable = 0;
 	encoder->pipe_mask = ~0;
+	encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 
 	if (INTEL_GEN(dev_priv) >= 11)
 		intel_dig_port->saved_port_bits = intel_de_read(dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3df5d901dd9d..cd516cd8acb8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -8211,7 +8211,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 	if (INTEL_GEN(dev_priv) >= 11)
 		connector->ycbcr_420_allowed = true;
 
-	intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 	intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
 
 	intel_dp_aux_init(intel_dp);
@@ -8354,6 +8353,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
 	}
 	intel_encoder->cloneable = 0;
 	intel_encoder->port = port;
+	intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 
 	intel_dig_port->hpd_pulse = intel_dp_hpd_pulse;
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 864a1642e81c..f515d0fce968 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3253,7 +3253,6 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
 	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
 		connector->ycbcr_420_allowed = true;
 
-	intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 	intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
 
 	if (HAS_DDI(dev_priv))
@@ -3385,6 +3384,7 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
 		intel_encoder->pipe_mask = ~0;
 	}
 	intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;
+	intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 	/*
 	 * BSpec is unclear about HDMI+HDMI cloning on g4x, but it seems
 	 * to work on real hardware. And since g4x can send infoframes to
-- 
2.26.2

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  parent reply	other threads:[~2020-06-30 21:56 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
2020-06-30 21:55 ` [Intel-gfx] [PATCH 01/12] drm/i915: Add more AUX CHs to the enum Ville Syrjala
2020-09-08 16:21   ` [Intel-gfx] [01/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 02/12] drm/i915: Add PORT_{H, I} to intel_port_to_power_domain() Ville Syrjala
2020-09-08 16:21   ` [Intel-gfx] [02/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 03/12] drm/i915: Add AUX_CH_{H, I} power domain handling Ville Syrjala
2020-09-08 16:23   ` [Intel-gfx] [03/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 04/12] drm/i915: Add VBT DVO ports H and I Ville Syrjala
2020-09-08 16:37   ` [Intel-gfx] [04/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 05/12] drm/i915: Add VBT AUX CH " Ville Syrjala
2020-09-08 16:38   ` [Intel-gfx] [05/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 06/12] drm/i915: Nuke the redundant TC/TBT HPD bit defines Ville Syrjala
2020-09-08 16:41   ` [Intel-gfx] [06/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 07/12] drm/i915: Configure GEN11_{TBT, TC}_HOTPLUG_CTL for ports TC5/6 Ville Syrjala
2020-09-08 16:45   ` [Intel-gfx] [07/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 08/12] drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts Ville Syrjala
2020-09-08 16:49   ` [Intel-gfx] [08/12] " Souza, Jose
2020-06-30 21:55 ` Ville Syrjala [this message]
2020-09-08 16:57   ` [Intel-gfx] [09/12] drm/i915: Move hpd_pin setup to encoder init Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 10/12] drm/i915: Introduce HPD_PORT_TC<n> Ville Syrjala
2020-09-12  1:30   ` [Intel-gfx] [10/12] " Souza, Jose
2020-09-14 14:48     ` Ville Syrjälä
2020-09-14 16:58       ` Souza, Jose
2020-09-14 17:06         ` Ville Syrjälä
2020-06-30 21:56 ` [Intel-gfx] [PATCH 11/12] drm/i915: Introduce intel_hpd_hotplug_irqs() Ville Syrjala
2020-09-09  0:46   ` [Intel-gfx] [11/12] " Souza, Jose
2020-09-09 19:17     ` Ville Syrjälä
2020-06-30 21:56 ` [Intel-gfx] [PATCH 12/12] drm/i915: Nuke pointless variable Ville Syrjala
2020-09-08 17:00   ` [Intel-gfx] [12/12] " Souza, Jose
2020-06-30 22:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Futher hotplug cleanups Patchwork
2020-07-01  3:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-01  6:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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