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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 08/12] drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts
Date: Wed,  1 Jul 2020 00:55:57 +0300	[thread overview]
Message-ID: <20200630215601.28557-9-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200630215601.28557-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

No reason to stuff both DDI and TC port handling into the same
function. Split it into two.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 48 ++++++++++++++++++---------------
 1 file changed, 27 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 839ae674bc44..92d74448ee03 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3045,21 +3045,24 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
 	ibx_hpd_detection_setup(dev_priv);
 }
 
-static void icp_hpd_detection_setup(struct drm_i915_private *dev_priv,
-				    u32 ddi_hotplug_enable_mask,
-				    u32 tc_hotplug_enable_mask)
+static void icp_ddi_hpd_detection_setup(struct drm_i915_private *dev_priv,
+					u32 enable_mask)
 {
 	u32 hotplug;
 
 	hotplug = I915_READ(SHOTPLUG_CTL_DDI);
-	hotplug |= ddi_hotplug_enable_mask;
+	hotplug |= enable_mask;
 	I915_WRITE(SHOTPLUG_CTL_DDI, hotplug);
+}
 
-	if (tc_hotplug_enable_mask) {
-		hotplug = I915_READ(SHOTPLUG_CTL_TC);
-		hotplug |= tc_hotplug_enable_mask;
-		I915_WRITE(SHOTPLUG_CTL_TC, hotplug);
-	}
+static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv,
+				       u32 enable_mask)
+{
+	u32 hotplug;
+
+	hotplug = I915_READ(SHOTPLUG_CTL_TC);
+	hotplug |= enable_mask;
+	I915_WRITE(SHOTPLUG_CTL_TC, hotplug);
 }
 
 static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
@@ -3075,7 +3078,9 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
 
 	ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
 
-	icp_hpd_detection_setup(dev_priv, ddi_enable_mask, tc_enable_mask);
+	icp_ddi_hpd_detection_setup(dev_priv, ddi_enable_mask);
+	if (tc_enable_mask)
+		icp_tc_hpd_detection_setup(dev_priv, tc_enable_mask);
 }
 
 /*
@@ -3493,17 +3498,18 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv)
 	gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR);
 	I915_WRITE(SDEIMR, ~mask);
 
-	if (HAS_PCH_TGP(dev_priv))
-		icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK,
-					TGP_TC_HPD_ENABLE_MASK);
-	else if (HAS_PCH_JSP(dev_priv))
-		icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, 0);
-	else if (HAS_PCH_MCC(dev_priv))
-		icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,
-					ICP_TC_HPD_ENABLE(PORT_TC1));
-	else
-		icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,
-					ICP_TC_HPD_ENABLE_MASK);
+	if (HAS_PCH_TGP(dev_priv)) {
+		icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);
+		icp_tc_hpd_detection_setup(dev_priv, TGP_TC_HPD_ENABLE_MASK);
+	} else if (HAS_PCH_JSP(dev_priv)) {
+		icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);
+	} else if (HAS_PCH_MCC(dev_priv)) {
+		icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK);
+		icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE(PORT_TC1));
+	} else {
+		icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK);
+		icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE_MASK);
+	}
 }
 
 static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
-- 
2.26.2

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  parent reply	other threads:[~2020-06-30 21:56 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
2020-06-30 21:55 ` [Intel-gfx] [PATCH 01/12] drm/i915: Add more AUX CHs to the enum Ville Syrjala
2020-09-08 16:21   ` [Intel-gfx] [01/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 02/12] drm/i915: Add PORT_{H, I} to intel_port_to_power_domain() Ville Syrjala
2020-09-08 16:21   ` [Intel-gfx] [02/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 03/12] drm/i915: Add AUX_CH_{H, I} power domain handling Ville Syrjala
2020-09-08 16:23   ` [Intel-gfx] [03/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 04/12] drm/i915: Add VBT DVO ports H and I Ville Syrjala
2020-09-08 16:37   ` [Intel-gfx] [04/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 05/12] drm/i915: Add VBT AUX CH " Ville Syrjala
2020-09-08 16:38   ` [Intel-gfx] [05/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 06/12] drm/i915: Nuke the redundant TC/TBT HPD bit defines Ville Syrjala
2020-09-08 16:41   ` [Intel-gfx] [06/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 07/12] drm/i915: Configure GEN11_{TBT, TC}_HOTPLUG_CTL for ports TC5/6 Ville Syrjala
2020-09-08 16:45   ` [Intel-gfx] [07/12] " Souza, Jose
2020-06-30 21:55 ` Ville Syrjala [this message]
2020-09-08 16:49   ` [Intel-gfx] [08/12] drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 09/12] drm/i915: Move hpd_pin setup to encoder init Ville Syrjala
2020-09-08 16:57   ` [Intel-gfx] [09/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 10/12] drm/i915: Introduce HPD_PORT_TC<n> Ville Syrjala
2020-09-12  1:30   ` [Intel-gfx] [10/12] " Souza, Jose
2020-09-14 14:48     ` Ville Syrjälä
2020-09-14 16:58       ` Souza, Jose
2020-09-14 17:06         ` Ville Syrjälä
2020-06-30 21:56 ` [Intel-gfx] [PATCH 11/12] drm/i915: Introduce intel_hpd_hotplug_irqs() Ville Syrjala
2020-09-09  0:46   ` [Intel-gfx] [11/12] " Souza, Jose
2020-09-09 19:17     ` Ville Syrjälä
2020-06-30 21:56 ` [Intel-gfx] [PATCH 12/12] drm/i915: Nuke pointless variable Ville Syrjala
2020-09-08 17:00   ` [Intel-gfx] [12/12] " Souza, Jose
2020-06-30 22:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Futher hotplug cleanups Patchwork
2020-07-01  3:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-01  6:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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