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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Laurent Vivier" <lvivier@redhat.com>,
	"Sarah Harris" <S.E.Harris@kent.ac.uk>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Thomas Huth" <huth@tuxfamily.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Cleber Rosa" <crosa@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Michael Rolnik" <mrolnik@gmail.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Pavel Dovgalyuk" <pavel.dovgaluk@ispras.ru>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Aleksandar Markovic" <aleksandar.m.mail@gmail.com>,
	"Richard Henderson" <rth@twiddle.net>
Subject: [PULL 03/32] target/avr: CPU class: Add interrupt handling support
Date: Tue,  7 Jul 2020 20:16:41 +0200	[thread overview]
Message-ID: <20200707181710.30950-4-f4bug@amsat.org> (raw)
In-Reply-To: <20200707181710.30950-1-f4bug@amsat.org>

From: Michael Rolnik <mrolnik@gmail.com>

This patch introduces functions avr_cpu_do_interrupt() and
avr_cpu_exec_interrupt() that are part of AVR CPU class object.

[AM: Split a larger AVR introduction patch into logical units]
Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Co-developed-by: Michael Rolnik <mrolnik@gmail.com>
Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-4-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/avr/cpu.c    |  2 +
 target/avr/helper.c | 89 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 91 insertions(+)
 create mode 100644 target/avr/helper.c

diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 7895a5ecaa..864cb6b102 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -199,6 +199,8 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
     cc->class_by_name = avr_cpu_class_by_name;
 
     cc->has_work = avr_cpu_has_work;
+    cc->do_interrupt = avr_cpu_do_interrupt;
+    cc->cpu_exec_interrupt = avr_cpu_exec_interrupt;
     cc->dump_state = avr_cpu_dump_state;
     cc->set_pc = avr_cpu_set_pc;
     cc->disas_set_info = avr_cpu_disas_set_info;
diff --git a/target/avr/helper.c b/target/avr/helper.c
new file mode 100644
index 0000000000..7174e4858e
--- /dev/null
+++ b/target/avr/helper.c
@@ -0,0 +1,89 @@
+/*
+ * QEMU AVR CPU helpers
+ *
+ * Copyright (c) 2016-2020 Michael Rolnik
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
+ * <http://www.gnu.org/licenses/lgpl-2.1.html>
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
+#include "exec/helper-proto.h"
+
+bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+    bool ret = false;
+    CPUClass *cc = CPU_GET_CLASS(cs);
+    AVRCPU *cpu = AVR_CPU(cs);
+    CPUAVRState *env = &cpu->env;
+
+    if (interrupt_request & CPU_INTERRUPT_RESET) {
+        if (cpu_interrupts_enabled(env)) {
+            cs->exception_index = EXCP_RESET;
+            cc->do_interrupt(cs);
+
+            cs->interrupt_request &= ~CPU_INTERRUPT_RESET;
+
+            ret = true;
+        }
+    }
+    if (interrupt_request & CPU_INTERRUPT_HARD) {
+        if (cpu_interrupts_enabled(env) && env->intsrc != 0) {
+            int index = ctz32(env->intsrc);
+            cs->exception_index = EXCP_INT(index);
+            cc->do_interrupt(cs);
+
+            env->intsrc &= env->intsrc - 1; /* clear the interrupt */
+            cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
+
+            ret = true;
+        }
+    }
+    return ret;
+}
+
+void avr_cpu_do_interrupt(CPUState *cs)
+{
+    AVRCPU *cpu = AVR_CPU(cs);
+    CPUAVRState *env = &cpu->env;
+
+    uint32_t ret = env->pc_w;
+    int vector = 0;
+    int size = avr_feature(env, AVR_FEATURE_JMP_CALL) ? 2 : 1;
+    int base = 0;
+
+    if (cs->exception_index == EXCP_RESET) {
+        vector = 0;
+    } else if (env->intsrc != 0) {
+        vector = ctz32(env->intsrc) + 1;
+    }
+
+    if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) {
+        cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+        cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8);
+        cpu_stb_data(env, env->sp--, (ret & 0xff0000) >> 16);
+    } else if (avr_feature(env, AVR_FEATURE_2_BYTE_PC)) {
+        cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+        cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8);
+    } else {
+        cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+    }
+
+    env->pc_w = base + vector * size;
+    env->sregI = 0; /* clear Global Interrupt Flag */
+
+    cs->exception_index = -1;
+}
-- 
2.21.3



  parent reply	other threads:[~2020-07-07 18:20 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-07 18:16 [PULL 00/32] AVR port Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 01/32] target/avr: Add basic parameters of the new platform Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 02/32] target/avr: Introduce basic CPU class object Philippe Mathieu-Daudé
2020-07-07 18:16 ` Philippe Mathieu-Daudé [this message]
2020-07-07 18:16 ` [PULL 04/32] target/avr: CPU class: Add memory menagement support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 05/32] target/avr: CPU class: Add migration support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 06/32] target/avr: CPU class: Add GDB support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 07/32] target/avr: Introduce enumeration AVRFeature Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 08/32] target/avr: Add definitions of AVR core types Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 09/32] target/avr: Add instruction helpers Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 10/32] target/avr: Add instruction translation - Register definitions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 11/32] target/avr: Add instruction translation - Arithmetic and Logic Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 12/32] target/avr: Add instruction translation - Branch Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 13/32] target/avr: Add instruction translation - Data Transfer Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 14/32] target/avr: Add instruction translation - Bit and Bit-test Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 15/32] target/avr: Add instruction translation - MCU Control Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 16/32] target/avr: Add instruction translation - CPU main translation function Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 17/32] target/avr: Initialize TCG register variables Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 18/32] target/avr: Add support for disassembling via option '-d in_asm' Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 19/32] target/avr: Register AVR support with the rest of QEMU Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 20/32] tests/machine-none: Add AVR support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 21/32] hw/char: avr: Add limited support for USART peripheral Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 22/32] hw/timer: avr: Add limited support for 16-bit timer peripheral Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 23/32] hw/misc: avr: Add limited support for power reduction device Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 24/32] hw/avr: Add support for loading ELF/raw binaries Philippe Mathieu-Daudé
2020-07-13 12:40   ` Peter Maydell
2020-07-14 15:09     ` Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 25/32] hw/avr: Add some ATmega microcontrollers Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 26/32] hw/avr: Add limited support for some Arduino boards Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 27/32] tests/boot-serial: Test some Arduino boards (AVR based) Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 28/32] tests/acceptance: Test the Arduino MEGA2560 board Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 29/32] target/avr: Add section into QEMU documentation Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 30/32] target/avr/cpu: Drop tlb_flush() in avr_cpu_reset() Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 31/32] target/avr/cpu: Fix $PC displayed address Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 32/32] target/avr/disas: Fix store instructions display order Philippe Mathieu-Daudé
2020-07-10 11:41 ` [PULL 00/32] AVR port Peter Maydell
2020-07-10 15:02   ` Thomas Huth
2020-07-10 15:12     ` Peter Maydell
2020-07-10 15:17       ` Philippe Mathieu-Daudé
2020-07-10 15:32         ` Philippe Mathieu-Daudé
2020-07-10 15:45           ` Thomas Huth
2020-07-10 15:54           ` Richard Henderson
2020-07-10 16:00             ` Philippe Mathieu-Daudé

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