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From: Peter Maydell <peter.maydell@linaro.org>
To: Thomas Huth <thuth@redhat.com>
Cc: "Laurent Vivier" <lvivier@redhat.com>,
	"Sarah Harris" <S.E.Harris@kent.ac.uk>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Thomas Huth" <huth@tuxfamily.org>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Michael Rolnik" <mrolnik@gmail.com>,
	"Pavel Dovgalyuk" <pavel.dovgaluk@ispras.ru>,
	"Cleber Rosa" <crosa@redhat.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Richard Henderson" <rth@twiddle.net>
Subject: Re: [PULL 00/32] AVR port
Date: Fri, 10 Jul 2020 16:12:36 +0100	[thread overview]
Message-ID: <CAFEAcA_wBT+Yfsn+DFZkcRxYWKmF04U2JHNVz5mNuXabeDcN5g@mail.gmail.com> (raw)
In-Reply-To: <47ca6b92-cedb-a6c4-754b-b7cd5da597e7@redhat.com>

On Fri, 10 Jul 2020 at 16:03, Thomas Huth <thuth@redhat.com> wrote:
> Endianess bug ... this should fix it:
>
> diff --git a/target/avr/helper.c b/target/avr/helper.c
> --- a/target/avr/helper.c
> +++ b/target/avr/helper.c
> @@ -337,6 +337,7 @@ void helper_fullwr(CPUAVRState *env, uint32_t data,
> uint32_t addr)
>          helper_outb(env, addr - NUMBER_OF_CPU_REGISTERS, data);
>      } else {
>          /* memory */
> -        cpu_physical_memory_write(OFFSET_DATA + addr, &data, 1);
> +        uint8_t data8 = data;
> +        cpu_physical_memory_write(OFFSET_DATA + addr, &data8, 1);
>      }

Or equivalently
  address_space_stb(&address_space_memory, data, MEMTXATTRS_UNSPECIFIED, NULL);

(better choices of address space may be available, but this is
the exact-same-behaviour one).

>  }

thanks
-- PMM


  reply	other threads:[~2020-07-10 15:15 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-07 18:16 [PULL 00/32] AVR port Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 01/32] target/avr: Add basic parameters of the new platform Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 02/32] target/avr: Introduce basic CPU class object Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 03/32] target/avr: CPU class: Add interrupt handling support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 04/32] target/avr: CPU class: Add memory menagement support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 05/32] target/avr: CPU class: Add migration support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 06/32] target/avr: CPU class: Add GDB support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 07/32] target/avr: Introduce enumeration AVRFeature Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 08/32] target/avr: Add definitions of AVR core types Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 09/32] target/avr: Add instruction helpers Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 10/32] target/avr: Add instruction translation - Register definitions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 11/32] target/avr: Add instruction translation - Arithmetic and Logic Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 12/32] target/avr: Add instruction translation - Branch Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 13/32] target/avr: Add instruction translation - Data Transfer Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 14/32] target/avr: Add instruction translation - Bit and Bit-test Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 15/32] target/avr: Add instruction translation - MCU Control Instructions Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 16/32] target/avr: Add instruction translation - CPU main translation function Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 17/32] target/avr: Initialize TCG register variables Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 18/32] target/avr: Add support for disassembling via option '-d in_asm' Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 19/32] target/avr: Register AVR support with the rest of QEMU Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 20/32] tests/machine-none: Add AVR support Philippe Mathieu-Daudé
2020-07-07 18:16 ` [PULL 21/32] hw/char: avr: Add limited support for USART peripheral Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 22/32] hw/timer: avr: Add limited support for 16-bit timer peripheral Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 23/32] hw/misc: avr: Add limited support for power reduction device Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 24/32] hw/avr: Add support for loading ELF/raw binaries Philippe Mathieu-Daudé
2020-07-13 12:40   ` Peter Maydell
2020-07-14 15:09     ` Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 25/32] hw/avr: Add some ATmega microcontrollers Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 26/32] hw/avr: Add limited support for some Arduino boards Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 27/32] tests/boot-serial: Test some Arduino boards (AVR based) Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 28/32] tests/acceptance: Test the Arduino MEGA2560 board Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 29/32] target/avr: Add section into QEMU documentation Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 30/32] target/avr/cpu: Drop tlb_flush() in avr_cpu_reset() Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 31/32] target/avr/cpu: Fix $PC displayed address Philippe Mathieu-Daudé
2020-07-07 18:17 ` [PULL 32/32] target/avr/disas: Fix store instructions display order Philippe Mathieu-Daudé
2020-07-10 11:41 ` [PULL 00/32] AVR port Peter Maydell
2020-07-10 15:02   ` Thomas Huth
2020-07-10 15:12     ` Peter Maydell [this message]
2020-07-10 15:17       ` Philippe Mathieu-Daudé
2020-07-10 15:32         ` Philippe Mathieu-Daudé
2020-07-10 15:45           ` Thomas Huth
2020-07-10 15:54           ` Richard Henderson
2020-07-10 16:00             ` Philippe Mathieu-Daudé

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