From: Luca Ceresoli <luca@lucaceresoli.net>
To: linux-clk@vger.kernel.org
Cc: Luca Ceresoli <luca@lucaceresoli.net>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Marek Vasut <marek.vasut@gmail.com>,
Adam Ford <aford173@gmail.com>
Subject: [PATCH v2 1/4] dt-bindings: clk: versaclock5: fix 'idt' prefix typos
Date: Wed, 8 Jul 2020 09:40:32 +0200 [thread overview]
Message-ID: <20200708074035.31595-1-luca@lucaceresoli.net> (raw)
'idt' is misspelled 'itd' in a few places, fix it.
Fixes: 34662f6e3084 ("dt: Add additional option bindings for IDT VersaClock")
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
---
Documentation/devicetree/bindings/clock/idt,versaclock5.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
index 6165b6ddb1a9..9656d4cf221c 100644
--- a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
+++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
@@ -35,7 +35,7 @@ For all output ports, a corresponding, optional child node named OUT1,
OUT2, etc. can represent a each output, and the node can be used to
specify the following:
-- itd,mode: can be one of the following:
+- idt,mode: can be one of the following:
- VC5_LVPECL
- VC5_CMOS
- VC5_HCSL33
@@ -106,7 +106,7 @@ i2c-master-node {
clock-names = "xin";
OUT1 {
- itd,mode = <VC5_CMOS>;
+ idt,mode = <VC5_CMOS>;
idt,voltage-microvolts = <1800000>;
idt,slew-percent = <80>;
};
--
2.27.0
next reply other threads:[~2020-07-08 7:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-08 7:40 Luca Ceresoli [this message]
2020-07-08 7:40 ` [PATCH v2 2/4] MAINTAINERS: take over IDT VersaClock 5 clock driver Luca Ceresoli
2020-07-08 7:40 ` [PATCH v2 3/4] clk: vc5: use a dedicated struct to describe the output drivers Luca Ceresoli
2020-07-08 7:40 ` [PATCH v2 4/4] dt-bindings: clk: versaclock5: convert to yaml Luca Ceresoli
2020-07-14 3:11 ` Rob Herring
2020-07-14 9:15 ` Luca Ceresoli
2020-07-14 14:51 ` Rob Herring
2020-07-21 16:40 ` Luca Ceresoli
2020-07-08 16:56 ` [PATCH v2 1/4] dt-bindings: clk: versaclock5: fix 'idt' prefix typos Luca Ceresoli
2020-07-14 3:06 ` Rob Herring
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