From: Jordan Crouse <jcrouse@codeaurora.org> To: Akhil P Oommen <akhilpo@codeaurora.org> Cc: freedreno@lists.freedesktop.org, dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, mka@chromium.org, jonathan@marek.ca, robdclark@gmail.com, rnayak@codeaurora.org Subject: Re: [PATCH] drm: msm: a6xx: fix gpu failure after system resume Date: Tue, 14 Jul 2020 08:57:21 -0600 [thread overview] Message-ID: <20200714145721.GD24345@jcrouse1-lnx.qualcomm.com> (raw) In-Reply-To: <1594733130-398-1-git-send-email-akhilpo@codeaurora.org> On Tue, Jul 14, 2020 at 06:55:30PM +0530, Akhil P Oommen wrote: > On targets where GMU is available, GMU takes over the ownership of GX GDSC > during its initialization. So, take a refcount on the GX PD on behalf of > GMU before we initialize it. This makes sure that nobody can collapse the > GX GDSC once GMU owns the GX GDSC. This patch fixes some weird failures > during GPU wake up during system resume. The change looks fine but this explanation is confusing. When I read it I thought "oh, man, we weren't taking a reference to the GX PD during resume???" but that's not really the case. We *are* taking a reference, just not soon enough to avoid possible issues. It would be helpful if you reworded this to explain that you are moving the reference and perhaps to shine a bit more light on what the "weird" failures are. Jordan > Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> > --- > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 18 ++++++++++-------- > 1 file changed, 10 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > index a6f43ff..5b2df7d 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > @@ -873,10 +873,19 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) > /* Turn on the resources */ > pm_runtime_get_sync(gmu->dev); > > + /* > + * "enable" the GX power domain which won't actually do anything but it > + * will make sure that the refcounting is correct in case we need to > + * bring down the GX after a GMU failure > + */ > + if (!IS_ERR_OR_NULL(gmu->gxpd)) > + pm_runtime_get_sync(gmu->gxpd); > + > /* Use a known rate to bring up the GMU */ > clk_set_rate(gmu->core_clk, 200000000); > ret = clk_bulk_prepare_enable(gmu->nr_clocks, gmu->clocks); > if (ret) { > + pm_runtime_put(gmu->gxpd); > pm_runtime_put(gmu->dev); > return ret; > } > @@ -919,19 +928,12 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) > /* Set the GPU to the current freq */ > a6xx_gmu_set_initial_freq(gpu, gmu); > > - /* > - * "enable" the GX power domain which won't actually do anything but it > - * will make sure that the refcounting is correct in case we need to > - * bring down the GX after a GMU failure > - */ > - if (!IS_ERR_OR_NULL(gmu->gxpd)) > - pm_runtime_get(gmu->gxpd); > - > out: > /* On failure, shut down the GMU to leave it in a good state */ > if (ret) { > disable_irq(gmu->gmu_irq); > a6xx_rpmh_stop(gmu); > + pm_runtime_put(gmu->gxpd); > pm_runtime_put(gmu->dev); > } > > -- > 2.7.4 > -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: Jordan Crouse <jcrouse@codeaurora.org> To: Akhil P Oommen <akhilpo@codeaurora.org> Cc: devicetree@vger.kernel.org, rnayak@codeaurora.org, jonathan@marek.ca, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, dri-devel@freedesktop.org, freedreno@lists.freedesktop.org Subject: Re: [PATCH] drm: msm: a6xx: fix gpu failure after system resume Date: Tue, 14 Jul 2020 08:57:21 -0600 [thread overview] Message-ID: <20200714145721.GD24345@jcrouse1-lnx.qualcomm.com> (raw) In-Reply-To: <1594733130-398-1-git-send-email-akhilpo@codeaurora.org> On Tue, Jul 14, 2020 at 06:55:30PM +0530, Akhil P Oommen wrote: > On targets where GMU is available, GMU takes over the ownership of GX GDSC > during its initialization. So, take a refcount on the GX PD on behalf of > GMU before we initialize it. This makes sure that nobody can collapse the > GX GDSC once GMU owns the GX GDSC. This patch fixes some weird failures > during GPU wake up during system resume. The change looks fine but this explanation is confusing. When I read it I thought "oh, man, we weren't taking a reference to the GX PD during resume???" but that's not really the case. We *are* taking a reference, just not soon enough to avoid possible issues. It would be helpful if you reworded this to explain that you are moving the reference and perhaps to shine a bit more light on what the "weird" failures are. Jordan > Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> > --- > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 18 ++++++++++-------- > 1 file changed, 10 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > index a6f43ff..5b2df7d 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > @@ -873,10 +873,19 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) > /* Turn on the resources */ > pm_runtime_get_sync(gmu->dev); > > + /* > + * "enable" the GX power domain which won't actually do anything but it > + * will make sure that the refcounting is correct in case we need to > + * bring down the GX after a GMU failure > + */ > + if (!IS_ERR_OR_NULL(gmu->gxpd)) > + pm_runtime_get_sync(gmu->gxpd); > + > /* Use a known rate to bring up the GMU */ > clk_set_rate(gmu->core_clk, 200000000); > ret = clk_bulk_prepare_enable(gmu->nr_clocks, gmu->clocks); > if (ret) { > + pm_runtime_put(gmu->gxpd); > pm_runtime_put(gmu->dev); > return ret; > } > @@ -919,19 +928,12 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) > /* Set the GPU to the current freq */ > a6xx_gmu_set_initial_freq(gpu, gmu); > > - /* > - * "enable" the GX power domain which won't actually do anything but it > - * will make sure that the refcounting is correct in case we need to > - * bring down the GX after a GMU failure > - */ > - if (!IS_ERR_OR_NULL(gmu->gxpd)) > - pm_runtime_get(gmu->gxpd); > - > out: > /* On failure, shut down the GMU to leave it in a good state */ > if (ret) { > disable_irq(gmu->gmu_irq); > a6xx_rpmh_stop(gmu); > + pm_runtime_put(gmu->gxpd); > pm_runtime_put(gmu->dev); > } > > -- > 2.7.4 > -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-07-14 14:57 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-14 13:25 [PATCH] drm: msm: a6xx: fix gpu failure after system resume Akhil P Oommen 2020-07-14 13:25 ` Akhil P Oommen 2020-07-14 14:57 ` Jordan Crouse [this message] 2020-07-14 14:57 ` Jordan Crouse 2020-07-14 17:10 ` Matthias Kaehlcke 2020-07-14 17:10 ` Matthias Kaehlcke 2020-07-14 18:42 ` Rob Clark 2020-07-14 18:42 ` Rob Clark 2020-07-17 14:36 ` Akhil P Oommen 2020-07-17 14:36 ` Akhil P Oommen
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