* [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes
@ 2020-07-10 7:40 Meng Yu
2020-07-10 7:40 ` [PATCH v2 1/6] crypto: hisilicon/hpre - Init the value of current_q of debugfs Meng Yu
` (6 more replies)
0 siblings, 7 replies; 8+ messages in thread
From: Meng Yu @ 2020-07-10 7:40 UTC (permalink / raw)
To: herbert, davem; +Cc: linux-crypto, xuzaibo, wangzhou1, linux-kernel
Bugfix: crypto: hisilicon/hpre - modify the macros, add a switch in
sriov_configure, unified debugfs interface, and disable
hardware FLR.
Hui Tang (2):
crypto: hisilicon/hpre - HPRE_OVERTIME_THRHLD can be written by
debugfs
crypto: hisilicon/hpre - disable FLR triggered by hardware
Meng Yu (4):
crypto: hisilicon/hpre - Init the value of current_q of debugfs
crypto: hisilicon/hpre - Modify the Macro definition and format
crypto: hisilicon/hpre - Add a switch in sriov_configure
crypto: hisilicon/hpre - update debugfs interface parameters
drivers/crypto/hisilicon/hpre/hpre_main.c | 111 +++++++++++++++++-------------
1 file changed, 62 insertions(+), 49 deletions(-)
--
2.8.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/6] crypto: hisilicon/hpre - Init the value of current_q of debugfs
2020-07-10 7:40 [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Meng Yu
@ 2020-07-10 7:40 ` Meng Yu
2020-07-10 7:40 ` [PATCH v2 2/6] crypto: hisilicon/hpre - HPRE_OVERTIME_THRHLD can be written by debugfs Meng Yu
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Meng Yu @ 2020-07-10 7:40 UTC (permalink / raw)
To: herbert, davem; +Cc: linux-crypto, xuzaibo, wangzhou1, linux-kernel
Initialize current queue number as HPRE_PF_DEF_Q_NUM, or it is zero
and we can't set its value by "current_q_write".
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Reviewed-by: Hui Tang <tanghui20@huawei.com>
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index a3ee127..3131347 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -732,6 +732,7 @@ static int hpre_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
if (qm->fun_type == QM_HW_PF) {
qm->qp_base = HPRE_PF_DEF_Q_BASE;
qm->qp_num = pf_q_num;
+ qm->debug.curr_qm_qp_num = pf_q_num;
qm->qm_list = &hpre_devices;
}
--
2.8.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/6] crypto: hisilicon/hpre - HPRE_OVERTIME_THRHLD can be written by debugfs
2020-07-10 7:40 [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Meng Yu
2020-07-10 7:40 ` [PATCH v2 1/6] crypto: hisilicon/hpre - Init the value of current_q of debugfs Meng Yu
@ 2020-07-10 7:40 ` Meng Yu
2020-07-10 7:40 ` [PATCH v2 3/6] crypto: hisilicon/hpre - Modify the Macro definition and format Meng Yu
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Meng Yu @ 2020-07-10 7:40 UTC (permalink / raw)
To: herbert, davem; +Cc: linux-crypto, xuzaibo, wangzhou1, linux-kernel
From: Hui Tang <tanghui20@huawei.com>
Registers in "hpre_dfx_files" can only be cleaned to zero but
HPRE_OVERTIME_THRHLD, which can be written as any number.
Fixes: 64a6301ebee7("crypto: hisilicon/hpre - add debugfs for ...")
Signed-off-by: Hui Tang <tanghui20@huawei.com>
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 3131347..23f2e5c 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -548,13 +548,15 @@ static int hpre_debugfs_atomic64_get(void *data, u64 *val)
static int hpre_debugfs_atomic64_set(void *data, u64 val)
{
struct hpre_dfx *dfx_item = data;
- struct hpre_dfx *hpre_dfx = dfx_item - HPRE_OVERTIME_THRHLD;
+ struct hpre_dfx *hpre_dfx = NULL;
- if (val)
+ if (dfx_item->type == HPRE_OVERTIME_THRHLD) {
+ hpre_dfx = dfx_item - HPRE_OVERTIME_THRHLD;
+ atomic64_set(&hpre_dfx[HPRE_OVER_THRHLD_CNT].value, 0);
+ } else if (val) {
return -EINVAL;
+ }
- if (dfx_item->type == HPRE_OVERTIME_THRHLD)
- atomic64_set(&hpre_dfx[HPRE_OVER_THRHLD_CNT].value, 0);
atomic64_set(&dfx_item->value, val);
return 0;
--
2.8.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 3/6] crypto: hisilicon/hpre - Modify the Macro definition and format
2020-07-10 7:40 [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Meng Yu
2020-07-10 7:40 ` [PATCH v2 1/6] crypto: hisilicon/hpre - Init the value of current_q of debugfs Meng Yu
2020-07-10 7:40 ` [PATCH v2 2/6] crypto: hisilicon/hpre - HPRE_OVERTIME_THRHLD can be written by debugfs Meng Yu
@ 2020-07-10 7:40 ` Meng Yu
2020-07-10 7:40 ` [PATCH v2 4/6] crypto: hisilicon/hpre - Add a switch in sriov_configure Meng Yu
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Meng Yu @ 2020-07-10 7:40 UTC (permalink / raw)
To: herbert, davem; +Cc: linux-crypto, xuzaibo, wangzhou1, linux-kernel
1. Bit 1 to bit 5 are NFE, not CE.
2. Macro 'HPRE_VF_NUM' is defined in 'qm.h', so delete it here.
3. Delete multiple blank lines.
4. Adjust format alignment.
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Reviewed-by: Longfang Liu <liulongfang@huawei.com>
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 23f2e5c..da17729 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -12,7 +12,6 @@
#include <linux/topology.h>
#include "hpre.h"
-#define HPRE_VF_NUM 63
#define HPRE_QUEUE_NUM_V2 1024
#define HPRE_QM_ABNML_INT_MASK 0x100004
#define HPRE_CTRL_CNT_CLR_CE_BIT BIT(0)
@@ -46,9 +45,9 @@
#define HPRE_CORE_IS_SCHD_OFFSET 0x90
#define HPRE_RAS_CE_ENB 0x301410
-#define HPRE_HAC_RAS_CE_ENABLE 0x3f
+#define HPRE_HAC_RAS_CE_ENABLE 0x1
#define HPRE_RAS_NFE_ENB 0x301414
-#define HPRE_HAC_RAS_NFE_ENABLE 0x3fffc0
+#define HPRE_HAC_RAS_NFE_ENABLE 0x3ffffe
#define HPRE_RAS_FE_ENB 0x301418
#define HPRE_HAC_RAS_FE_ENABLE 0
@@ -264,7 +263,7 @@ static int hpre_set_user_domain_and_cache(struct hisi_qm *qm)
writel(HPRE_BD_USR_MASK, HPRE_ADDR(qm, HPRE_BD_AWUSR_CFG));
writel(0x1, HPRE_ADDR(qm, HPRE_RDCHN_INI_CFG));
ret = readl_relaxed_poll_timeout(HPRE_ADDR(qm, HPRE_RDCHN_INI_ST), val,
- val & BIT(0),
+ val & BIT(0),
HPRE_REG_RD_INTVRL_US,
HPRE_REG_RD_TMOUT_US);
if (ret) {
@@ -372,7 +371,6 @@ static int hpre_current_qm_write(struct hpre_debugfs_file *file, u32 val)
u32 num_vfs = qm->vfs_num;
u32 vfq_num, tmp;
-
if (val > num_vfs)
return -EINVAL;
@@ -449,7 +447,7 @@ static int hpre_cluster_inqry_write(struct hpre_debugfs_file *file, u32 val)
}
static ssize_t hpre_ctrl_debug_read(struct file *filp, char __user *buf,
- size_t count, loff_t *pos)
+ size_t count, loff_t *pos)
{
struct hpre_debugfs_file *file = filp->private_data;
char tbuf[HPRE_DBGFS_VAL_MAX_LEN];
@@ -477,7 +475,7 @@ static ssize_t hpre_ctrl_debug_read(struct file *filp, char __user *buf,
}
static ssize_t hpre_ctrl_debug_write(struct file *filp, const char __user *buf,
- size_t count, loff_t *pos)
+ size_t count, loff_t *pos)
{
struct hpre_debugfs_file *file = filp->private_data;
char tbuf[HPRE_DBGFS_VAL_MAX_LEN];
--
2.8.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 4/6] crypto: hisilicon/hpre - Add a switch in sriov_configure
2020-07-10 7:40 [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Meng Yu
` (2 preceding siblings ...)
2020-07-10 7:40 ` [PATCH v2 3/6] crypto: hisilicon/hpre - Modify the Macro definition and format Meng Yu
@ 2020-07-10 7:40 ` Meng Yu
2020-07-10 7:40 ` [PATCH v2 5/6] crypto: hisilicon/hpre - update debugfs interface parameters Meng Yu
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Meng Yu @ 2020-07-10 7:40 UTC (permalink / raw)
To: herbert, davem; +Cc: linux-crypto, xuzaibo, wangzhou1, linux-kernel
If CONFIG_PCI_IOV is not enabled, we can not use "sriov_configure".
Fixes: 5ec302a364bf("crypto: hisilicon - add SRIOV support for HPRE")
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Reviewed-by: Shukun Tan <tanshukun1@huawei.com>
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index da17729..37c2bc5 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -925,7 +925,8 @@ static struct pci_driver hpre_pci_driver = {
.id_table = hpre_dev_ids,
.probe = hpre_probe,
.remove = hpre_remove,
- .sriov_configure = hisi_qm_sriov_configure,
+ .sriov_configure = IS_ENABLED(CONFIG_PCI_IOV) ?
+ hisi_qm_sriov_configure : NULL,
.err_handler = &hpre_err_handler,
};
--
2.8.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 5/6] crypto: hisilicon/hpre - update debugfs interface parameters
2020-07-10 7:40 [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Meng Yu
` (3 preceding siblings ...)
2020-07-10 7:40 ` [PATCH v2 4/6] crypto: hisilicon/hpre - Add a switch in sriov_configure Meng Yu
@ 2020-07-10 7:40 ` Meng Yu
2020-07-10 7:40 ` [PATCH v2 6/6] crypto: hisilicon/hpre - disable FLR triggered by hardware Meng Yu
2020-07-16 11:55 ` [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Herbert Xu
6 siblings, 0 replies; 8+ messages in thread
From: Meng Yu @ 2020-07-10 7:40 UTC (permalink / raw)
To: herbert, davem; +Cc: linux-crypto, xuzaibo, wangzhou1, linux-kernel
Update debugfs interface parameters, and adjust the
processing logic inside the corresponding function.
Fixes: 848974151618("crypto: hisilicon - Add debugfs for HPRE")
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 59 ++++++++++++++-----------------
1 file changed, 26 insertions(+), 33 deletions(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 37c2bc5..b69cea3 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -563,15 +563,17 @@ static int hpre_debugfs_atomic64_set(void *data, u64 val)
DEFINE_DEBUGFS_ATTRIBUTE(hpre_atomic64_ops, hpre_debugfs_atomic64_get,
hpre_debugfs_atomic64_set, "%llu\n");
-static int hpre_create_debugfs_file(struct hpre_debug *dbg, struct dentry *dir,
+static int hpre_create_debugfs_file(struct hisi_qm *qm, struct dentry *dir,
enum hpre_ctrl_dbgfs_file type, int indx)
{
+ struct hpre *hpre = container_of(qm, struct hpre, qm);
+ struct hpre_debug *dbg = &hpre->debug;
struct dentry *file_dir;
if (dir)
file_dir = dir;
else
- file_dir = dbg->debug_root;
+ file_dir = qm->debug.debug_root;
if (type >= HPRE_DEBUG_FILE_NUM)
return -EINVAL;
@@ -586,10 +588,8 @@ static int hpre_create_debugfs_file(struct hpre_debug *dbg, struct dentry *dir,
return 0;
}
-static int hpre_pf_comm_regs_debugfs_init(struct hpre_debug *debug)
+static int hpre_pf_comm_regs_debugfs_init(struct hisi_qm *qm)
{
- struct hpre *hpre = container_of(debug, struct hpre, debug);
- struct hisi_qm *qm = &hpre->qm;
struct device *dev = &qm->pdev->dev;
struct debugfs_regset32 *regset;
@@ -601,14 +601,12 @@ static int hpre_pf_comm_regs_debugfs_init(struct hpre_debug *debug)
regset->nregs = ARRAY_SIZE(hpre_com_dfx_regs);
regset->base = qm->io_base;
- debugfs_create_regset32("regs", 0444, debug->debug_root, regset);
+ debugfs_create_regset32("regs", 0444, qm->debug.debug_root, regset);
return 0;
}
-static int hpre_cluster_debugfs_init(struct hpre_debug *debug)
+static int hpre_cluster_debugfs_init(struct hisi_qm *qm)
{
- struct hpre *hpre = container_of(debug, struct hpre, debug);
- struct hisi_qm *qm = &hpre->qm;
struct device *dev = &qm->pdev->dev;
char buf[HPRE_DBGFS_VAL_MAX_LEN];
struct debugfs_regset32 *regset;
@@ -619,7 +617,7 @@ static int hpre_cluster_debugfs_init(struct hpre_debug *debug)
ret = snprintf(buf, HPRE_DBGFS_VAL_MAX_LEN, "cluster%d", i);
if (ret < 0)
return -EINVAL;
- tmp_d = debugfs_create_dir(buf, debug->debug_root);
+ tmp_d = debugfs_create_dir(buf, qm->debug.debug_root);
regset = devm_kzalloc(dev, sizeof(*regset), GFP_KERNEL);
if (!regset)
@@ -630,7 +628,7 @@ static int hpre_cluster_debugfs_init(struct hpre_debug *debug)
regset->base = qm->io_base + hpre_cluster_offsets[i];
debugfs_create_regset32("regs", 0444, tmp_d, regset);
- ret = hpre_create_debugfs_file(debug, tmp_d, HPRE_CLUSTER_CTRL,
+ ret = hpre_create_debugfs_file(qm, tmp_d, HPRE_CLUSTER_CTRL,
i + HPRE_CLUSTER_CTRL);
if (ret)
return ret;
@@ -639,32 +637,31 @@ static int hpre_cluster_debugfs_init(struct hpre_debug *debug)
return 0;
}
-static int hpre_ctrl_debug_init(struct hpre_debug *debug)
+static int hpre_ctrl_debug_init(struct hisi_qm *qm)
{
int ret;
- ret = hpre_create_debugfs_file(debug, NULL, HPRE_CURRENT_QM,
+ ret = hpre_create_debugfs_file(qm, NULL, HPRE_CURRENT_QM,
HPRE_CURRENT_QM);
if (ret)
return ret;
- ret = hpre_create_debugfs_file(debug, NULL, HPRE_CLEAR_ENABLE,
+ ret = hpre_create_debugfs_file(qm, NULL, HPRE_CLEAR_ENABLE,
HPRE_CLEAR_ENABLE);
if (ret)
return ret;
- ret = hpre_pf_comm_regs_debugfs_init(debug);
+ ret = hpre_pf_comm_regs_debugfs_init(qm);
if (ret)
return ret;
- return hpre_cluster_debugfs_init(debug);
+ return hpre_cluster_debugfs_init(qm);
}
-static void hpre_dfx_debug_init(struct hpre_debug *debug)
+static void hpre_dfx_debug_init(struct hisi_qm *qm)
{
- struct hpre *hpre = container_of(debug, struct hpre, debug);
+ struct hpre *hpre = container_of(qm, struct hpre, qm);
struct hpre_dfx *dfx = hpre->debug.dfx;
- struct hisi_qm *qm = &hpre->qm;
struct dentry *parent;
int i;
@@ -676,30 +673,27 @@ static void hpre_dfx_debug_init(struct hpre_debug *debug)
}
}
-static int hpre_debugfs_init(struct hpre *hpre)
+static int hpre_debugfs_init(struct hisi_qm *qm)
{
- struct hisi_qm *qm = &hpre->qm;
struct device *dev = &qm->pdev->dev;
- struct dentry *dir;
int ret;
- dir = debugfs_create_dir(dev_name(dev), hpre_debugfs_root);
- qm->debug.debug_root = dir;
+ qm->debug.debug_root = debugfs_create_dir(dev_name(dev),
+ hpre_debugfs_root);
+
qm->debug.sqe_mask_offset = HPRE_SQE_MASK_OFFSET;
qm->debug.sqe_mask_len = HPRE_SQE_MASK_LEN;
-
ret = hisi_qm_debug_init(qm);
if (ret)
goto failed_to_create;
if (qm->pdev->device == HPRE_PCI_DEVICE_ID) {
- hpre->debug.debug_root = dir;
- ret = hpre_ctrl_debug_init(&hpre->debug);
+ ret = hpre_ctrl_debug_init(qm);
if (ret)
goto failed_to_create;
}
- hpre_dfx_debug_init(&hpre->debug);
+ hpre_dfx_debug_init(qm);
return 0;
@@ -708,10 +702,8 @@ static int hpre_debugfs_init(struct hpre *hpre)
return ret;
}
-static void hpre_debugfs_exit(struct hpre *hpre)
+static void hpre_debugfs_exit(struct hisi_qm *qm)
{
- struct hisi_qm *qm = &hpre->qm;
-
debugfs_remove_recursive(qm->debug.debug_root);
}
@@ -850,7 +842,7 @@ static int hpre_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if (ret)
goto err_with_err_init;
- ret = hpre_debugfs_init(hpre);
+ ret = hpre_debugfs_init(qm);
if (ret)
dev_warn(&pdev->dev, "init debugfs fail!\n");
@@ -875,6 +867,7 @@ static int hpre_probe(struct pci_dev *pdev, const struct pci_device_id *id)
err_with_qm_start:
hisi_qm_del_from_list(qm, &hpre_devices);
+ hpre_debugfs_exit(qm);
hisi_qm_stop(qm);
err_with_err_init:
@@ -906,7 +899,7 @@ static void hpre_remove(struct pci_dev *pdev)
qm->debug.curr_qm_qp_num = 0;
}
- hpre_debugfs_exit(hpre);
+ hpre_debugfs_exit(qm);
hisi_qm_stop(qm);
hisi_qm_dev_err_uninit(qm);
hisi_qm_uninit(qm);
--
2.8.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 6/6] crypto: hisilicon/hpre - disable FLR triggered by hardware
2020-07-10 7:40 [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Meng Yu
` (4 preceding siblings ...)
2020-07-10 7:40 ` [PATCH v2 5/6] crypto: hisilicon/hpre - update debugfs interface parameters Meng Yu
@ 2020-07-10 7:40 ` Meng Yu
2020-07-16 11:55 ` [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Herbert Xu
6 siblings, 0 replies; 8+ messages in thread
From: Meng Yu @ 2020-07-10 7:40 UTC (permalink / raw)
To: herbert, davem; +Cc: linux-crypto, xuzaibo, wangzhou1, linux-kernel
From: Hui Tang <tanghui20@huawei.com>
for Hi1620 hardware, we should disable these hardware flr:
1. BME_FLR - bit 7,
2. PM_FLR - bit 11,
3. SRIOV_FLR - bit 12,
Or HPRE may goto D3 state, when we bind and unbind HPRE quickly,
as it does FLR triggered by BME/PM/SRIOV.
Fixes: c8b4b477079d("crypto: hisilicon - add HiSilicon HPRE accelerator")
Signed-off-by: Hui Tang <tanghui20@huawei.com>
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 26 ++++++++++++++++++++++----
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index b69cea3..b135c74 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -82,6 +82,10 @@
#define HPRE_CORE_ECC_2BIT_ERR BIT(1)
#define HPRE_OOO_ECC_2BIT_ERR BIT(5)
+#define HPRE_QM_BME_FLR BIT(7)
+#define HPRE_QM_PM_FLR BIT(11)
+#define HPRE_QM_SRIOV_FLR BIT(12)
+
#define HPRE_VIA_MSI_DSM 1
#define HPRE_SQE_MASK_OFFSET 8
#define HPRE_SQE_MASK_LEN 24
@@ -230,6 +234,22 @@ static int hpre_cfg_by_dsm(struct hisi_qm *qm)
return 0;
}
+/*
+ * For Hi1620, we shoul disable FLR triggered by hardware (BME/PM/SRIOV).
+ * Or it may stay in D3 state when we bind and unbind hpre quickly,
+ * as it does FLR triggered by hardware.
+ */
+static void disable_flr_of_bme(struct hisi_qm *qm)
+{
+ u32 val;
+
+ val = readl(HPRE_ADDR(qm, QM_PEH_AXUSER_CFG));
+ val &= ~(HPRE_QM_BME_FLR | HPRE_QM_SRIOV_FLR);
+ val |= HPRE_QM_PM_FLR;
+ writel(val, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG));
+ writel(PEH_AXUSER_CFG_ENABLE, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG_ENABLE));
+}
+
static int hpre_set_user_domain_and_cache(struct hisi_qm *qm)
{
struct device *dev = &qm->pdev->dev;
@@ -241,10 +261,6 @@ static int hpre_set_user_domain_and_cache(struct hisi_qm *qm)
writel(HPRE_QM_USR_CFG_MASK, HPRE_ADDR(qm, QM_AWUSER_M_CFG_ENABLE));
writel_relaxed(HPRE_QM_AXI_CFG_MASK, HPRE_ADDR(qm, QM_AXI_M_CFG));
- /* disable FLR triggered by BME(bus master enable) */
- writel(PEH_AXUSER_CFG, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG));
- writel(PEH_AXUSER_CFG_ENABLE, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG_ENABLE));
-
/* HPRE need more time, we close this interrupt */
val = readl_relaxed(HPRE_ADDR(qm, HPRE_QM_ABNML_INT_MASK));
val |= BIT(HPRE_TIMEOUT_ABNML_BIT);
@@ -295,6 +311,8 @@ static int hpre_set_user_domain_and_cache(struct hisi_qm *qm)
if (ret)
dev_err(dev, "acpi_evaluate_dsm err.\n");
+ disable_flr_of_bme(qm);
+
return ret;
}
--
2.8.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes
2020-07-10 7:40 [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Meng Yu
` (5 preceding siblings ...)
2020-07-10 7:40 ` [PATCH v2 6/6] crypto: hisilicon/hpre - disable FLR triggered by hardware Meng Yu
@ 2020-07-16 11:55 ` Herbert Xu
6 siblings, 0 replies; 8+ messages in thread
From: Herbert Xu @ 2020-07-16 11:55 UTC (permalink / raw)
To: Meng Yu; +Cc: davem, linux-crypto, xuzaibo, wangzhou1, linux-kernel
On Fri, Jul 10, 2020 at 03:40:40PM +0800, Meng Yu wrote:
> Bugfix: crypto: hisilicon/hpre - modify the macros, add a switch in
> sriov_configure, unified debugfs interface, and disable
> hardware FLR.
>
> Hui Tang (2):
> crypto: hisilicon/hpre - HPRE_OVERTIME_THRHLD can be written by
> debugfs
> crypto: hisilicon/hpre - disable FLR triggered by hardware
>
> Meng Yu (4):
> crypto: hisilicon/hpre - Init the value of current_q of debugfs
> crypto: hisilicon/hpre - Modify the Macro definition and format
> crypto: hisilicon/hpre - Add a switch in sriov_configure
> crypto: hisilicon/hpre - update debugfs interface parameters
>
> drivers/crypto/hisilicon/hpre/hpre_main.c | 111 +++++++++++++++++-------------
> 1 file changed, 62 insertions(+), 49 deletions(-)
All applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-07-16 11:56 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-10 7:40 [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Meng Yu
2020-07-10 7:40 ` [PATCH v2 1/6] crypto: hisilicon/hpre - Init the value of current_q of debugfs Meng Yu
2020-07-10 7:40 ` [PATCH v2 2/6] crypto: hisilicon/hpre - HPRE_OVERTIME_THRHLD can be written by debugfs Meng Yu
2020-07-10 7:40 ` [PATCH v2 3/6] crypto: hisilicon/hpre - Modify the Macro definition and format Meng Yu
2020-07-10 7:40 ` [PATCH v2 4/6] crypto: hisilicon/hpre - Add a switch in sriov_configure Meng Yu
2020-07-10 7:40 ` [PATCH v2 5/6] crypto: hisilicon/hpre - update debugfs interface parameters Meng Yu
2020-07-10 7:40 ` [PATCH v2 6/6] crypto: hisilicon/hpre - disable FLR triggered by hardware Meng Yu
2020-07-16 11:55 ` [PATCH v2 0/6] crypto: hisilicon/hpre bugfix - misc fixes Herbert Xu
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