* [dpdk-dev] [PATCH 00/14] bnxt patches
@ 2020-07-17 14:10 Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 01/14] net/bnxt: changes to support new RM and multi-region Somnath Kotur
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Somnath Kotur @ 2020-07-17 14:10 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit
From: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Some changes, cleanups/fixes in the TF-ULP layer
Farah Smith (2):
net/bnxt: initialize table scope rm parameters
net/bnxt: fix em message size
Jay Ding (1):
net/bnxt: replace NAT IPv4 action SRC/DEST
Kishore Padmanabha (6):
net/bnxt: enable default flows in truflow mode
net/bnxt: add protocol header info based on proto field data
net/bnxt: fix dereference of a null pointer
net/bnxt: default egress rule changes
net/bnxt: update cfa truflow resource allocation numbers
net/bnxt: enable support for exact match templates
Peter Spreadborough (1):
net/bnxt: changes to support new RM and multi-region
Randy Schacher (2):
net/bnxt: clean up em message definition
net/bnxt: change header to SPDX-License
Somnath Kotur (2):
net/bnxt: fix to avoid accumulation of flow counters
net/bnxt: remove unnecessary debug log
drivers/net/bnxt/bnxt_ethdev.c | 5 +-
drivers/net/bnxt/tf_core/cfa_resource_types.h | 207 +-
drivers/net/bnxt/tf_core/tf_core.h | 16 +-
drivers/net/bnxt/tf_core/tf_device_p4.h | 13 +-
drivers/net/bnxt/tf_core/tf_em_common.c | 2 +-
drivers/net/bnxt/tf_core/tf_msg.c | 3 +-
drivers/net/bnxt/tf_core/tf_util.c | 18 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 35 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 9 +
drivers/net/bnxt/tf_ulp/ulp_def_rules.c | 11 +-
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c | 4 +-
drivers/net/bnxt/tf_ulp/ulp_mapper.c | 3 -
drivers/net/bnxt/tf_ulp/ulp_mark_mgr.c | 8 +-
drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 180 +-
drivers/net/bnxt/tf_ulp/ulp_template_db_act.c | 2547 +++-
drivers/net/bnxt/tf_ulp/ulp_template_db_class.c | 17417 ++++++++++++++++++----
drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h | 328 +-
drivers/net/bnxt/tf_ulp/ulp_template_db_field.h | 959 +-
drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c | 478 +-
drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 1 +
20 files changed, 18533 insertions(+), 3711 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 01/14] net/bnxt: changes to support new RM and multi-region
2020-07-17 14:10 [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
@ 2020-07-17 14:11 ` Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 02/14] net/bnxt: initialize table scope rm parameters Somnath Kotur
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Somnath Kotur @ 2020-07-17 14:11 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit
From: Peter Spreadborough <peter.spreadborough@broadcom.com>
- Updated CFA resource types
- Updated references
- Add High/low
Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
---
drivers/net/bnxt/tf_core/cfa_resource_types.h | 194 ++++++++++++------------
drivers/net/bnxt/tf_core/tf_core.h | 12 +-
drivers/net/bnxt/tf_core/tf_device_p4.h | 14 +-
drivers/net/bnxt/tf_core/tf_util.c | 12 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 10 +-
drivers/net/bnxt/tf_ulp/ulp_template_db_class.c | 38 ++---
drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c | 4 +-
7 files changed, 152 insertions(+), 132 deletions(-)
diff --git a/drivers/net/bnxt/tf_core/cfa_resource_types.h b/drivers/net/bnxt/tf_core/cfa_resource_types.h
index 6d6651f..45b26b2 100644
--- a/drivers/net/bnxt/tf_core/cfa_resource_types.h
+++ b/drivers/net/bnxt/tf_core/cfa_resource_types.h
@@ -18,53 +18,57 @@
*/
#define CFA_RESOURCE_TYPE_INVALID 65535
-/* L2 Context TCAM */
-#define CFA_RESOURCE_TYPE_P59_L2_CTXT_TCAM 0x0UL
-/* L2 Context REMAP */
-#define CFA_RESOURCE_TYPE_P59_L2_CTXT_REMAP 0x1UL
+/* L2 Context TCAM High priority entries */
+#define CFA_RESOURCE_TYPE_P59_L2_CTXT_TCAM_HIGH 0x0UL
+/* L2 Context TCAM Low priority entries */
+#define CFA_RESOURCE_TYPE_P59_L2_CTXT_TCAM_LOW 0x1UL
+/* L2 Context REMAP high priority entries */
+#define CFA_RESOURCE_TYPE_P59_L2_CTXT_REMAP_HIGH 0x2UL
+/* L2 Context REMAP Low priority entries */
+#define CFA_RESOURCE_TYPE_P59_L2_CTXT_REMAP_LOW 0x3UL
/* Profile Func */
-#define CFA_RESOURCE_TYPE_P59_PROF_FUNC 0x2UL
+#define CFA_RESOURCE_TYPE_P59_PROF_FUNC 0x4UL
/* Profile TCAM */
-#define CFA_RESOURCE_TYPE_P59_PROF_TCAM 0x3UL
+#define CFA_RESOURCE_TYPE_P59_PROF_TCAM 0x5UL
/* Exact Match Profile Id */
-#define CFA_RESOURCE_TYPE_P59_EM_PROF_ID 0x4UL
+#define CFA_RESOURCE_TYPE_P59_EM_PROF_ID 0x6UL
/* Wildcard TCAM Profile Id */
-#define CFA_RESOURCE_TYPE_P59_WC_TCAM_PROF_ID 0x5UL
+#define CFA_RESOURCE_TYPE_P59_WC_TCAM_PROF_ID 0x7UL
/* Wildcard TCAM */
-#define CFA_RESOURCE_TYPE_P59_WC_TCAM 0x6UL
+#define CFA_RESOURCE_TYPE_P59_WC_TCAM 0x8UL
/* Meter Profile */
-#define CFA_RESOURCE_TYPE_P59_METER_PROF 0x7UL
+#define CFA_RESOURCE_TYPE_P59_METER_PROF 0x9UL
/* Meter */
-#define CFA_RESOURCE_TYPE_P59_METER 0x8UL
+#define CFA_RESOURCE_TYPE_P59_METER 0xaUL
/* Meter */
-#define CFA_RESOURCE_TYPE_P59_MIRROR 0x9UL
+#define CFA_RESOURCE_TYPE_P59_MIRROR 0xbUL
/* Source Properties TCAM */
-#define CFA_RESOURCE_TYPE_P59_SP_TCAM 0xaUL
+#define CFA_RESOURCE_TYPE_P59_SP_TCAM 0xcUL
/* Exact Match Flexible Key Builder */
-#define CFA_RESOURCE_TYPE_P59_EM_FKB 0xbUL
+#define CFA_RESOURCE_TYPE_P59_EM_FKB 0xdUL
/* Wildcard Flexible Key Builder */
-#define CFA_RESOURCE_TYPE_P59_WC_FKB 0xcUL
+#define CFA_RESOURCE_TYPE_P59_WC_FKB 0xeUL
/* Table Scope */
-#define CFA_RESOURCE_TYPE_P59_TBL_SCOPE 0xdUL
+#define CFA_RESOURCE_TYPE_P59_TBL_SCOPE 0xfUL
/* L2 Func */
-#define CFA_RESOURCE_TYPE_P59_L2_FUNC 0xeUL
+#define CFA_RESOURCE_TYPE_P59_L2_FUNC 0x10UL
/* EPOCH 0 */
-#define CFA_RESOURCE_TYPE_P59_EPOCH0 0xfUL
+#define CFA_RESOURCE_TYPE_P59_EPOCH0 0x11UL
/* EPOCH 1 */
-#define CFA_RESOURCE_TYPE_P59_EPOCH1 0x10UL
+#define CFA_RESOURCE_TYPE_P59_EPOCH1 0x12UL
/* Metadata */
-#define CFA_RESOURCE_TYPE_P59_METADATA 0x11UL
+#define CFA_RESOURCE_TYPE_P59_METADATA 0x13UL
/* Connection Tracking Rule TCAM */
-#define CFA_RESOURCE_TYPE_P59_CT_RULE_TCAM 0x12UL
+#define CFA_RESOURCE_TYPE_P59_CT_RULE_TCAM 0x14UL
/* Range Profile */
-#define CFA_RESOURCE_TYPE_P59_RANGE_PROF 0x13UL
+#define CFA_RESOURCE_TYPE_P59_RANGE_PROF 0x15UL
/* Range */
-#define CFA_RESOURCE_TYPE_P59_RANGE 0x14UL
+#define CFA_RESOURCE_TYPE_P59_RANGE 0x16UL
/* Link Aggrigation */
-#define CFA_RESOURCE_TYPE_P59_LAG 0x15UL
+#define CFA_RESOURCE_TYPE_P59_LAG 0x17UL
/* VEB TCAM */
-#define CFA_RESOURCE_TYPE_P59_VEB_TCAM 0x16UL
-#define CFA_RESOURCE_TYPE_P59_LAST CFA_RESOURCE_TYPE_P59_VEB_TCAM
+#define CFA_RESOURCE_TYPE_P59_VEB_TCAM 0x18UL
+#define CFA_RESOURCE_TYPE_P59_LAST CFA_RESOURCE_TYPE_P59_VEB_TCAM
/* Multicast Group */
@@ -81,40 +85,40 @@
#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV4 0x5UL
/* Source Property MAC and IPv6 */
#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV6 0x6UL
-/* Network Address Translation Source Port */
-#define CFA_RESOURCE_TYPE_P58_NAT_SPORT 0x7UL
-/* Network Address Translation Destination Port */
-#define CFA_RESOURCE_TYPE_P58_NAT_DPORT 0x8UL
-/* Network Address Translation Source IPv4 address */
-#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV4 0x9UL
-/* Network Address Translation Destination IPv4 address */
-#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV4 0xaUL
+/* Network Address Translation Port */
+#define CFA_RESOURCE_TYPE_P58_NAT_PORT 0x7UL
+/* Network Address Translation IPv4 address */
+#define CFA_RESOURCE_TYPE_P58_NAT_IPV4 0x8UL
/* Meter */
-#define CFA_RESOURCE_TYPE_P58_METER 0xbUL
+#define CFA_RESOURCE_TYPE_P58_METER 0x9UL
/* Flow State */
-#define CFA_RESOURCE_TYPE_P58_FLOW_STATE 0xcUL
+#define CFA_RESOURCE_TYPE_P58_FLOW_STATE 0xaUL
/* Full Action Records */
-#define CFA_RESOURCE_TYPE_P58_FULL_ACTION 0xdUL
+#define CFA_RESOURCE_TYPE_P58_FULL_ACTION 0xbUL
/* Action Record Format 0 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_0_ACTION 0xeUL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_0_ACTION 0xcUL
/* Action Record Ext Format 0 */
-#define CFA_RESOURCE_TYPE_P58_EXT_FORMAT_0_ACTION 0xfUL
+#define CFA_RESOURCE_TYPE_P58_EXT_FORMAT_0_ACTION 0xdUL
/* Action Record Format 1 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_1_ACTION 0x10UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_1_ACTION 0xeUL
/* Action Record Format 2 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_2_ACTION 0x11UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_2_ACTION 0xfUL
/* Action Record Format 3 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_3_ACTION 0x12UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_3_ACTION 0x10UL
/* Action Record Format 4 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_4_ACTION 0x13UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_4_ACTION 0x11UL
/* Action Record Format 5 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_5_ACTION 0x14UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_5_ACTION 0x12UL
/* Action Record Format 6 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_6_ACTION 0x15UL
-/* L2 Context TCAM */
-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM 0x16UL
-/* L2 Context REMAP */
-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP 0x17UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_6_ACTION 0x13UL
+/* L2 Context TCAM High priority entries */
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH 0x14UL
+/* L2 Context TCAM Low priority entries */
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW 0x15UL
+/* L2 Context REMAP high priority entries */
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH 0x16UL
+/* L2 Context REMAP Low priority entries */
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW 0x17UL
/* Profile Func */
#define CFA_RESOURCE_TYPE_P58_PROF_FUNC 0x18UL
/* Profile TCAM */
@@ -158,40 +162,40 @@
#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV6 0x6UL
/* 64B Counters */
#define CFA_RESOURCE_TYPE_P45_COUNTER_64B 0x7UL
-/* Network Address Translation Source Port */
-#define CFA_RESOURCE_TYPE_P45_NAT_SPORT 0x8UL
-/* Network Address Translation Destination Port */
-#define CFA_RESOURCE_TYPE_P45_NAT_DPORT 0x9UL
-/* Network Address Translation Source IPv4 address */
-#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV4 0xaUL
-/* Network Address Translation Destination IPv4 address */
-#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV4 0xbUL
+/* Network Address Translation Port */
+#define CFA_RESOURCE_TYPE_P45_NAT_PORT 0x8UL
+/* Network Address Translation IPv4 address */
+#define CFA_RESOURCE_TYPE_P45_NAT_IPV4 0x9UL
/* Meter */
-#define CFA_RESOURCE_TYPE_P45_METER 0xcUL
+#define CFA_RESOURCE_TYPE_P45_METER 0xaUL
/* Flow State */
-#define CFA_RESOURCE_TYPE_P45_FLOW_STATE 0xdUL
+#define CFA_RESOURCE_TYPE_P45_FLOW_STATE 0xbUL
/* Full Action Records */
-#define CFA_RESOURCE_TYPE_P45_FULL_ACTION 0xeUL
+#define CFA_RESOURCE_TYPE_P45_FULL_ACTION 0xcUL
/* Action Record Format 0 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_0_ACTION 0xfUL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_0_ACTION 0xdUL
/* Action Record Ext Format 0 */
-#define CFA_RESOURCE_TYPE_P45_EXT_FORMAT_0_ACTION 0x10UL
+#define CFA_RESOURCE_TYPE_P45_EXT_FORMAT_0_ACTION 0xeUL
/* Action Record Format 1 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_1_ACTION 0x11UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_1_ACTION 0xfUL
/* Action Record Format 2 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_2_ACTION 0x12UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_2_ACTION 0x10UL
/* Action Record Format 3 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_3_ACTION 0x13UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_3_ACTION 0x11UL
/* Action Record Format 4 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_4_ACTION 0x14UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_4_ACTION 0x12UL
/* Action Record Format 5 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_5_ACTION 0x15UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_5_ACTION 0x13UL
/* Action Record Format 6 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_6_ACTION 0x16UL
-/* L2 Context TCAM */
-#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM 0x17UL
-/* L2 Context REMAP */
-#define CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP 0x18UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_6_ACTION 0x14UL
+/* L2 Context TCAM High priority entries */
+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM_HIGH 0x15UL
+/* L2 Context TCAM Low priority entries */
+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM_LOW 0x16UL
+/* L2 Context REMAP high priority entries */
+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP_HIGH 0x17UL
+/* L2 Context REMAP Low priority entries */
+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP_LOW 0x18UL
/* Profile Func */
#define CFA_RESOURCE_TYPE_P45_PROF_FUNC 0x19UL
/* Profile TCAM */
@@ -233,40 +237,40 @@
#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 0x6UL
/* 64B Counters */
#define CFA_RESOURCE_TYPE_P4_COUNTER_64B 0x7UL
-/* Network Address Translation Source Port */
-#define CFA_RESOURCE_TYPE_P4_NAT_SPORT 0x8UL
-/* Network Address Translation Destination Port */
-#define CFA_RESOURCE_TYPE_P4_NAT_DPORT 0x9UL
-/* Network Address Translation Source IPv4 address */
-#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV4 0xaUL
-/* Network Address Translation Destination IPv4 address */
-#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV4 0xbUL
+/* Network Address Translation Port */
+#define CFA_RESOURCE_TYPE_P4_NAT_PORT 0x8UL
+/* Network Address Translation IPv4 address */
+#define CFA_RESOURCE_TYPE_P4_NAT_IPV4 0x9UL
/* Meter */
-#define CFA_RESOURCE_TYPE_P4_METER 0xcUL
+#define CFA_RESOURCE_TYPE_P4_METER 0xaUL
/* Flow State */
-#define CFA_RESOURCE_TYPE_P4_FLOW_STATE 0xdUL
+#define CFA_RESOURCE_TYPE_P4_FLOW_STATE 0xbUL
/* Full Action Records */
-#define CFA_RESOURCE_TYPE_P4_FULL_ACTION 0xeUL
+#define CFA_RESOURCE_TYPE_P4_FULL_ACTION 0xcUL
/* Action Record Format 0 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION 0xfUL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION 0xdUL
/* Action Record Ext Format 0 */
-#define CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION 0x10UL
+#define CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION 0xeUL
/* Action Record Format 1 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION 0x11UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION 0xfUL
/* Action Record Format 2 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION 0x12UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION 0x10UL
/* Action Record Format 3 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION 0x13UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION 0x11UL
/* Action Record Format 4 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION 0x14UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION 0x12UL
/* Action Record Format 5 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION 0x15UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION 0x13UL
/* Action Record Format 6 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION 0x16UL
-/* L2 Context TCAM */
-#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM 0x17UL
-/* L2 Context REMAP */
-#define CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP 0x18UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION 0x14UL
+/* L2 Context TCAM High priority entries */
+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH 0x15UL
+/* L2 Context TCAM Low priority entries */
+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW 0x16UL
+/* L2 Context REMAP high priority entries */
+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH 0x17UL
+/* L2 Context REMAP Low priority entries */
+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW 0x18UL
/* Profile Func */
#define CFA_RESOURCE_TYPE_P4_PROF_FUNC 0x19UL
/* Profile TCAM */
diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h
index 758685e..8fa734a 100644
--- a/drivers/net/bnxt/tf_core/tf_core.h
+++ b/drivers/net/bnxt/tf_core/tf_core.h
@@ -162,7 +162,13 @@ enum tf_identifier_type {
* and can be used in WC TCAM or EM keys to virtualize further
* lookups.
*/
- TF_IDENT_TYPE_L2_CTXT,
+ TF_IDENT_TYPE_L2_CTXT_HIGH,
+ /**
+ * The L2 Context is returned from the L2 Ctxt TCAM lookup
+ * and can be used in WC TCAM or EM keys to virtualize further
+ * lookups.
+ */
+ TF_IDENT_TYPE_L2_CTXT_LOW,
/**
* The WC profile func is returned from the L2 Ctxt TCAM lookup
* to enable virtualization of the profile TCAM.
@@ -270,7 +276,9 @@ enum tf_tbl_type {
*/
enum tf_tcam_tbl_type {
/** L2 Context TCAM */
- TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+ /** L2 Context TCAM */
+ TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
/** Profile TCAM */
TF_TCAM_TBL_TYPE_PROF_TCAM,
/** Wildcard TCAM */
diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h
index 7fabb4b..06c3ecf 100644
--- a/drivers/net/bnxt/tf_core/tf_device_p4.h
+++ b/drivers/net/bnxt/tf_core/tf_device_p4.h
@@ -14,7 +14,8 @@
#include "tf_global_cfg.h"
struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {
- { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID },
@@ -23,7 +24,8 @@ struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {
};
struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {
- { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM },
@@ -45,10 +47,10 @@ struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = {
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B },
- { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_SPORT },
- { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_DPORT },
- { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_S_IPV4 },
- { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_D_IPV4 },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_PORT },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_PORT },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4 },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4 },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER },
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR },
diff --git a/drivers/net/bnxt/tf_core/tf_util.c b/drivers/net/bnxt/tf_core/tf_util.c
index aeee3b3..bf6a6a3 100644
--- a/drivers/net/bnxt/tf_core/tf_util.c
+++ b/drivers/net/bnxt/tf_core/tf_util.c
@@ -24,8 +24,10 @@ const char *
tf_ident_2_str(enum tf_identifier_type id_type)
{
switch (id_type) {
- case TF_IDENT_TYPE_L2_CTXT:
- return "l2_ctxt_remap";
+ case TF_IDENT_TYPE_L2_CTXT_HIGH:
+ return "l2_ctxt_remap_high";
+ case TF_IDENT_TYPE_L2_CTXT_LOW:
+ return "l2_ctxt_remap_low";
case TF_IDENT_TYPE_PROF_FUNC:
return "prof_func";
case TF_IDENT_TYPE_WC_PROF:
@@ -43,8 +45,10 @@ const char *
tf_tcam_tbl_2_str(enum tf_tcam_tbl_type tcam_type)
{
switch (tcam_type) {
- case TF_TCAM_TBL_TYPE_L2_CTXT_TCAM:
- return "l2_ctxt_tcam";
+ case TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH:
+ return "l2_ctxt_tcam_high";
+ case TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW:
+ return "l2_ctxt_tcam_low";
case TF_TCAM_TBL_TYPE_PROF_TCAM:
return "prof_tcam";
case TF_TCAM_TBL_TYPE_WC_TCAM:
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
index 6b0a403..c4ce003 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
@@ -86,7 +86,7 @@ ulp_ctx_session_open(struct bnxt *bp,
resources = ¶ms.resources;
/** RX **/
/* Identifiers */
- resources->ident_cnt[TF_DIR_RX].cnt[TF_IDENT_TYPE_L2_CTXT] = 16;
+ resources->ident_cnt[TF_DIR_RX].cnt[TF_IDENT_TYPE_L2_CTXT_HIGH] = 16;
resources->ident_cnt[TF_DIR_RX].cnt[TF_IDENT_TYPE_WC_PROF] = 8;
resources->ident_cnt[TF_DIR_RX].cnt[TF_IDENT_TYPE_PROF_FUNC] = 8;
resources->ident_cnt[TF_DIR_RX].cnt[TF_IDENT_TYPE_EM_PROF] = 8;
@@ -96,7 +96,8 @@ ulp_ctx_session_open(struct bnxt *bp,
resources->tbl_cnt[TF_DIR_RX].cnt[TF_TBL_TYPE_ACT_STATS_64] = 720;
/* TCAMs */
- resources->tcam_cnt[TF_DIR_RX].cnt[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM] = 16;
+ resources->tcam_cnt[TF_DIR_RX].cnt[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] =
+ 16;
resources->tcam_cnt[TF_DIR_RX].cnt[TF_TCAM_TBL_TYPE_PROF_TCAM] = 8;
resources->tcam_cnt[TF_DIR_RX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] = 416;
@@ -108,7 +109,7 @@ ulp_ctx_session_open(struct bnxt *bp,
/** TX **/
/* Identifiers */
- resources->ident_cnt[TF_DIR_TX].cnt[TF_IDENT_TYPE_L2_CTXT] = 8;
+ resources->ident_cnt[TF_DIR_TX].cnt[TF_IDENT_TYPE_L2_CTXT_HIGH] = 8;
resources->ident_cnt[TF_DIR_TX].cnt[TF_IDENT_TYPE_WC_PROF] = 8;
resources->ident_cnt[TF_DIR_TX].cnt[TF_IDENT_TYPE_PROF_FUNC] = 8;
resources->ident_cnt[TF_DIR_TX].cnt[TF_IDENT_TYPE_EM_PROF] = 8;
@@ -122,7 +123,8 @@ ulp_ctx_session_open(struct bnxt *bp,
resources->tbl_cnt[TF_DIR_TX].cnt[TF_TBL_TYPE_ACT_ENCAP_16B] = 16;
/* TCAMs */
- resources->tcam_cnt[TF_DIR_TX].cnt[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM] = 8;
+ resources->tcam_cnt[TF_DIR_TX].cnt[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] =
+ 8;
resources->tcam_cnt[TF_DIR_TX].cnt[TF_TCAM_TBL_TYPE_PROF_TCAM] = 8;
resources->tcam_cnt[TF_DIR_TX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] = 8;
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
index feac30a..1fd5ab4 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
@@ -162,7 +162,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -217,7 +217,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -264,7 +264,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -297,7 +297,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -316,7 +316,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -335,7 +335,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -390,7 +390,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -437,7 +437,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -470,7 +470,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -489,7 +489,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -522,7 +522,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_RX,
@@ -539,7 +539,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -611,7 +611,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_RX,
@@ -628,7 +628,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -700,7 +700,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
@@ -717,7 +717,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
@@ -5295,7 +5295,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {
struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
- .ident_type = TF_IDENT_TYPE_L2_CTXT,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
.ident_bit_size = 10,
.ident_bit_pos = 0
@@ -5309,7 +5309,7 @@ struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
- .ident_type = TF_IDENT_TYPE_L2_CTXT,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
.ident_bit_size = 10,
.ident_bit_pos = 0
@@ -5323,7 +5323,7 @@ struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
- .ident_type = TF_IDENT_TYPE_L2_CTXT,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
.ident_bit_size = 10,
.ident_bit_pos = 0
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c
index 9a27cbf..24bde57 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c
@@ -345,13 +345,13 @@ struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {
},
[2] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
- .resource_type = TF_IDENT_TYPE_L2_CTXT,
+ .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
.glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_L2_CNTXT_ID,
.direction = TF_DIR_RX
},
[3] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
- .resource_type = TF_IDENT_TYPE_L2_CTXT,
+ .resource_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
.glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_L2_CNTXT_ID,
.direction = TF_DIR_TX
},
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 02/14] net/bnxt: initialize table scope rm parameters
2020-07-17 14:10 [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 01/14] net/bnxt: changes to support new RM and multi-region Somnath Kotur
@ 2020-07-17 14:11 ` Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode Somnath Kotur
2020-07-17 14:17 ` [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
3 siblings, 0 replies; 8+ messages in thread
From: Somnath Kotur @ 2020-07-17 14:11 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit
From: Farah Smith <farah.smith@broadcom.com>
Clear out rm_is_allocated parms before calling as base_index was added and
is not used in this instance.
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
---
drivers/net/bnxt/tf_core/tf_em_common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c
index 10c3f16..0037fce 100644
--- a/drivers/net/bnxt/tf_core/tf_em_common.c
+++ b/drivers/net/bnxt/tf_core/tf_em_common.c
@@ -71,7 +71,7 @@ struct tf_tbl_scope_cb *
tbl_scope_cb_find(uint32_t tbl_scope_id)
{
int i;
- struct tf_rm_is_allocated_parms parms;
+ struct tf_rm_is_allocated_parms parms = { 0 };
int allocated;
uint32_t rm_tbl_scope_id;
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode
2020-07-17 14:10 [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 01/14] net/bnxt: changes to support new RM and multi-region Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 02/14] net/bnxt: initialize table scope rm parameters Somnath Kotur
@ 2020-07-17 14:11 ` Somnath Kotur
2020-07-17 14:17 ` [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
3 siblings, 0 replies; 8+ messages in thread
From: Somnath Kotur @ 2020-07-17 14:11 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit
From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Removed the check to enable default flows only when VF representor
are enabled. It should be enabled all the time in truflow mode.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Michael Baucom <michael.baucom@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
---
drivers/net/bnxt/bnxt_ethdev.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index 318d6b3..0829493 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -1404,8 +1404,7 @@ static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
bnxt_cancel_fc_thread(bp);
if (BNXT_TRUFLOW_EN(bp)) {
- if (bp->rep_info != NULL)
- bnxt_destroy_df_rules(bp);
+ bnxt_destroy_df_rules(bp);
bnxt_ulp_deinit(bp);
}
@@ -1657,7 +1656,7 @@ static int bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
if (rc != 0)
vnic->flags = old_flags;
- if (BNXT_TRUFLOW_EN(bp) && bp->rep_info != NULL)
+ if (BNXT_TRUFLOW_EN(bp))
bnxt_create_df_rules(bp);
return rc;
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH 00/14] bnxt patches
2020-07-17 14:10 [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
` (2 preceding siblings ...)
2020-07-17 14:11 ` [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode Somnath Kotur
@ 2020-07-17 14:17 ` Somnath Kotur
2020-07-17 14:28 ` Thomas Monjalon
3 siblings, 1 reply; 8+ messages in thread
From: Somnath Kotur @ 2020-07-17 14:17 UTC (permalink / raw)
To: dev; +Cc: Ferruh Yigit
On Fri, Jul 17, 2020 at 7:46 PM Somnath Kotur
<somnath.kotur@broadcom.com> wrote:
>
> From: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
>
> Some changes, cleanups/fixes in the TF-ULP layer
>
> Farah Smith (2):
> net/bnxt: initialize table scope rm parameters
> net/bnxt: fix em message size
>
> Jay Ding (1):
> net/bnxt: replace NAT IPv4 action SRC/DEST
>
> Kishore Padmanabha (6):
> net/bnxt: enable default flows in truflow mode
> net/bnxt: add protocol header info based on proto field data
> net/bnxt: fix dereference of a null pointer
> net/bnxt: default egress rule changes
> net/bnxt: update cfa truflow resource allocation numbers
> net/bnxt: enable support for exact match templates
>
> Peter Spreadborough (1):
> net/bnxt: changes to support new RM and multi-region
>
> Randy Schacher (2):
> net/bnxt: clean up em message definition
> net/bnxt: change header to SPDX-License
>
> Somnath Kotur (2):
> net/bnxt: fix to avoid accumulation of flow counters
> net/bnxt: remove unnecessary debug log
>
> drivers/net/bnxt/bnxt_ethdev.c | 5 +-
> drivers/net/bnxt/tf_core/cfa_resource_types.h | 207 +-
> drivers/net/bnxt/tf_core/tf_core.h | 16 +-
> drivers/net/bnxt/tf_core/tf_device_p4.h | 13 +-
> drivers/net/bnxt/tf_core/tf_em_common.c | 2 +-
> drivers/net/bnxt/tf_core/tf_msg.c | 3 +-
> drivers/net/bnxt/tf_core/tf_util.c | 18 +-
> drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 35 +-
> drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 9 +
> drivers/net/bnxt/tf_ulp/ulp_def_rules.c | 11 +-
> drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c | 4 +-
> drivers/net/bnxt/tf_ulp/ulp_mapper.c | 3 -
> drivers/net/bnxt/tf_ulp/ulp_mark_mgr.c | 8 +-
> drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 180 +-
> drivers/net/bnxt/tf_ulp/ulp_template_db_act.c | 2547 +++-
> drivers/net/bnxt/tf_ulp/ulp_template_db_class.c | 17417 ++++++++++++++++++----
> drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h | 328 +-
> drivers/net/bnxt/tf_ulp/ulp_template_db_field.h | 959 +-
> drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c | 478 +-
> drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 1 +
> 20 files changed, 18533 insertions(+), 3711 deletions(-)
>
> --
> 2.7.4
>
Please ignore, missed the 'reply-to'
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH 00/14] bnxt patches
2020-07-17 14:17 ` [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
@ 2020-07-17 14:28 ` Thomas Monjalon
0 siblings, 0 replies; 8+ messages in thread
From: Thomas Monjalon @ 2020-07-17 14:28 UTC (permalink / raw)
To: Somnath Kotur; +Cc: dev, Ferruh Yigit
17/07/2020 16:17, Somnath Kotur:
> On Fri, Jul 17, 2020 at 7:46 PM Somnath Kotur
> <somnath.kotur@broadcom.com> wrote:
> >
> > From: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
> >
> > Some changes, cleanups/fixes in the TF-ULP layer
> >
[...]
> Please ignore, missed the 'reply-to'
Yes, and you missed the version number and the changelog.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode
2020-07-17 14:14 ` [dpdk-dev] [PATCH v2 00/14] bnxt patches Somnath Kotur
@ 2020-07-17 14:14 ` Somnath Kotur
0 siblings, 0 replies; 8+ messages in thread
From: Somnath Kotur @ 2020-07-17 14:14 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit
From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Removed the check to enable default flows only when VF representor
are enabled. It should be enabled all the time in truflow mode.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Michael Baucom <michael.baucom@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
---
drivers/net/bnxt/bnxt_ethdev.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index 318d6b3..0829493 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -1404,8 +1404,7 @@ static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
bnxt_cancel_fc_thread(bp);
if (BNXT_TRUFLOW_EN(bp)) {
- if (bp->rep_info != NULL)
- bnxt_destroy_df_rules(bp);
+ bnxt_destroy_df_rules(bp);
bnxt_ulp_deinit(bp);
}
@@ -1657,7 +1656,7 @@ static int bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
if (rc != 0)
vnic->flags = old_flags;
- if (BNXT_TRUFLOW_EN(bp) && bp->rep_info != NULL)
+ if (BNXT_TRUFLOW_EN(bp))
bnxt_create_df_rules(bp);
return rc;
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode
2020-07-17 9:49 Somnath Kotur
@ 2020-07-17 9:49 ` Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH v2 00/14] bnxt patches Somnath Kotur
1 sibling, 0 replies; 8+ messages in thread
From: Somnath Kotur @ 2020-07-17 9:49 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit
From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Removed the check to enable default flows only when VF representor
are enabled. It should be enabled all the time in truflow mode.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Michael Baucom <michael.baucom@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
---
drivers/net/bnxt/bnxt_ethdev.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index 318d6b3..0829493 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -1404,8 +1404,7 @@ static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
bnxt_cancel_fc_thread(bp);
if (BNXT_TRUFLOW_EN(bp)) {
- if (bp->rep_info != NULL)
- bnxt_destroy_df_rules(bp);
+ bnxt_destroy_df_rules(bp);
bnxt_ulp_deinit(bp);
}
@@ -1657,7 +1656,7 @@ static int bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
if (rc != 0)
vnic->flags = old_flags;
- if (BNXT_TRUFLOW_EN(bp) && bp->rep_info != NULL)
+ if (BNXT_TRUFLOW_EN(bp))
bnxt_create_df_rules(bp);
return rc;
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-07-17 14:29 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-17 14:10 [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 01/14] net/bnxt: changes to support new RM and multi-region Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 02/14] net/bnxt: initialize table scope rm parameters Somnath Kotur
2020-07-17 14:11 ` [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode Somnath Kotur
2020-07-17 14:17 ` [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
2020-07-17 14:28 ` Thomas Monjalon
-- strict thread matches above, loose matches on Subject: below --
2020-07-17 9:49 Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH v2 00/14] bnxt patches Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode Somnath Kotur
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