From: Jon Lin <jon.lin@rock-chips.com> To: broonie@kernel.org Cc: heiko@sntech.de, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jon Lin <jon.lin@rock-chips.com> Subject: [PATCH v2 2/3] spi: rockchip: Support 64-location deep FIFOs Date: Wed, 22 Jul 2020 16:37:36 +0800 [thread overview] Message-ID: <20200722083737.8820-2-jon.lin@rock-chips.com> (raw) In-Reply-To: <20200722083737.8820-1-jon.lin@rock-chips.com> The FIFO depth of SPI V2 is 64 instead of 32, add support for it. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> --- drivers/spi/spi-rockchip.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 63593a5b87fa..a451dacab5cf 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -39,8 +39,9 @@ #define ROCKCHIP_SPI_RISR 0x0034 #define ROCKCHIP_SPI_ICR 0x0038 #define ROCKCHIP_SPI_DMACR 0x003c -#define ROCKCHIP_SPI_DMATDLR 0x0040 -#define ROCKCHIP_SPI_DMARDLR 0x0044 +#define ROCKCHIP_SPI_DMATDLR 0x0040 +#define ROCKCHIP_SPI_DMARDLR 0x0044 +#define ROCKCHIP_SPI_VERSION 0x0048 #define ROCKCHIP_SPI_TXDR 0x0400 #define ROCKCHIP_SPI_RXDR 0x0800 @@ -156,6 +157,8 @@ #define ROCKCHIP_SPI_MAX_TRANLEN 0xffff #define ROCKCHIP_SPI_MAX_CS_NUM 2 +#define ROCKCHIP_SPI_VER2_TYPE1 0x05EC0002 +#define ROCKCHIP_SPI_VER2_TYPE2 0x00110002 struct rockchip_spi { struct device *dev; @@ -206,17 +209,17 @@ static inline void wait_for_idle(struct rockchip_spi *rs) static u32 get_fifo_len(struct rockchip_spi *rs) { - u32 fifo; + u32 ver; - for (fifo = 2; fifo < 32; fifo++) { - writel_relaxed(fifo, rs->regs + ROCKCHIP_SPI_TXFTLR); - if (fifo != readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFTLR)) - break; - } - - writel_relaxed(0, rs->regs + ROCKCHIP_SPI_TXFTLR); + ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION); - return (fifo == 31) ? 0 : fifo; + switch (ver) { + case ROCKCHIP_SPI_VER2_TYPE1: + case ROCKCHIP_SPI_VER2_TYPE2: + return 64; + default: + return 32; + } } static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Jon Lin <jon.lin@rock-chips.com> To: broonie@kernel.org Cc: heiko@sntech.de, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-rockchip@lists.infradead.org, Jon Lin <jon.lin@rock-chips.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/3] spi: rockchip: Support 64-location deep FIFOs Date: Wed, 22 Jul 2020 16:37:36 +0800 [thread overview] Message-ID: <20200722083737.8820-2-jon.lin@rock-chips.com> (raw) In-Reply-To: <20200722083737.8820-1-jon.lin@rock-chips.com> The FIFO depth of SPI V2 is 64 instead of 32, add support for it. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> --- drivers/spi/spi-rockchip.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 63593a5b87fa..a451dacab5cf 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -39,8 +39,9 @@ #define ROCKCHIP_SPI_RISR 0x0034 #define ROCKCHIP_SPI_ICR 0x0038 #define ROCKCHIP_SPI_DMACR 0x003c -#define ROCKCHIP_SPI_DMATDLR 0x0040 -#define ROCKCHIP_SPI_DMARDLR 0x0044 +#define ROCKCHIP_SPI_DMATDLR 0x0040 +#define ROCKCHIP_SPI_DMARDLR 0x0044 +#define ROCKCHIP_SPI_VERSION 0x0048 #define ROCKCHIP_SPI_TXDR 0x0400 #define ROCKCHIP_SPI_RXDR 0x0800 @@ -156,6 +157,8 @@ #define ROCKCHIP_SPI_MAX_TRANLEN 0xffff #define ROCKCHIP_SPI_MAX_CS_NUM 2 +#define ROCKCHIP_SPI_VER2_TYPE1 0x05EC0002 +#define ROCKCHIP_SPI_VER2_TYPE2 0x00110002 struct rockchip_spi { struct device *dev; @@ -206,17 +209,17 @@ static inline void wait_for_idle(struct rockchip_spi *rs) static u32 get_fifo_len(struct rockchip_spi *rs) { - u32 fifo; + u32 ver; - for (fifo = 2; fifo < 32; fifo++) { - writel_relaxed(fifo, rs->regs + ROCKCHIP_SPI_TXFTLR); - if (fifo != readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFTLR)) - break; - } - - writel_relaxed(0, rs->regs + ROCKCHIP_SPI_TXFTLR); + ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION); - return (fifo == 31) ? 0 : fifo; + switch (ver) { + case ROCKCHIP_SPI_VER2_TYPE1: + case ROCKCHIP_SPI_VER2_TYPE2: + return 64; + default: + return 32; + } } static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-22 8:37 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-22 8:37 [PATCH v2 1/3] spi: rockchip: Config spi rx dma burst size depend on xfer length Jon Lin 2020-07-22 8:37 ` Jon Lin 2020-07-22 8:37 ` Jon Lin 2020-07-22 8:37 ` Jon Lin [this message] 2020-07-22 8:37 ` [PATCH v2 2/3] spi: rockchip: Support 64-location deep FIFOs Jon Lin 2020-07-22 8:37 ` [PATCH v2 3/3] spi: rockchip: Fix error in SPI slave pio read Jon Lin 2020-07-22 8:37 ` Jon Lin 2020-07-22 8:37 ` Jon Lin 2020-07-22 12:11 ` Emil Renner Berthing 2020-07-22 12:11 ` Emil Renner Berthing 2020-07-22 12:11 ` Emil Renner Berthing 2020-07-22 12:08 ` [PATCH v2 1/3] spi: rockchip: Config spi rx dma burst size depend on xfer length Emil Renner Berthing 2020-07-22 12:08 ` Emil Renner Berthing 2020-07-22 12:08 ` Emil Renner Berthing 2020-07-30 22:28 ` Mark Brown 2020-07-30 22:28 ` Mark Brown
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