From: Lokesh Vutla <lokeshvutla@ti.com>
To: Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>,
Rob Herring <robh+dt@kernel.org>
Cc: <linux-kernel@vger.kernel.org>,
Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
Sekhar Nori <nsekhar@ti.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
Suman Anna <s-anna@ti.com>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Lokesh Vutla <lokeshvutla@ti.com>
Subject: [PATCH 1/4] dt-bindings: arm: ti: Add bindings for J7200 SoC
Date: Thu, 23 Jul 2020 14:16:25 +0530 [thread overview]
Message-ID: <20200723084628.19241-2-lokeshvutla@ti.com> (raw)
In-Reply-To: <20200723084628.19241-1-lokeshvutla@ti.com>
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Documentation/devicetree/bindings/arm/ti/k3.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt
index 333e7256126a..33419cce0afa 100644
--- a/Documentation/devicetree/bindings/arm/ti/k3.txt
+++ b/Documentation/devicetree/bindings/arm/ti/k3.txt
@@ -16,6 +16,9 @@ architecture it uses, using one of the following compatible values:
- J721E
compatible = "ti,j721e";
+- J7200
+ compatible = "ti,j7200";
+
Boards
------
--
2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Lokesh Vutla <lokeshvutla@ti.com>
To: Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>,
Rob Herring <robh+dt@kernel.org>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>,
Lokesh Vutla <lokeshvutla@ti.com>, Sekhar Nori <nsekhar@ti.com>,
linux-kernel@vger.kernel.org,
Kishon Vijay Abraham I <kishon@ti.com>,
Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>
Subject: [PATCH 1/4] dt-bindings: arm: ti: Add bindings for J7200 SoC
Date: Thu, 23 Jul 2020 14:16:25 +0530 [thread overview]
Message-ID: <20200723084628.19241-2-lokeshvutla@ti.com> (raw)
In-Reply-To: <20200723084628.19241-1-lokeshvutla@ti.com>
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Documentation/devicetree/bindings/arm/ti/k3.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt
index 333e7256126a..33419cce0afa 100644
--- a/Documentation/devicetree/bindings/arm/ti/k3.txt
+++ b/Documentation/devicetree/bindings/arm/ti/k3.txt
@@ -16,6 +16,9 @@ architecture it uses, using one of the following compatible values:
- J721E
compatible = "ti,j721e";
+- J7200
+ compatible = "ti,j7200";
+
Boards
------
--
2.27.0
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-23 8:46 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-23 8:46 [PATCH 0/4] arm64: Initial support for Texas Instrument's J7200 Platform Lokesh Vutla
2020-07-23 8:46 ` Lokesh Vutla
2020-07-23 8:46 ` Lokesh Vutla [this message]
2020-07-23 8:46 ` [PATCH 1/4] dt-bindings: arm: ti: Add bindings for J7200 SoC Lokesh Vutla
2020-08-27 0:23 ` Nishanth Menon
2020-08-27 0:23 ` Nishanth Menon
2020-08-27 4:40 ` Lokesh Vutla
2020-08-27 4:40 ` Lokesh Vutla
2020-07-23 8:46 ` [PATCH 2/4] dt-bindings: arm: ti: Convert K3 board/soc bindings to DT schema Lokesh Vutla
2020-07-23 8:46 ` Lokesh Vutla
2020-07-23 8:46 ` [PATCH 3/4] arm64: dts: ti: Add support for J7200 SoC Lokesh Vutla
2020-07-23 8:46 ` Lokesh Vutla
2020-07-23 20:39 ` Suman Anna
2020-07-23 20:39 ` Suman Anna
2020-07-28 19:16 ` Grygorii Strashko
2020-07-28 19:16 ` Grygorii Strashko
2020-07-28 19:50 ` Suman Anna
2020-07-28 19:50 ` Suman Anna
2020-07-23 8:46 ` [PATCH 4/4] arm64: dts: ti: Add support for J7200 Common Processor Board Lokesh Vutla
2020-07-23 8:46 ` Lokesh Vutla
2020-07-23 20:39 ` Suman Anna
2020-07-23 20:39 ` Suman Anna
2020-07-28 19:19 ` [PATCH 0/4] arm64: Initial support for Texas Instrument's J7200 Platform Grygorii Strashko
2020-07-28 19:19 ` Grygorii Strashko
2020-07-28 19:50 ` Grygorii Strashko
2020-07-28 19:50 ` Grygorii Strashko
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