* [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl @ 2020-07-23 17:41 Chris Wilson 2020-07-23 17:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Stall " Chris Wilson ` (6 more replies) 0 siblings, 7 replies; 12+ messages in thread From: Chris Wilson @ 2020-07-23 17:41 UTC (permalink / raw) To: intel-gfx; +Cc: Chris Wilson Unlike rcs where we have conclusive evidence from our selftesting that disabling the preparser before performing the TLB invalidate and relocations does impact upon the GPU execution, the evidence for the same requirement on xcs is much more circumstantial. Let's apply the preparser disable between batches as we invalidate the TLB as a dose of healthy paranoia, just in case. References: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_lrc.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 29c0fde8b4df..353b1717fe84 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -4764,14 +4764,21 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) intel_engine_mask_t aux_inv = 0; u32 cmd, *cs; + cmd = 4; + if (mode & EMIT_INVALIDATE) + cmd += 2; if (mode & EMIT_INVALIDATE) aux_inv = request->engine->mask & ~BIT(BCS0); + if (aux_inv) + cmd += 2 * hweight8(aux_inv) + 2; - cs = intel_ring_begin(request, - 4 + (aux_inv ? 2 * hweight8(aux_inv) + 2 : 0)); + cs = intel_ring_begin(request, cmd); if (IS_ERR(cs)) return PTR_ERR(cs); + if (mode & EMIT_INVALIDATE) + *cs++ = preparser_disable(true); + cmd = MI_FLUSH_DW + 1; /* We always require a command barrier so that subsequent @@ -4804,6 +4811,10 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) } *cs++ = MI_NOOP; } + + if (mode & EMIT_INVALIDATE) + *cs++ = preparser_disable(false); + intel_ring_advance(request, cs); return 0; -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/gt: Stall around xcs invalidations on tgl 2020-07-23 17:41 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Chris Wilson @ 2020-07-23 17:41 ` Chris Wilson 2020-07-23 17:49 ` Chris Wilson 2020-07-23 18:10 ` [Intel-gfx] [PATCH] " Chris Wilson 2020-07-23 17:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: Disable preparser " Patchwork ` (5 subsequent siblings) 6 siblings, 2 replies; 12+ messages in thread From: Chris Wilson @ 2020-07-23 17:41 UTC (permalink / raw) To: intel-gfx; +Cc: Chris Wilson Whether this is an arbitrary stall or a vital ingredient, neverthess the impact is noticeable. If we do not have the stall around the xcs invalidation before a request, writes within that request sometimes go astray. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 353b1717fe84..7767459549a5 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -4761,10 +4761,12 @@ static int gen12_emit_flush_render(struct i915_request *request, static int gen12_emit_flush(struct i915_request *request, u32 mode) { +#define WA_CNT 12 /* Magic delay or size of some internal pipelined buffer? */ intel_engine_mask_t aux_inv = 0; u32 cmd, *cs; + int n; - cmd = 4; + cmd = 4 * WA_CNT; if (mode & EMIT_INVALIDATE) cmd += 2; if (mode & EMIT_INVALIDATE) @@ -4781,7 +4783,8 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) cmd = MI_FLUSH_DW + 1; - /* We always require a command barrier so that subsequent + /* + * We always require a command barrier so that subsequent * commands, such as breadcrumb interrupts, are strictly ordered * wrt the contents of the write cache being flushed to memory * (and thus being coherent from the CPU). @@ -4794,10 +4797,12 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) cmd |= MI_INVALIDATE_BSD; } - *cs++ = cmd; - *cs++ = LRC_PPHWSP_SCRATCH_ADDR; - *cs++ = 0; /* upper addr */ - *cs++ = 0; /* value */ + for (n = 0; n < WA_CNT; n++) { + *cs++ = cmd; + *cs++ = LRC_PPHWSP_SCRATCH_ADDR; + *cs++ = 0; /* upper addr */ + *cs++ = 0; /* value */ + } if (aux_inv) { /* hsdes: 1809175790 */ struct intel_engine_cs *engine; @@ -4818,6 +4823,7 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) intel_ring_advance(request, cs); return 0; +#undef WA_CNT } static void assert_request_valid(struct i915_request *rq) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Stall around xcs invalidations on tgl 2020-07-23 17:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Stall " Chris Wilson @ 2020-07-23 17:49 ` Chris Wilson 2020-07-23 18:10 ` [Intel-gfx] [PATCH] " Chris Wilson 1 sibling, 0 replies; 12+ messages in thread From: Chris Wilson @ 2020-07-23 17:49 UTC (permalink / raw) To: intel-gfx Quoting Chris Wilson (2020-07-23 18:41:44) > Whether this is an arbitrary stall or a vital ingredient, neverthess the > impact is noticeable. If we do not have the stall around the xcs > invalidation before a request, writes within that request sometimes go > astray. > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 353b1717fe84..7767459549a5 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -4761,10 +4761,12 @@ static int gen12_emit_flush_render(struct i915_request *request, > > static int gen12_emit_flush(struct i915_request *request, u32 mode) > { > +#define WA_CNT 12 /* Magic delay or size of some internal pipelined buffer? */ 12 is not enough. I repeat, 12 is not enough. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gt: Stall around xcs invalidations on tgl 2020-07-23 17:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Stall " Chris Wilson 2020-07-23 17:49 ` Chris Wilson @ 2020-07-23 18:10 ` Chris Wilson 2020-07-24 7:38 ` Mika Kuoppala 1 sibling, 1 reply; 12+ messages in thread From: Chris Wilson @ 2020-07-23 18:10 UTC (permalink / raw) To: intel-gfx; +Cc: Chris Wilson Whether this is an arbitrary stall or a vital ingredient, neverthess the impact is noticeable. If we do not have the stall around the xcs invalidation before a request, writes within that request sometimes go astray. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 353b1717fe84..7d914527d236 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -4761,10 +4761,12 @@ static int gen12_emit_flush_render(struct i915_request *request, static int gen12_emit_flush(struct i915_request *request, u32 mode) { +#define WA_CNT 16 /* Magic delay or size of some internal pipelined buffer? */ intel_engine_mask_t aux_inv = 0; u32 cmd, *cs; + int n; - cmd = 4; + cmd = 4 * WA_CNT; if (mode & EMIT_INVALIDATE) cmd += 2; if (mode & EMIT_INVALIDATE) @@ -4781,7 +4783,8 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) cmd = MI_FLUSH_DW + 1; - /* We always require a command barrier so that subsequent + /* + * We always require a command barrier so that subsequent * commands, such as breadcrumb interrupts, are strictly ordered * wrt the contents of the write cache being flushed to memory * (and thus being coherent from the CPU). @@ -4794,10 +4797,12 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) cmd |= MI_INVALIDATE_BSD; } - *cs++ = cmd; - *cs++ = LRC_PPHWSP_SCRATCH_ADDR; - *cs++ = 0; /* upper addr */ - *cs++ = 0; /* value */ + for (n = 0; n < WA_CNT; n++) { + *cs++ = cmd; + *cs++ = LRC_PPHWSP_SCRATCH_ADDR; + *cs++ = 0; /* upper addr */ + *cs++ = 0; /* value */ + } if (aux_inv) { /* hsdes: 1809175790 */ struct intel_engine_cs *engine; @@ -4818,6 +4823,7 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) intel_ring_advance(request, cs); return 0; +#undef WA_CNT } static void assert_request_valid(struct i915_request *rq) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gt: Stall around xcs invalidations on tgl 2020-07-23 18:10 ` [Intel-gfx] [PATCH] " Chris Wilson @ 2020-07-24 7:38 ` Mika Kuoppala 2020-07-24 8:29 ` Chris Wilson 0 siblings, 1 reply; 12+ messages in thread From: Mika Kuoppala @ 2020-07-24 7:38 UTC (permalink / raw) To: Chris Wilson, intel-gfx; +Cc: Chris Wilson Chris Wilson <chris@chris-wilson.co.uk> writes: > Whether this is an arbitrary stall or a vital ingredient, neverthess the > impact is noticeable. If we do not have the stall around the xcs > invalidation before a request, writes within that request sometimes go > astray. > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 353b1717fe84..7d914527d236 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -4761,10 +4761,12 @@ static int gen12_emit_flush_render(struct i915_request *request, > > static int gen12_emit_flush(struct i915_request *request, u32 mode) > { > +#define WA_CNT 16 /* Magic delay or size of some internal pipelined buffer? */ Odd, very odd indeed. I looked at the selftest in question. For completeness, there should be READ_ONCE on where the hwsp is read, but that is just a makeup. But how about forcing the write completion check on, on the actual write to the hwsp? It is enabled with bit 10. -Mika > intel_engine_mask_t aux_inv = 0; > u32 cmd, *cs; > + int n; > > - cmd = 4; > + cmd = 4 * WA_CNT; > if (mode & EMIT_INVALIDATE) > cmd += 2; > if (mode & EMIT_INVALIDATE) > @@ -4781,7 +4783,8 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) > > cmd = MI_FLUSH_DW + 1; > > - /* We always require a command barrier so that subsequent > + /* > + * We always require a command barrier so that subsequent > * commands, such as breadcrumb interrupts, are strictly ordered > * wrt the contents of the write cache being flushed to memory > * (and thus being coherent from the CPU). > @@ -4794,10 +4797,12 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) > cmd |= MI_INVALIDATE_BSD; > } > > - *cs++ = cmd; > - *cs++ = LRC_PPHWSP_SCRATCH_ADDR; > - *cs++ = 0; /* upper addr */ > - *cs++ = 0; /* value */ > + for (n = 0; n < WA_CNT; n++) { > + *cs++ = cmd; > + *cs++ = LRC_PPHWSP_SCRATCH_ADDR; > + *cs++ = 0; /* upper addr */ > + *cs++ = 0; /* value */ > + } > > if (aux_inv) { /* hsdes: 1809175790 */ > struct intel_engine_cs *engine; > @@ -4818,6 +4823,7 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) > intel_ring_advance(request, cs); > > return 0; > +#undef WA_CNT > } > > static void assert_request_valid(struct i915_request *rq) > -- > 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gt: Stall around xcs invalidations on tgl 2020-07-24 7:38 ` Mika Kuoppala @ 2020-07-24 8:29 ` Chris Wilson 0 siblings, 0 replies; 12+ messages in thread From: Chris Wilson @ 2020-07-24 8:29 UTC (permalink / raw) To: Mika Kuoppala, intel-gfx Quoting Mika Kuoppala (2020-07-24 08:38:56) > Chris Wilson <chris@chris-wilson.co.uk> writes: > > > Whether this is an arbitrary stall or a vital ingredient, neverthess the > > impact is noticeable. If we do not have the stall around the xcs > > invalidation before a request, writes within that request sometimes go > > astray. > > > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > > --- > > drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++++++++++++------ > > 1 file changed, 12 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > > index 353b1717fe84..7d914527d236 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > > @@ -4761,10 +4761,12 @@ static int gen12_emit_flush_render(struct i915_request *request, > > > > static int gen12_emit_flush(struct i915_request *request, u32 mode) > > { > > +#define WA_CNT 16 /* Magic delay or size of some internal pipelined buffer? */ > > Odd, very odd indeed. > > I looked at the selftest in question. For completeness, there should be > READ_ONCE on where the hwsp is read, but that is just a makeup. > > But how about forcing the write completion check on, on the actual > write to the hwsp? It is enabled with bit 10. Nope. Which is a relief, since I'd working on the assumption that the delay needs to be before the write not after. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl 2020-07-23 17:41 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Chris Wilson 2020-07-23 17:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Stall " Chris Wilson @ 2020-07-23 17:56 ` Patchwork 2020-07-23 18:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork ` (4 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2020-07-23 17:56 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl URL : https://patchwork.freedesktop.org/series/79820/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl 2020-07-23 17:41 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Chris Wilson 2020-07-23 17:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Stall " Chris Wilson 2020-07-23 17:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: Disable preparser " Patchwork @ 2020-07-23 18:17 ` Patchwork 2020-07-23 18:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) Patchwork ` (3 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2020-07-23 18:17 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 8574 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl URL : https://patchwork.freedesktop.org/series/79820/ State : success == Summary == CI Bug Log - changes from CI_DRM_8778 -> Patchwork_18232 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/index.html Known issues ------------ Here are the changes found in Patchwork_18232 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s3: - fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html * igt@gem_render_linear_blits@basic: - fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-y/igt@gem_render_linear_blits@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-tgl-y/igt@gem_render_linear_blits@basic.html * igt@i915_module_load@reload: - fi-byt-j1900: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-byt-j1900/igt@i915_module_load@reload.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-byt-j1900/igt@i915_module_load@reload.html - fi-bsw-kefka: [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-bsw-kefka/igt@i915_module_load@reload.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-bsw-kefka/igt@i915_module_load@reload.html * igt@kms_busy@basic@flip: - fi-tgl-y: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-y/igt@kms_busy@basic@flip.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-tgl-y/igt@kms_busy@basic@flip.html * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1: - fi-icl-u2: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html * igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2: - fi-skl-guc: [PASS][13] -> [DMESG-WARN][14] ([i915#2203]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2.html #### Possible fixes #### * igt@gem_exec_store@basic: - fi-tgl-y: [DMESG-WARN][15] ([i915#402]) -> [PASS][16] +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-y/igt@gem_exec_store@basic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-tgl-y/igt@gem_exec_store@basic.html * igt@gem_exec_suspend@basic-s0: - fi-tgl-u2: [FAIL][17] ([i915#1888]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html * igt@i915_pm_rpm@basic-pci-d3-state: - fi-byt-j1900: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html - fi-bsw-kefka: [DMESG-WARN][21] ([i915#1982]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html * igt@kms_flip@basic-flip-vs-modeset@b-dsi1: - {fi-tgl-dsi}: [DMESG-WARN][23] ([i915#1982]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-modeset@b-dsi1.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-modeset@b-dsi1.html * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: - fi-tgl-u2: [DMESG-WARN][25] ([i915#402]) -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html #### Warnings #### * igt@gem_exec_suspend@basic-s0: - fi-kbl-x1275: [DMESG-WARN][27] ([i915#62] / [i915#92]) -> [DMESG-WARN][28] ([i915#1982] / [i915#62] / [i915#92]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html * igt@i915_module_load@reload: - fi-icl-u2: [DMESG-WARN][29] ([i915#289]) -> [DMESG-WARN][30] ([i915#1982] / [i915#289]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-icl-u2/igt@i915_module_load@reload.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-icl-u2/igt@i915_module_load@reload.html * igt@i915_pm_rpm@module-reload: - fi-kbl-guc: [DMESG-FAIL][31] ([i915#2203]) -> [DMESG-WARN][32] ([i915#2203]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy: - fi-kbl-x1275: [DMESG-WARN][33] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][34] ([i915#62] / [i915#92]) +3 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html * igt@kms_force_connector_basic@force-edid: - fi-kbl-x1275: [DMESG-WARN][35] ([i915#62] / [i915#92]) -> [DMESG-WARN][36] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203 [i915#289]: https://gitlab.freedesktop.org/drm/intel/issues/289 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (47 -> 40) ------------------------------ Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * Linux: CI_DRM_8778 -> Patchwork_18232 CI-20190529: 20190529 CI_DRM_8778: 5ead5989a42079951e6f0b7b6a072a690df0b985 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5744: 89ef04d90cf2b96c72820c1927034cf716ea37f7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18232: c2416ddca5214ff02d9caf9bba7742a8666fbed9 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c2416ddca521 drm/i915/gt: Stall around xcs invalidations on tgl a5fbb8d9b2be drm/i915/gt: Disable preparser around xcs invalidations on tgl == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18232/index.html [-- Attachment #1.2: Type: text/html, Size: 11268 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) 2020-07-23 17:41 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Chris Wilson ` (2 preceding siblings ...) 2020-07-23 18:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2020-07-23 18:21 ` Patchwork 2020-07-23 18:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork ` (2 subsequent siblings) 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2020-07-23 18:21 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) URL : https://patchwork.freedesktop.org/series/79820/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) 2020-07-23 17:41 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Chris Wilson ` (3 preceding siblings ...) 2020-07-23 18:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) Patchwork @ 2020-07-23 18:42 ` Patchwork 2020-07-23 20:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2020-07-24 7:08 ` [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Mika Kuoppala 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2020-07-23 18:42 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 7217 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) URL : https://patchwork.freedesktop.org/series/79820/ State : success == Summary == CI Bug Log - changes from CI_DRM_8778 -> Patchwork_18233 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/index.html Known issues ------------ Here are the changes found in Patchwork_18233 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s3: - fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html * igt@gem_render_linear_blits@basic: - fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-y/igt@gem_render_linear_blits@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-tgl-y/igt@gem_render_linear_blits@basic.html * igt@i915_module_load@reload: - fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-y/igt@i915_module_load@reload.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-tgl-y/igt@i915_module_load@reload.html * igt@i915_pm_rpm@module-reload: - fi-bsw-n3050: [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-bsw-n3050/igt@i915_pm_rpm@module-reload.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-bsw-n3050/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live@active: - fi-bsw-kefka: [PASS][9] -> [DMESG-FAIL][10] ([i915#541]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-bsw-kefka/igt@i915_selftest@live@active.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-bsw-kefka/igt@i915_selftest@live@active.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-bsw-kefka: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html #### Possible fixes #### * igt@gem_exec_store@basic: - fi-tgl-y: [DMESG-WARN][13] ([i915#402]) -> [PASS][14] +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-y/igt@gem_exec_store@basic.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-tgl-y/igt@gem_exec_store@basic.html * igt@i915_pm_rpm@basic-pci-d3-state: - fi-byt-j1900: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-byt-j1900/igt@i915_pm_rpm@basic-pci-d3-state.html - fi-bsw-kefka: [DMESG-WARN][17] ([i915#1982]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html * igt@kms_flip@basic-flip-vs-modeset@b-dsi1: - {fi-tgl-dsi}: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-modeset@b-dsi1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-modeset@b-dsi1.html * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: - fi-tgl-u2: [DMESG-WARN][21] ([i915#402]) -> [PASS][22] +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html #### Warnings #### * igt@debugfs_test@read_all_entries: - fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][24] ([i915#62] / [i915#92]) +3 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-kbl-x1275/igt@debugfs_test@read_all_entries.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-kbl-x1275/igt@debugfs_test@read_all_entries.html * igt@i915_pm_rpm@module-reload: - fi-kbl-guc: [DMESG-FAIL][25] ([i915#2203]) -> [DMESG-WARN][26] ([i915#2203]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html * igt@kms_force_connector_basic@force-edid: - fi-kbl-x1275: [DMESG-WARN][27] ([i915#62] / [i915#92]) -> [DMESG-WARN][28] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (47 -> 40) ------------------------------ Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * Linux: CI_DRM_8778 -> Patchwork_18233 CI-20190529: 20190529 CI_DRM_8778: 5ead5989a42079951e6f0b7b6a072a690df0b985 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5744: 89ef04d90cf2b96c72820c1927034cf716ea37f7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18233: 10b8f5c9b78c9282f18d0092e919f31700971f6d @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 10b8f5c9b78c drm/i915/gt: Stall around xcs invalidations on tgl 38b90bb2f01e drm/i915/gt: Disable preparser around xcs invalidations on tgl == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/index.html [-- Attachment #1.2: Type: text/html, Size: 9164 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) 2020-07-23 17:41 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Chris Wilson ` (4 preceding siblings ...) 2020-07-23 18:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2020-07-23 20:45 ` Patchwork 2020-07-24 7:08 ` [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Mika Kuoppala 6 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2020-07-23 20:45 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 16165 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) URL : https://patchwork.freedesktop.org/series/79820/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8778_full -> Patchwork_18233_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_18233_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18233_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_18233_full: ### IGT changes ### #### Possible regressions #### * igt@gem_exec_schedule@deep@bcs0: - shard-tglb: [PASS][1] -> [SKIP][2] +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-tglb7/igt@gem_exec_schedule@deep@bcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-tglb8/igt@gem_exec_schedule@deep@bcs0.html Known issues ------------ Here are the changes found in Patchwork_18233_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_balancer@bonded-early: - shard-kbl: [PASS][3] -> [FAIL][4] ([i915#2079]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl3/igt@gem_exec_balancer@bonded-early.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl6/igt@gem_exec_balancer@bonded-early.html * igt@gem_exec_whisper@basic-queues-forked: - shard-glk: [PASS][5] -> [DMESG-WARN][6] ([i915#118] / [i915#95]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-glk4/igt@gem_exec_whisper@basic-queues-forked.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-glk2/igt@gem_exec_whisper@basic-queues-forked.html * igt@gen9_exec_parse@allowed-single: - shard-skl: [PASS][7] -> [DMESG-WARN][8] ([i915#1436] / [i915#716]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl8/igt@gen9_exec_parse@allowed-single.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl4/igt@gen9_exec_parse@allowed-single.html * igt@kms_big_fb@x-tiled-64bpp-rotate-0: - shard-glk: [PASS][9] -> [DMESG-FAIL][10] ([i915#118] / [i915#95]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-glk1/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-glk8/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html * igt@kms_big_fb@x-tiled-8bpp-rotate-180: - shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl1/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl4/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-16bpp-rotate-0: - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([i915#1635] / [i915#1982]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-apl2/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-apl7/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [PASS][15] -> [FAIL][16] ([IGT#5]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2: - shard-glk: [PASS][17] -> [FAIL][18] ([i915#79]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1: - shard-kbl: [PASS][19] -> [FAIL][20] ([i915#79]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#79]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html * igt@kms_flip@flip-vs-panning-interruptible@a-edp1: - shard-skl: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) +13 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl1/igt@kms_flip@flip-vs-panning-interruptible@a-edp1.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl2/igt@kms_flip@flip-vs-panning-interruptible@a-edp1.html * igt@kms_flip@flip-vs-suspend@b-edp1: - shard-skl: [PASS][25] -> [INCOMPLETE][26] ([i915#198]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl1/igt@kms_flip@flip-vs-suspend@b-edp1.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl2/igt@kms_flip@flip-vs-suspend@b-edp1.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render: - shard-iclb: [PASS][27] -> [FAIL][28] ([i915#49]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][29] -> [FAIL][30] ([i915#1188]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_hdr@bpc-switch-suspend: - shard-kbl: [PASS][31] -> [DMESG-WARN][32] ([i915#180]) +10 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl2/igt@kms_hdr@bpc-switch-suspend.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl7/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) +1 similar issue [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-iclb2/igt@kms_psr@psr2_no_drrs.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-iclb7/igt@kms_psr@psr2_no_drrs.html * igt@kms_setmode@basic: - shard-kbl: [PASS][35] -> [FAIL][36] ([i915#31]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl6/igt@kms_setmode@basic.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl1/igt@kms_setmode@basic.html #### Possible fixes #### * igt@gem_exec_whisper@basic-queues: - shard-glk: [DMESG-WARN][37] ([i915#118] / [i915#95]) -> [PASS][38] +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-glk9/igt@gem_exec_whisper@basic-queues.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-glk4/igt@gem_exec_whisper@basic-queues.html * igt@kms_big_fb@y-tiled-64bpp-rotate-0: - shard-glk: [DMESG-FAIL][39] ([i915#118] / [i915#95]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-glk8/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-glk1/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-180: - shard-kbl: [DMESG-WARN][41] ([i915#1982]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl4/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl2/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html - shard-apl: [DMESG-WARN][43] ([i915#1635] / [i915#1982]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-apl1/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-apl6/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html * igt@kms_color@pipe-a-ctm-negative: - shard-skl: [FAIL][45] ([i915#131]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl5/igt@kms_color@pipe-a-ctm-negative.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl2/igt@kms_color@pipe-a-ctm-negative.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [DMESG-WARN][47] ([i915#180]) -> [PASS][48] +9 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-tglb: [DMESG-WARN][49] ([i915#1982]) -> [PASS][50] +3 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-tglb6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-tglb3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary: - shard-skl: [FAIL][51] ([i915#49]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl5/igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl2/igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary.html * igt@kms_frontbuffer_tracking@psr-suspend: - shard-skl: [INCOMPLETE][53] ([i915#123]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl4/igt@kms_frontbuffer_tracking@psr-suspend.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl6/igt@kms_frontbuffer_tracking@psr-suspend.html * igt@kms_hdr@bpc-switch: - shard-skl: [FAIL][55] ([i915#1188]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl6/igt@kms_hdr@bpc-switch.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl6/igt@kms_hdr@bpc-switch.html * igt@kms_plane@plane-panning-top-left-pipe-c-planes: - shard-skl: [DMESG-WARN][57] ([i915#1982]) -> [PASS][58] +12 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl6/igt@kms_plane@plane-panning-top-left-pipe-c-planes.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl8/igt@kms_plane@plane-panning-top-left-pipe-c-planes.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [FAIL][59] ([fdo#108145] / [i915#265]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_cursor_plane_move: - shard-iclb: [SKIP][61] ([fdo#109441]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-iclb5/igt@kms_psr@psr2_cursor_plane_move.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html * igt@kms_setmode@basic: - shard-skl: [FAIL][63] ([i915#31]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-skl8/igt@kms_setmode@basic.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-skl8/igt@kms_setmode@basic.html * igt@perf_pmu@module-unload: - shard-tglb: [DMESG-WARN][65] ([i915#402]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-tglb1/igt@perf_pmu@module-unload.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-tglb5/igt@perf_pmu@module-unload.html * igt@perf_pmu@semaphore-busy@rcs0: - shard-kbl: [FAIL][67] ([i915#1820]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl7/igt@perf_pmu@semaphore-busy@rcs0.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl3/igt@perf_pmu@semaphore-busy@rcs0.html #### Warnings #### * igt@kms_content_protection@atomic-dpms: - shard-kbl: [TIMEOUT][69] ([i915#1319] / [i915#1958] / [i915#2119]) -> [TIMEOUT][70] ([i915#1319] / [i915#2119]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8778/shard-kbl4/igt@kms_content_protection@atomic-dpms.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/shard-kbl7/igt@kms_content_protection@atomic-dpms.html [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123 [i915#131]: https://gitlab.freedesktop.org/drm/intel/issues/131 [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1820]: https://gitlab.freedesktop.org/drm/intel/issues/1820 [i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2079]: https://gitlab.freedesktop.org/drm/intel/issues/2079 [i915#2119]: https://gitlab.freedesktop.org/drm/intel/issues/2119 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_8778 -> Patchwork_18233 CI-20190529: 20190529 CI_DRM_8778: 5ead5989a42079951e6f0b7b6a072a690df0b985 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5744: 89ef04d90cf2b96c72820c1927034cf716ea37f7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18233: 10b8f5c9b78c9282f18d0092e919f31700971f6d @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18233/index.html [-- Attachment #1.2: Type: text/html, Size: 19085 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl 2020-07-23 17:41 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Chris Wilson ` (5 preceding siblings ...) 2020-07-23 20:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork @ 2020-07-24 7:08 ` Mika Kuoppala 6 siblings, 0 replies; 12+ messages in thread From: Mika Kuoppala @ 2020-07-24 7:08 UTC (permalink / raw) To: Chris Wilson, intel-gfx; +Cc: Chris Wilson Chris Wilson <chris@chris-wilson.co.uk> writes: > Unlike rcs where we have conclusive evidence from our selftesting that > disabling the preparser before performing the TLB invalidate and > relocations does impact upon the GPU execution, the evidence for the > same requirement on xcs is much more circumstantial. Let's apply the > preparser disable between batches as we invalidate the TLB as a dose of > healthy paranoia, just in case. > > References: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 29c0fde8b4df..353b1717fe84 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -4764,14 +4764,21 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) > intel_engine_mask_t aux_inv = 0; > u32 cmd, *cs; > > + cmd = 4; > + if (mode & EMIT_INVALIDATE) > + cmd += 2; > if (mode & EMIT_INVALIDATE) > aux_inv = request->engine->mask & ~BIT(BCS0); > + if (aux_inv) > + cmd += 2 * hweight8(aux_inv) + 2; > > - cs = intel_ring_begin(request, > - 4 + (aux_inv ? 2 * hweight8(aux_inv) + 2 : 0)); > + cs = intel_ring_begin(request, cmd); > if (IS_ERR(cs)) > return PTR_ERR(cs); > > + if (mode & EMIT_INVALIDATE) > + *cs++ = preparser_disable(true); > + > cmd = MI_FLUSH_DW + 1; > > /* We always require a command barrier so that subsequent > @@ -4804,6 +4811,10 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) > } > *cs++ = MI_NOOP; > } > + > + if (mode & EMIT_INVALIDATE) > + *cs++ = preparser_disable(false); > + > intel_ring_advance(request, cs); > > return 0; > -- > 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-07-24 8:29 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-07-23 17:41 [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Chris Wilson 2020-07-23 17:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Stall " Chris Wilson 2020-07-23 17:49 ` Chris Wilson 2020-07-23 18:10 ` [Intel-gfx] [PATCH] " Chris Wilson 2020-07-24 7:38 ` Mika Kuoppala 2020-07-24 8:29 ` Chris Wilson 2020-07-23 17:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: Disable preparser " Patchwork 2020-07-23 18:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-07-23 18:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl (rev2) Patchwork 2020-07-23 18:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-07-23 20:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2020-07-24 7:08 ` [Intel-gfx] [PATCH 1/2] drm/i915/gt: Disable preparser around xcs invalidations on tgl Mika Kuoppala
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