From: Daniel Palmer <daniel@0x0f.com>
To: soc@kernel.org
Cc: arnd@arndb.de, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Daniel Palmer <daniel@0x0f.com>
Subject: [PATCH 1/7] ARM:mstar: Add IMI SRAM region
Date: Sun, 26 Jul 2020 13:39:42 +0900 [thread overview]
Message-ID: <20200726043948.1357573-2-daniel@0x0f.com> (raw)
In-Reply-To: <20200726043948.1357573-1-daniel@0x0f.com>
All MStar v7 SoCs have an internal SRAM region that is between 64KB
(infinity2m) and 128KB(infinity3, mercury5).
The region is always at the same base address and is used for the
second stage loader (MStar IPL or u-boot SPL) and will be used for
the DDR self-refresh entry code within the kernel eventually.
This patch adds a 128KB region to the SoC and the minimum 64KB SRAM
region to the base dtsi. Families with more SRAM will override the
size in their family level dtsi.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
arch/arm/boot/dts/mstar-v7.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 3b99bb435bb5..6bc55fdbee04 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -45,7 +45,8 @@ soc: soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x16001000 0x16001000 0x00007000>,
- <0x1f000000 0x1f000000 0x00400000>;
+ <0x1f000000 0x1f000000 0x00400000>,
+ <0xa0000000 0xa0000000 0x20000>;
gic: interrupt-controller@16001000 {
compatible = "arm,cortex-a7-gic";
@@ -78,6 +79,11 @@ pm_uart: uart@221000 {
clock-frequency = <172000000>;
status = "disabled";
};
+ };
+
+ imi: sram@a0000000 {
+ compatible = "mmio-sram";
+ reg = <0xa0000000 0x10000>;
};
};
};
--
2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Palmer <daniel@0x0f.com>
To: soc@kernel.org
Cc: Daniel Palmer <daniel@0x0f.com>,
linux-arm-kernel@lists.infradead.org, arnd@arndb.de,
linux-kernel@vger.kernel.org
Subject: [PATCH 1/7] ARM:mstar: Add IMI SRAM region
Date: Sun, 26 Jul 2020 13:39:42 +0900 [thread overview]
Message-ID: <20200726043948.1357573-2-daniel@0x0f.com> (raw)
In-Reply-To: <20200726043948.1357573-1-daniel@0x0f.com>
All MStar v7 SoCs have an internal SRAM region that is between 64KB
(infinity2m) and 128KB(infinity3, mercury5).
The region is always at the same base address and is used for the
second stage loader (MStar IPL or u-boot SPL) and will be used for
the DDR self-refresh entry code within the kernel eventually.
This patch adds a 128KB region to the SoC and the minimum 64KB SRAM
region to the base dtsi. Families with more SRAM will override the
size in their family level dtsi.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
arch/arm/boot/dts/mstar-v7.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 3b99bb435bb5..6bc55fdbee04 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -45,7 +45,8 @@ soc: soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x16001000 0x16001000 0x00007000>,
- <0x1f000000 0x1f000000 0x00400000>;
+ <0x1f000000 0x1f000000 0x00400000>,
+ <0xa0000000 0xa0000000 0x20000>;
gic: interrupt-controller@16001000 {
compatible = "arm,cortex-a7-gic";
@@ -78,6 +79,11 @@ pm_uart: uart@221000 {
clock-frequency = <172000000>;
status = "disabled";
};
+ };
+
+ imi: sram@a0000000 {
+ compatible = "mmio-sram";
+ reg = <0xa0000000 0x10000>;
};
};
};
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-26 4:40 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-26 4:39 [PATCH 0/7] ARM:mstar: DT filling out Daniel Palmer
2020-07-26 4:39 ` Daniel Palmer
2020-07-26 4:39 ` Daniel Palmer [this message]
2020-07-26 4:39 ` [PATCH 1/7] ARM:mstar: Add IMI SRAM region Daniel Palmer
2020-07-26 4:39 ` [PATCH 2/7] ARM:mstar: Adjust IMI size of infinity Daniel Palmer
2020-07-26 4:39 ` Daniel Palmer
2020-07-26 4:39 ` [PATCH 3/7] ARM:mstar: Adjust IMI size for mercury5 Daniel Palmer
2020-07-26 4:39 ` Daniel Palmer
2020-07-26 4:39 ` [PATCH 4/7] ARM:mstar: Adjust IMI size for infinity3 Daniel Palmer
2020-07-26 4:39 ` Daniel Palmer
2020-07-26 4:39 ` [PATCH 5/7] ARM:mstar: Add PMU Daniel Palmer
2020-07-26 4:39 ` Daniel Palmer
2020-07-26 4:39 ` [PATCH 6/7] ARM:mstar: Add syscon node for "pmsleep" area Daniel Palmer
2020-07-26 4:39 ` Daniel Palmer
2020-07-27 7:49 ` Arnd Bergmann
2020-07-27 7:49 ` Arnd Bergmann
2020-07-26 4:39 ` [PATCH 7/7] ARM:mstar: Add reboot support Daniel Palmer
2020-07-26 4:39 ` Daniel Palmer
2020-07-27 12:33 ` [PATCH 0/7] ARM:mstar: DT filling out Arnd Bergmann
2020-07-27 12:33 ` Arnd Bergmann
2020-07-27 13:26 ` Daniel Palmer
2020-07-27 13:26 ` Daniel Palmer
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200726043948.1357573-2-daniel@0x0f.com \
--to=daniel@0x0f.com \
--cc=arnd@arndb.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=soc@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.