From: Will Deacon <will@kernel.org> To: Marc Zyngier <maz@kernel.org> Cc: kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/7] KVM: arm64: Update comment when skipping guest MMIO access instruction Date: Mon, 27 Jul 2020 11:30:59 +0100 [thread overview] Message-ID: <20200727103059.GC20194@willie-the-truck> (raw) In-Reply-To: <87v9iawn2r.wl-maz@kernel.org> On Sun, Jul 26, 2020 at 12:08:28PM +0100, Marc Zyngier wrote: > On Fri, 24 Jul 2020 15:35:00 +0100, > Will Deacon <will@kernel.org> wrote: > > > > If a 32-bit guest accesses MMIO using a 16-bit Thumb-2 instruction that > > is reported to the hypervisor without a valid syndrom (for example, > > because of the addressing mode), then we may hand off the fault to > > userspace. When resuming the guest, we unconditionally advance the PC > > by 4 bytes, since ESR_EL2.IL is always 1 for data aborts generated without > > a valid syndrome. This is a bit rubbish, but it's also difficult to see > > how we can fix it without potentially introducing regressions in userspace > > MMIO fault handling. > > Not quite, see below. > > > > > Update the comment when skipping a guest MMIO access instruction so that > > this corner case is at least written down. > > > > Cc: Marc Zyngier <maz@kernel.org> > > Cc: Quentin Perret <qperret@google.com> > > Signed-off-by: Will Deacon <will@kernel.org> > > --- > > arch/arm64/kvm/mmio.c | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/arch/arm64/kvm/mmio.c b/arch/arm64/kvm/mmio.c > > index 4e0366759726..b54ea5aa6c06 100644 > > --- a/arch/arm64/kvm/mmio.c > > +++ b/arch/arm64/kvm/mmio.c > > @@ -113,6 +113,13 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run) > > /* > > * The MMIO instruction is emulated and should not be re-executed > > * in the guest. > > + * > > + * Note: If user space handled the emulation because the abort > > + * symdrome information was not valid (ISV set in the ESR), then > > nits: syndrome, ISV *clear*. Duh, thanks. > > + * this will assume that the faulting instruction was 32-bit. > > + * If the faulting instruction was a 16-bit Thumb instruction, > > + * then userspace would need to rewind the PC by 2 bytes prior to > > + * resuming the vCPU (yuck!). > > */ > > kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); > > > > That's not how I read it. On ESR_EL2.ISV being clear, and in the > absence of KVM_CAP_ARM_NISV_TO_USER being set, we return a -ENOSYS from > io_mem_abort(), exiting back to userspace *without* advertising a MMIO > access. The VMM is free to do whatever it can to handle it (i.e. not > much), but crucially we don't go via kvm_handle_mmio_return() on > resuming the vcpu (unless the VMM sets run->exit_reason to > KVM_EXIT_MMIO, but that's clearly its own decision). > > Instead, the expectation is that userspace willing to handle an exit > resulting in ESR_EL2.ISV being clear would instead request a > KVM_EXIT_ARM_NISV exit type (by enabling KVM_CAP_ARM_NISV_TO_USER), > getting extra information in the process such as as the fault > IPA). KVM_EXIT_ARM_NISV clearly states in the documentation: > > "Note that KVM does not skip the faulting instruction as it does for > KVM_EXIT_MMIO, but userspace has to emulate any change to the > processing state if it decides to decode and emulate the instruction." Thanks, I think you're right. I _thought_ we always reported EXIT_MMIO for write faults on read-only memslots (as per the documented behaviour), but actually that goes down the io_mem_abort() path too and so the skipping only ever occurs when the syndrome is valid. I'll drop this patch. Will _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org> To: Marc Zyngier <maz@kernel.org> Cc: Suzuki Poulose <suzuki.poulose@arm.com>, Quentin Perret <qperret@google.com>, James Morse <james.morse@arm.com>, kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/7] KVM: arm64: Update comment when skipping guest MMIO access instruction Date: Mon, 27 Jul 2020 11:30:59 +0100 [thread overview] Message-ID: <20200727103059.GC20194@willie-the-truck> (raw) In-Reply-To: <87v9iawn2r.wl-maz@kernel.org> On Sun, Jul 26, 2020 at 12:08:28PM +0100, Marc Zyngier wrote: > On Fri, 24 Jul 2020 15:35:00 +0100, > Will Deacon <will@kernel.org> wrote: > > > > If a 32-bit guest accesses MMIO using a 16-bit Thumb-2 instruction that > > is reported to the hypervisor without a valid syndrom (for example, > > because of the addressing mode), then we may hand off the fault to > > userspace. When resuming the guest, we unconditionally advance the PC > > by 4 bytes, since ESR_EL2.IL is always 1 for data aborts generated without > > a valid syndrome. This is a bit rubbish, but it's also difficult to see > > how we can fix it without potentially introducing regressions in userspace > > MMIO fault handling. > > Not quite, see below. > > > > > Update the comment when skipping a guest MMIO access instruction so that > > this corner case is at least written down. > > > > Cc: Marc Zyngier <maz@kernel.org> > > Cc: Quentin Perret <qperret@google.com> > > Signed-off-by: Will Deacon <will@kernel.org> > > --- > > arch/arm64/kvm/mmio.c | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/arch/arm64/kvm/mmio.c b/arch/arm64/kvm/mmio.c > > index 4e0366759726..b54ea5aa6c06 100644 > > --- a/arch/arm64/kvm/mmio.c > > +++ b/arch/arm64/kvm/mmio.c > > @@ -113,6 +113,13 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run) > > /* > > * The MMIO instruction is emulated and should not be re-executed > > * in the guest. > > + * > > + * Note: If user space handled the emulation because the abort > > + * symdrome information was not valid (ISV set in the ESR), then > > nits: syndrome, ISV *clear*. Duh, thanks. > > + * this will assume that the faulting instruction was 32-bit. > > + * If the faulting instruction was a 16-bit Thumb instruction, > > + * then userspace would need to rewind the PC by 2 bytes prior to > > + * resuming the vCPU (yuck!). > > */ > > kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); > > > > That's not how I read it. On ESR_EL2.ISV being clear, and in the > absence of KVM_CAP_ARM_NISV_TO_USER being set, we return a -ENOSYS from > io_mem_abort(), exiting back to userspace *without* advertising a MMIO > access. The VMM is free to do whatever it can to handle it (i.e. not > much), but crucially we don't go via kvm_handle_mmio_return() on > resuming the vcpu (unless the VMM sets run->exit_reason to > KVM_EXIT_MMIO, but that's clearly its own decision). > > Instead, the expectation is that userspace willing to handle an exit > resulting in ESR_EL2.ISV being clear would instead request a > KVM_EXIT_ARM_NISV exit type (by enabling KVM_CAP_ARM_NISV_TO_USER), > getting extra information in the process such as as the fault > IPA). KVM_EXIT_ARM_NISV clearly states in the documentation: > > "Note that KVM does not skip the faulting instruction as it does for > KVM_EXIT_MMIO, but userspace has to emulate any change to the > processing state if it decides to decode and emulate the instruction." Thanks, I think you're right. I _thought_ we always reported EXIT_MMIO for write faults on read-only memslots (as per the documented behaviour), but actually that goes down the io_mem_abort() path too and so the skipping only ever occurs when the syndrome is valid. I'll drop this patch. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-27 10:31 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-24 14:34 [PATCH 0/7] KVM: arm64: Fixes to early stage-2 fault handling Will Deacon 2020-07-24 14:34 ` Will Deacon 2020-07-24 14:35 ` [PATCH 1/7] KVM: arm64: Update comment when skipping guest MMIO access instruction Will Deacon 2020-07-24 14:35 ` Will Deacon 2020-07-26 11:08 ` Marc Zyngier 2020-07-26 11:08 ` Marc Zyngier 2020-07-27 10:30 ` Will Deacon [this message] 2020-07-27 10:30 ` Will Deacon 2020-07-24 14:35 ` [PATCH 2/7] KVM: arm64: Rename kvm_vcpu_dabt_isextabt() Will Deacon 2020-07-24 14:35 ` Will Deacon 2020-07-26 11:15 ` Marc Zyngier 2020-07-26 11:15 ` Marc Zyngier 2020-07-27 10:30 ` Will Deacon 2020-07-27 10:30 ` Will Deacon 2020-07-24 14:35 ` [PATCH 3/7] KVM: arm64: Handle data and instruction external aborts the same way Will Deacon 2020-07-24 14:35 ` Will Deacon 2020-07-24 14:35 ` [PATCH 4/7] KVM: arm64: Remove useless local variable Will Deacon 2020-07-24 14:35 ` Will Deacon 2020-07-24 14:35 ` [PATCH 5/7] KVM: arm64: Move 'invalid syndrome' logic out of io_mem_abort() Will Deacon 2020-07-24 14:35 ` Will Deacon 2020-07-26 11:55 ` Marc Zyngier 2020-07-26 11:55 ` Marc Zyngier 2020-07-27 10:31 ` Will Deacon 2020-07-27 10:31 ` Will Deacon 2020-07-24 14:35 ` [PATCH 6/7] KVM: arm64: Handle stage-2 faults on stage-1 page-table walks earlier Will Deacon 2020-07-24 14:35 ` Will Deacon 2020-07-26 13:38 ` Marc Zyngier 2020-07-26 13:38 ` Marc Zyngier 2020-07-27 10:29 ` Will Deacon 2020-07-27 10:29 ` Will Deacon 2020-07-24 14:35 ` [PATCH 7/7] KVM: arm64: Separate write faults on read-only memslots from MMIO Will Deacon 2020-07-24 14:35 ` Will Deacon
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