* [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer
@ 2020-07-30 0:48 Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 1/6] drm/i915: Allow removal of whitelist register and refactor Umesh Nerlige Ramappa
` (9 more replies)
0 siblings, 10 replies; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-07-30 0:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
This cover letter is included to trigger "Test-with" an IGT patch.
Tests - https://patchwork.freedesktop.org/series/80059/
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Test-with: 20200730004603.8171-1-umesh.nerlige.ramappa@intel.com
Piotr Maciejewski (4):
drm/i915/perf: Ensure observation logic is not clock gated
drm/i915/perf: Whitelist OA report trigger registers
drm/i915/perf: Whitelist OA counter and buffer registers
drm/i915/perf: Map OA buffer to user space for gen12 performance query
Umesh Nerlige Ramappa (2):
drm/i915: Allow removal of whitelist register and refactor
drm/i915/selftests: Clear flags when using wa->reg for comparison
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 157 +++++++++++++---
drivers/gpu/drm/i915/gt/intel_workarounds.h | 3 +
.../gpu/drm/i915/gt/selftest_workarounds.c | 3 +
drivers/gpu/drm/i915/i915_perf.c | 169 +++++++++++++++++-
drivers/gpu/drm/i915/i915_perf_types.h | 5 +
drivers/gpu/drm/i915/i915_reg.h | 10 ++
include/uapi/drm/i915_drm.h | 16 ++
9 files changed, 339 insertions(+), 28 deletions(-)
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 1/6] drm/i915: Allow removal of whitelist register and refactor
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
@ 2020-07-30 0:48 ` Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 2/6] drm/i915/selftests: Clear flags when using wa->reg for comparison Umesh Nerlige Ramappa
` (8 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-07-30 0:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
- Add a helper to remove whitelisted register from the list.
- Refactor _wa_add to use _wa_index to find an existing whitelisted
register.
- Free the old list when growing the whitelist.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 82 +++++++++++++++------
1 file changed, 58 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index cef1c122696f..98927f5d63ab 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -81,10 +81,49 @@ static void wa_init_finish(struct i915_wa_list *wal)
wal->wa_count, wal->name, wal->engine_name);
}
+static int _wa_index(struct i915_wa_list *wal, i915_reg_t reg)
+{
+ unsigned int addr = i915_mmio_reg_offset(reg);
+ int start = 0, end = wal->count;
+
+ while (start < end) {
+ int mid = start + (end - start) / 2;
+ unsigned int wal_reg = i915_mmio_reg_offset(wal->list[mid].reg);
+
+ wal_reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
+ if (wal_reg < addr)
+ start = mid + 1;
+ else if (wal_reg > addr)
+ end = mid;
+ else
+ return mid;
+ }
+
+ return -1;
+}
+
+static void _wa_remove(struct i915_wa_list *wal, i915_reg_t reg)
+{
+ int index = _wa_index(wal, reg);
+ struct i915_wa *wa = wal->list;
+
+ if (index < 0)
+ return;
+
+ memset(wa + index, 0, sizeof(*wa));
+
+ while (index < wal->count - 1) {
+ swap(wa[index], wa[index + 1]);
+ index++;
+ }
+
+ wal->count--;
+}
+
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
{
- unsigned int addr = i915_mmio_reg_offset(wa->reg);
- unsigned int start = 0, end = wal->count;
+ int index;
const unsigned int grow = WA_LIST_CHUNK;
struct i915_wa *wa_;
@@ -100,36 +139,31 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
return;
}
- if (wal->list)
+ if (wal->list) {
memcpy(list, wal->list, sizeof(*wa) * wal->count);
+ kfree(wal->list);
+ }
wal->list = list;
}
- while (start < end) {
- unsigned int mid = start + (end - start) / 2;
+ index = _wa_index(wal, wa->reg);
+ if (index >= 0) {
+ wa_ = &wal->list[index];
- if (i915_mmio_reg_offset(wal->list[mid].reg) < addr) {
- start = mid + 1;
- } else if (i915_mmio_reg_offset(wal->list[mid].reg) > addr) {
- end = mid;
- } else {
- wa_ = &wal->list[mid];
-
- if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
- DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
- i915_mmio_reg_offset(wa_->reg),
- wa_->clr, wa_->set);
-
- wa_->set &= ~wa->clr;
- }
+ if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
+ DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
+ i915_mmio_reg_offset(wa_->reg),
+ wa_->clr, wa_->set);
- wal->wa_count++;
- wa_->set |= wa->set;
- wa_->clr |= wa->clr;
- wa_->read |= wa->read;
- return;
+ wa_->set &= ~wa->clr;
}
+
+ wal->wa_count++;
+ wa_->set |= wa->set;
+ wa_->clr |= wa->clr;
+ wa_->read |= wa->read;
+ return;
}
wal->wa_count++;
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 2/6] drm/i915/selftests: Clear flags when using wa->reg for comparison
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 1/6] drm/i915: Allow removal of whitelist register and refactor Umesh Nerlige Ramappa
@ 2020-07-30 0:48 ` Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 3/6] drm/i915/perf: Ensure observation logic is not clock gated Umesh Nerlige Ramappa
` (7 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-07-30 0:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
The flags field of the wa->reg has whitelist settings as opposed to the
value returned from i915_mmio_reg_offset(reg). Clear the flags before
compare.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index febc9e6692ba..3753f65f62b1 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -918,6 +918,9 @@ static bool find_reg(struct drm_i915_private *i915,
{
u32 offset = i915_mmio_reg_offset(reg);
+ /* Clear non priv flags */
+ offset &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
while (count--) {
if (INTEL_INFO(i915)->gen_mask & tbl->gen_mask &&
i915_mmio_reg_offset(tbl->reg) == offset)
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 3/6] drm/i915/perf: Ensure observation logic is not clock gated
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 1/6] drm/i915: Allow removal of whitelist register and refactor Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 2/6] drm/i915/selftests: Clear flags when using wa->reg for comparison Umesh Nerlige Ramappa
@ 2020-07-30 0:48 ` Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 4/6] drm/i915/perf: Whitelist OA report trigger registers Umesh Nerlige Ramappa
` (6 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-07-30 0:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
From: Piotr Maciejewski <piotr.maciejewski@intel.com>
A clock gating switch can control if the performance monitoring and
observation logic is enaled or not. Ensure that we enable the clocks.
v2: Separate code from other patches (Lionel)
v3: Reset PMON enable when disabling perf to save power (Lionel)
Fixes: 00a7f0d7155c ("drm/i915/tgl: Add perf support on TGL")
Signed-off-by: Piotr Maciejewski <piotr.maciejewski@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
drivers/gpu/drm/i915/i915_perf.c | 13 +++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 2 ++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index c6f6370283cf..fe408c327d3c 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2493,6 +2493,14 @@ gen12_enable_metric_set(struct i915_perf_stream *stream,
(period_exponent << GEN12_OAG_OAGLBCTXCTRL_TIMER_PERIOD_SHIFT))
: 0);
+ /*
+ * Initialize Super Queue Internal Cnt Register
+ * Set PMON Enable in order to collect valid metrics.
+ */
+ intel_uncore_write(uncore, GEN12_SQCNT1,
+ intel_uncore_read(uncore, GEN12_SQCNT1) |
+ GEN12_SQCNT1_PMON_ENABLE);
+
/*
* Update all contexts prior writing the mux configurations as we need
* to make sure all slices/subslices are ON before writing to NOA
@@ -2552,6 +2560,11 @@ static void gen12_disable_metric_set(struct i915_perf_stream *stream)
/* Make sure we disable noa to save power. */
intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);
+
+ /* Reset PMON Enable to save power. */
+ intel_uncore_write(uncore, GEN12_SQCNT1,
+ intel_uncore_read(uncore, GEN12_SQCNT1) &
+ ~GEN12_SQCNT1_PMON_ENABLE);
}
static void gen7_oa_enable(struct i915_perf_stream *stream)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a0d31f3bf634..9cc3e312b6b7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -696,6 +696,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define OABUFFER_SIZE_16M (7 << 3)
#define GEN12_OA_TLB_INV_CR _MMIO(0xceec)
+#define GEN12_SQCNT1 _MMIO(0x8718)
+#define GEN12_SQCNT1_PMON_ENABLE (1 << 30)
/* Gen12 OAR unit */
#define GEN12_OAR_OACONTROL _MMIO(0x2960)
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 4/6] drm/i915/perf: Whitelist OA report trigger registers
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
` (2 preceding siblings ...)
2020-07-30 0:48 ` [Intel-gfx] [PATCH 3/6] drm/i915/perf: Ensure observation logic is not clock gated Umesh Nerlige Ramappa
@ 2020-07-30 0:48 ` Umesh Nerlige Ramappa
2020-07-30 8:14 ` Chris Wilson
2020-07-30 0:48 ` [Intel-gfx] [PATCH 5/6] drm/i915/perf: Whitelist OA counter and buffer registers Umesh Nerlige Ramappa
` (5 subsequent siblings)
9 siblings, 1 reply; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-07-30 0:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
From: Piotr Maciejewski <piotr.maciejewski@intel.com>
OA reports can be triggered into the OA buffer by writing into the
OAREPORTTRIG registers. Whitelist the registers to allow non-privileged
user to trigger reports.
Whitelist registers only if perf_stream_paranoid is set to 0. In
i915_perf_open_ioctl, this setting is checked and the whitelist is
enabled accordingly. On closing the perf fd, the whitelist is removed.
This ensures that the access to the whitelist is gated by
perf_stream_paranoid.
v2:
- Move related change to this patch (Lionel)
- Bump up perf revision (Lionel)
v3: Pardon whitelisted registers for selftest (Umesh)
v4: Document supported gens for the feature (Lionel)
v5: Whitelist registers only if perf_stream_paranoid is set to 0 (Jon)
Signed-off-by: Piotr Maciejewski <piotr.maciejewski@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 67 +++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_workarounds.h | 3 +
drivers/gpu/drm/i915/i915_perf.c | 33 +++++++++-
drivers/gpu/drm/i915/i915_perf_types.h | 5 ++
4 files changed, 105 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 98927f5d63ab..e096282ad547 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1671,6 +1671,73 @@ void intel_engine_apply_whitelist(struct intel_engine_cs *engine)
i915_mmio_reg_offset(RING_NOPID(base)));
}
+struct i915_oa_wl {
+ i915_reg_t reg;
+ u32 flags;
+} gen9_oa_regs[] = {
+ { OAREPORTTRIG2, RING_FORCE_TO_NONPRIV_ACCESS_RW },
+ { OAREPORTTRIG6, RING_FORCE_TO_NONPRIV_ACCESS_RW },
+}, gen12_oa_regs[] = {
+ { GEN12_OAG_OAREPORTTRIG2, RING_FORCE_TO_NONPRIV_ACCESS_RW },
+ { GEN12_OAG_OAREPORTTRIG6, RING_FORCE_TO_NONPRIV_ACCESS_RW },
+};
+
+static void whitelist_delete_perf_counters(struct i915_wa_list *wal,
+ struct i915_oa_wl *regs,
+ int count)
+{
+ while (count--) {
+ _wa_remove(wal, regs->reg);
+ regs++;
+ }
+
+ wa_init_finish(wal);
+}
+
+static void whitelist_build_perf_counters(struct i915_wa_list *wal,
+ struct i915_oa_wl *regs,
+ int count)
+{
+ while (count--) {
+ whitelist_reg_ext(wal, regs->reg, regs->flags);
+ regs++;
+ }
+}
+
+void intel_engine_apply_oa_whitelist(struct intel_engine_cs *engine)
+{
+ struct i915_wa_list *w = &engine->whitelist;
+ struct drm_i915_private *i915 = engine->i915;
+
+ if (IS_GEN(i915, 12))
+ whitelist_build_perf_counters(w, gen12_oa_regs,
+ ARRAY_SIZE(gen12_oa_regs));
+ else if (INTEL_GEN(i915) > 8)
+ whitelist_build_perf_counters(w, gen9_oa_regs,
+ ARRAY_SIZE(gen9_oa_regs));
+ else
+ return;
+
+ intel_engine_apply_whitelist(engine);
+}
+
+void intel_engine_remove_oa_whitelist(struct intel_engine_cs *engine)
+{
+ struct i915_wa_list *w = &engine->whitelist;
+ struct drm_i915_private *i915 = engine->i915;
+
+ if (IS_GEN(i915, 12))
+ whitelist_delete_perf_counters(w, gen12_oa_regs,
+ ARRAY_SIZE(gen12_oa_regs));
+ else if (INTEL_GEN(i915) > 8)
+ whitelist_delete_perf_counters(w, gen9_oa_regs,
+ ARRAY_SIZE(gen9_oa_regs));
+ else
+ return;
+
+ intel_engine_apply_whitelist(engine);
+}
+
static void
rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
{
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h b/drivers/gpu/drm/i915/gt/intel_workarounds.h
index 8c9c769c2204..5ad3f44f615d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h
@@ -32,6 +32,9 @@ bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from);
void intel_engine_init_whitelist(struct intel_engine_cs *engine);
void intel_engine_apply_whitelist(struct intel_engine_cs *engine);
+void intel_engine_apply_oa_whitelist(struct intel_engine_cs *engine);
+void intel_engine_remove_oa_whitelist(struct intel_engine_cs *engine);
+
void intel_engine_init_workarounds(struct intel_engine_cs *engine);
void intel_engine_apply_workarounds(struct intel_engine_cs *engine);
int intel_engine_verify_workarounds(struct intel_engine_cs *engine,
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index fe408c327d3c..0e2313d50c91 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -201,6 +201,7 @@
#include "gt/intel_gt.h"
#include "gt/intel_lrc_reg.h"
#include "gt/intel_ring.h"
+#include "gt/intel_workarounds.h"
#include "i915_drv.h"
#include "i915_perf.h"
@@ -1353,6 +1354,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
BUG_ON(stream != perf->exclusive_stream);
+ if (stream->oa_whitelisted)
+ intel_engine_remove_oa_whitelist(stream->engine);
+
/*
* Unset exclusive_stream first, it will be checked while disabling
* the metric set on gen8+.
@@ -1448,7 +1452,8 @@ static void gen8_init_oa_buffer(struct i915_perf_stream *stream)
* bit."
*/
intel_uncore_write(uncore, GEN8_OABUFFER, gtt_offset |
- OABUFFER_SIZE_16M | GEN8_OABUFFER_MEM_SELECT_GGTT);
+ OABUFFER_SIZE_16M | GEN8_OABUFFER_MEM_SELECT_GGTT |
+ GEN7_OABUFFER_EDGE_TRIGGER);
intel_uncore_write(uncore, GEN8_OATAILPTR, gtt_offset & GEN8_OATAILPTR_MASK);
/* Mark that we need updated tail pointers to read from... */
@@ -1501,7 +1506,8 @@ static void gen12_init_oa_buffer(struct i915_perf_stream *stream)
* bit."
*/
intel_uncore_write(uncore, GEN12_OAG_OABUFFER, gtt_offset |
- OABUFFER_SIZE_16M | GEN8_OABUFFER_MEM_SELECT_GGTT);
+ OABUFFER_SIZE_16M | GEN8_OABUFFER_MEM_SELECT_GGTT |
+ GEN7_OABUFFER_EDGE_TRIGGER);
intel_uncore_write(uncore, GEN12_OAG_OATAILPTR,
gtt_offset & GEN12_OAG_OATAILPTR_MASK);
@@ -3474,6 +3480,22 @@ i915_perf_open_ioctl_locked(struct i915_perf *perf,
if (!(param->flags & I915_PERF_FLAG_DISABLED))
i915_perf_enable_locked(stream);
+ /*
+ * OA whitelist allows non-privileged access to some OA counters for
+ * triggering reports into the OA buffer. This is only allowed if
+ * perf_stream_paranoid is set to 0 by the sysadmin.
+ *
+ * We want to make sure this is almost the last thing we do before
+ * returning the stream fd. If we do end up checking for errors in code
+ * that follows this, we MUST call intel_engine_remove_oa_whitelist in
+ * the error handling path to remove the whitelisted registers.
+ */
+ if (!i915_perf_stream_paranoid &&
+ props->sample_flags & SAMPLE_OA_REPORT) {
+ intel_engine_apply_oa_whitelist(stream->engine);
+ stream->oa_whitelisted = true;
+ }
+
/* Take a reference on the driver that will be kept with stream_fd
* until its release.
*/
@@ -4445,8 +4467,13 @@ int i915_perf_ioctl_version(void)
*
* 5: Add DRM_I915_PERF_PROP_POLL_OA_PERIOD parameter that controls the
* interval for the hrtimer used to check for OA data.
+ *
+ * 6: Whitelist OATRIGGER registers to allow user to trigger reports
+ * into the OA buffer. This applies only to gen8+. The feature can
+ * only be accessed if perf_stream_paranoid is set to 0 by privileged
+ * user.
*/
- return 5;
+ return 6;
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h
index a36a455ae336..35f8240fd6ce 100644
--- a/drivers/gpu/drm/i915/i915_perf_types.h
+++ b/drivers/gpu/drm/i915/i915_perf_types.h
@@ -311,6 +311,11 @@ struct i915_perf_stream {
* buffer should be checked for available data.
*/
u64 poll_oa_period;
+
+ /**
+ * @oa_whitelisted: Indicates that the oa registers are whitelisted.
+ */
+ bool oa_whitelisted;
};
/**
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 5/6] drm/i915/perf: Whitelist OA counter and buffer registers
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
` (3 preceding siblings ...)
2020-07-30 0:48 ` [Intel-gfx] [PATCH 4/6] drm/i915/perf: Whitelist OA report trigger registers Umesh Nerlige Ramappa
@ 2020-07-30 0:48 ` Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query Umesh Nerlige Ramappa
` (4 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-07-30 0:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
From: Piotr Maciejewski <piotr.maciejewski@intel.com>
It is useful to have markers in the OA reports to identify triggered
reports. Whitelist some OA counters that can be used as markers.
A triggered report can be found faster if we can sample the HW tail and
head registers when the report was triggered. Whitelist OA buffer
specific registers.
v2:
- Bump up the perf revision (Lionel)
- Use indexing for counters (Lionel)
- Fix selftest for oa ticking register (Umesh)
v3: Pardon whitelisted registers for selftest (Umesh)
v4:
- Document whitelisted registers (Lionel)
- Fix live isolated whitelist for OA regs (Umesh)
v5:
- Free up whitelist slots. Remove GPU_TICKS and A20 counter (Piotr)
- Whitelist registers only if perf_stream_paranoid is set to 0 (Jon)
Signed-off-by: Piotr Maciejewski <piotr.maciejewski@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 ++++++++
drivers/gpu/drm/i915/i915_perf.c | 10 +++++++++-
drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
3 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index e096282ad547..f4bd15d6b75f 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1677,9 +1677,17 @@ struct i915_oa_wl {
} gen9_oa_regs[] = {
{ OAREPORTTRIG2, RING_FORCE_TO_NONPRIV_ACCESS_RW },
{ OAREPORTTRIG6, RING_FORCE_TO_NONPRIV_ACCESS_RW },
+ { OA_PERF_COUNTER_A(18), RING_FORCE_TO_NONPRIV_ACCESS_RW |
+ RING_FORCE_TO_NONPRIV_RANGE_4 },
+ { GEN8_OASTATUS, RING_FORCE_TO_NONPRIV_ACCESS_RD |
+ RING_FORCE_TO_NONPRIV_RANGE_4 },
}, gen12_oa_regs[] = {
{ GEN12_OAG_OAREPORTTRIG2, RING_FORCE_TO_NONPRIV_ACCESS_RW },
{ GEN12_OAG_OAREPORTTRIG6, RING_FORCE_TO_NONPRIV_ACCESS_RW },
+ { GEN12_OAG_PERF_COUNTER_A(18), RING_FORCE_TO_NONPRIV_ACCESS_RW |
+ RING_FORCE_TO_NONPRIV_RANGE_4 },
+ { GEN12_OAG_OASTATUS, RING_FORCE_TO_NONPRIV_ACCESS_RD |
+ RING_FORCE_TO_NONPRIV_RANGE_4 },
};
static void whitelist_delete_perf_counters(struct i915_wa_list *wal,
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 0e2313d50c91..9b55521cb09b 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -4472,8 +4472,16 @@ int i915_perf_ioctl_version(void)
* into the OA buffer. This applies only to gen8+. The feature can
* only be accessed if perf_stream_paranoid is set to 0 by privileged
* user.
+ *
+ * 7: Whitelist below OA registers for user to identify the location of
+ * triggered reports in the OA buffer. This applies only to gen8+.
+ * The feature can only be accessed if perf_stream_paranoid is set to
+ * 0 by privileged user.
+ *
+ * - OA buffer head/tail/status/buffer registers for read only
+ * - OA counters A18, A19, A20 for read/write
*/
- return 6;
+ return 7;
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9cc3e312b6b7..6b30f076d8eb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -974,6 +974,14 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define OAREPORTTRIG8_NOA_SELECT_6_SHIFT 24
#define OAREPORTTRIG8_NOA_SELECT_7_SHIFT 28
+/* Performance counters registers */
+#define OA_PERF_COUNTER_A(idx) _MMIO(0x2800 + 8 * (idx))
+#define OA_PERF_COUNTER_A_UPPER(idx) _MMIO(0x2800 + 8 * (idx) + 4)
+
+/* Gen12 Performance counters registers */
+#define GEN12_OAG_PERF_COUNTER_A(idx) _MMIO(0xD980 + 8 * (idx))
+#define GEN12_OAG_PERF_COUNTER_A_UPPER(idx) _MMIO(0xD980 + 8 * (idx) + 4)
+
/* Same layout as OASTARTTRIGX */
#define GEN12_OAG_OASTARTTRIG1 _MMIO(0xd900)
#define GEN12_OAG_OASTARTTRIG2 _MMIO(0xd904)
--
2.20.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
` (4 preceding siblings ...)
2020-07-30 0:48 ` [Intel-gfx] [PATCH 5/6] drm/i915/perf: Whitelist OA counter and buffer registers Umesh Nerlige Ramappa
@ 2020-07-30 0:48 ` Umesh Nerlige Ramappa
2020-07-30 9:00 ` Chris Wilson
2020-07-30 9:08 ` Chris Wilson
2020-07-30 1:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Allow privileged user to map the OA buffer (rev6) Patchwork
` (3 subsequent siblings)
9 siblings, 2 replies; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-07-30 0:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
From: Piotr Maciejewski <piotr.maciejewski@intel.com>
i915 used to support time based sampling mode which is good for overall
system monitoring, but is not enough for query mode used to measure a
single draw call or dispatch. Gen9-Gen11 are using current i915 perf
implementation for query, but Gen12+ requires a new approach for query
based on triggered reports within oa buffer.
Triggering reports into the OA buffer is achieved by writing into a
a trigger register. Optionally an unused counter/register is set with a
marker value such that a triggered report can be identified in the OA
buffer. Reports are usually triggered at the start and end of work that
is measured.
Since OA buffer is large and queries can be frequent, an efficient way
to look for triggered reports is required. By knowing the current head
and tail offsets into the OA buffer, it is easier to determine the
locality of the reports of interest.
Current perf OA interface does not expose head/tail information to the
user and it filters out invalid reports before sending data to user.
Also considering limited size of user buffer used during a query,
creating a 1:1 copy of the OA buffer at the user space added undesired
complexity.
The solution was to map the OA buffer to user space provided
(1) that it is accessed from a privileged user.
(2) OA report filtering is not used.
These 2 conditions would satisfy the safety criteria that the current
perf interface addresses.
To enable the query:
- Add an ioctl to expose head and tail to the user
- Add an ioctl to return size and offset of the OA buffer
- Map the OA buffer to the user space
v2:
- Improve commit message (Chris)
- Do not mmap based on gem object filp. Instead, use perf_fd and support
mmap syscall (Chris)
- Pass non-zero offset in mmap to enforce the right object is
mapped (Chris)
- Do not expose gpu_address (Chris)
- Verify start and length of vma for page alignment (Lionel)
- Move SQNTL config out (Lionel)
v3: (Chris)
- Omit redundant checks
- Return VM_FAULT_SIGBUS is old stream is closed
- Maintain reference counts to stream in vm_open and vm_close
- Use switch to identify object to be mapped
v4: Call kref_put on closing perf fd (Chris)
v5:
- Strip access to OA buffer from unprivileged child of a privileged
parent. Use VM_DONTCOPY
- Enforce MAP_PRIVATE by checking for VM_MAYSHARE
v6:
(Chris)
- Use len of -1 in unmap_mapping_range
- Don't use stream->oa_buffer.vma->obj in vm_fault_oa
- Use kernel block comment style
- do_mmap gets a reference to the file and puts it in do_munmap, so
no need to maintain a reference to i915_perf_stream. Hence, remove
vm_open/vm_close and stream->closed hooks/checks.
(Umesh)
- Do not allow mmap if SAMPLE_OA_REPORT is not set during
i915_perf_open_ioctl.
- Drop ioctl returning head/tail since this information is already
whitelisted. Remove hooks to read head register.
Signed-off-by: Piotr Maciejewski <piotr.maciejewski@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 +
drivers/gpu/drm/i915/i915_perf.c | 117 ++++++++++++++++++++++-
include/uapi/drm/i915_drm.h | 16 ++++
4 files changed, 135 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index b23368529a40..7c4b9b0c334b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -204,7 +204,7 @@ compute_partial_view(const struct drm_i915_gem_object *obj,
return view;
}
-static vm_fault_t i915_error_to_vmf_fault(int err)
+vm_fault_t i915_error_to_vmf_fault(int err)
{
switch (err) {
default:
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
index efee9e0d2508..1190a3a228ea 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
@@ -29,4 +29,6 @@ void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
+vm_fault_t i915_error_to_vmf_fault(int err);
+
#endif
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 9b55521cb09b..a995ebad0b17 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -192,10 +192,12 @@
*/
#include <linux/anon_inodes.h>
+#include <linux/mman.h>
#include <linux/sizes.h>
#include <linux/uuid.h>
#include "gem/i915_gem_context.h"
+#include "gem/i915_gem_mman.h"
#include "gt/intel_engine_pm.h"
#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
@@ -3218,6 +3220,38 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream,
return ret;
}
+#define I915_PERF_OA_BUFFER_MMAP_OFFSET 1
+
+/**
+ * i915_perf_oa_buffer_info_locked - size and offset of the OA buffer
+ * @stream: i915 perf stream
+ * @arg: pointer to oa buffer info filled by this function.
+ */
+static int i915_perf_oa_buffer_info_locked(struct i915_perf_stream *stream,
+ unsigned long arg)
+{
+ struct drm_i915_perf_oa_buffer_info info;
+ void __user *output = (void __user *)arg;
+
+ if (i915_perf_stream_paranoid && !perfmon_capable()) {
+ DRM_DEBUG("Insufficient privileges to access OA buffer info\n");
+ return -EACCES;
+ }
+
+ if (!output)
+ return -EINVAL;
+
+ memset(&info, 0, sizeof(info));
+
+ info.size = stream->oa_buffer.vma->size;
+ info.offset = I915_PERF_OA_BUFFER_MMAP_OFFSET * PAGE_SIZE;
+
+ if (copy_to_user(output, &info, sizeof(info)))
+ return -EFAULT;
+
+ return 0;
+}
+
/**
* i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
* @stream: An i915 perf stream
@@ -3243,6 +3277,8 @@ static long i915_perf_ioctl_locked(struct i915_perf_stream *stream,
return 0;
case I915_PERF_IOCTL_CONFIG:
return i915_perf_config_locked(stream, arg);
+ case I915_PERF_IOCTL_GET_OA_BUFFER_INFO:
+ return i915_perf_oa_buffer_info_locked(stream, arg);
}
return -EINVAL;
@@ -3318,12 +3354,87 @@ static int i915_perf_release(struct inode *inode, struct file *file)
i915_perf_destroy_locked(stream);
mutex_unlock(&perf->lock);
+ /*
+ * User could have multiple vmas from multiple mmaps. We want to zap
+ * them all here.
+ */
+ unmap_mapping_range(file->f_mapping, 0, -1, 1);
+
/* Release the reference the perf stream kept on the driver. */
drm_dev_put(&perf->i915->drm);
return 0;
}
+static vm_fault_t vm_fault_oa(struct vm_fault *vmf)
+{
+ struct vm_area_struct *vma = vmf->vma;
+ struct i915_perf_stream *stream = vma->vm_private_data;
+ int err;
+
+ err = remap_io_sg(vma,
+ vma->vm_start, vma->vm_end - vma->vm_start,
+ stream->oa_buffer.vma->pages->sgl, -1);
+
+ return i915_error_to_vmf_fault(err);
+}
+
+static const struct vm_operations_struct vm_ops_oa = {
+ .fault = vm_fault_oa,
+};
+
+int i915_perf_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ struct i915_perf_stream *stream = file->private_data;
+
+ /* mmap-ing OA buffer to user space MUST absolutely be privileged */
+ if (i915_perf_stream_paranoid && !perfmon_capable()) {
+ DRM_DEBUG("Insufficient privileges to map OA buffer\n");
+ return -EACCES;
+ }
+
+ switch (vma->vm_pgoff) {
+ /*
+ * A non-zero offset ensures that we are mapping the right object. Also
+ * leaves room for future objects added to this implementation.
+ */
+ case I915_PERF_OA_BUFFER_MMAP_OFFSET:
+ if (!(stream->sample_flags & SAMPLE_OA_REPORT))
+ return -EINVAL;
+
+ if (vma->vm_end - vma->vm_start > OA_BUFFER_SIZE)
+ return -EINVAL;
+
+ /*
+ * Only support VM_READ. Enforce MAP_PRIVATE by checking for
+ * VM_MAYSHARE.
+ */
+ if (vma->vm_flags & (VM_WRITE | VM_EXEC |
+ VM_SHARED | VM_MAYSHARE))
+ return -EINVAL;
+
+ vma->vm_flags &= ~(VM_MAYWRITE | VM_MAYEXEC);
+
+ /*
+ * If the privileged parent forks and child drops root
+ * privilege, we do not want the child to retain access to the
+ * mapped OA buffer. Explicitly set VM_DONTCOPY to avoid such
+ * cases.
+ */
+ vma->vm_flags |= VM_PFNMAP | VM_DONTEXPAND |
+ VM_DONTDUMP | VM_DONTCOPY;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
+ vma->vm_private_data = stream;
+ vma->vm_ops = &vm_ops_oa;
+
+ return 0;
+}
static const struct file_operations fops = {
.owner = THIS_MODULE,
@@ -3336,6 +3447,7 @@ static const struct file_operations fops = {
* to handle 32bits compatibility.
*/
.compat_ioctl = i915_perf_ioctl,
+ .mmap = i915_perf_mmap,
};
@@ -4480,8 +4592,11 @@ int i915_perf_ioctl_version(void)
*
* - OA buffer head/tail/status/buffer registers for read only
* - OA counters A18, A19, A20 for read/write
+ *
+ * 8: Added an option to map oa buffer at umd driver level and trigger
+ * oa reports within oa buffer from command buffer.
*/
- return 7;
+ return 8;
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 00546062e023..36f6b9799ecd 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -2048,6 +2048,22 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
+/**
+ * Returns OA buffer properties to be used with mmap.
+ *
+ * This ioctl is available in perf revision 8.
+ */
+#define I915_PERF_IOCTL_GET_OA_BUFFER_INFO _IO('i', 0x3)
+
+/**
+ * OA buffer size and offset.
+ */
+struct drm_i915_perf_oa_buffer_info {
+ __u32 size;
+ __u32 offset;
+ __u64 reserved[4];
+};
+
/**
* Common to all i915 perf records
*/
--
2.20.1
_______________________________________________
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Allow privileged user to map the OA buffer (rev6)
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
` (5 preceding siblings ...)
2020-07-30 0:48 ` [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query Umesh Nerlige Ramappa
@ 2020-07-30 1:11 ` Patchwork
2020-07-30 1:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-07-30 1:11 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-gfx
== Series Details ==
Series: Allow privileged user to map the OA buffer (rev6)
URL : https://patchwork.freedesktop.org/series/79460/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f47a2dc77f17 drm/i915: Allow removal of whitelist register and refactor
0b9b3f22f602 drm/i915/selftests: Clear flags when using wa->reg for comparison
8e729453c3ab drm/i915/perf: Ensure observation logic is not clock gated
5300316f93be drm/i915/perf: Whitelist OA report trigger registers
-:167: ERROR:TRAILING_WHITESPACE: trailing whitespace
#167: FILE: drivers/gpu/drm/i915/i915_perf.c:3483:
+^I/* $
-:177: ERROR:TRAILING_WHITESPACE: trailing whitespace
#177: FILE: drivers/gpu/drm/i915/i915_perf.c:3493:
+^Iif (!i915_perf_stream_paranoid && $
total: 2 errors, 0 warnings, 0 checks, 163 lines checked
a30db91cb977 drm/i915/perf: Whitelist OA counter and buffer registers
9ee84dc6b151 drm/i915/perf: Map OA buffer to user space for gen12 performance query
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Allow privileged user to map the OA buffer (rev6)
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
` (6 preceding siblings ...)
2020-07-30 1:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Allow privileged user to map the OA buffer (rev6) Patchwork
@ 2020-07-30 1:12 ` Patchwork
2020-07-30 1:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-30 2:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-07-30 1:12 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-gfx
== Series Details ==
Series: Allow privileged user to map the OA buffer (rev6)
URL : https://patchwork.freedesktop.org/series/79460/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked separately.
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Allow privileged user to map the OA buffer (rev6)
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
` (7 preceding siblings ...)
2020-07-30 1:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2020-07-30 1:30 ` Patchwork
2020-07-30 2:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-07-30 1:30 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 5038 bytes --]
== Series Details ==
Series: Allow privileged user to map the OA buffer (rev6)
URL : https://patchwork.freedesktop.org/series/79460/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8814 -> Patchwork_18269
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/index.html
Known issues
------------
Here are the changes found in Patchwork_18269 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload:
- fi-bsw-n3050: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-bsw-n3050/igt@i915_module_load@reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/fi-bsw-n3050/igt@i915_module_load@reload.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- fi-bsw-kefka: [DMESG-WARN][3] ([i915#1982]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-bsw-kefka/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/fi-bsw-kefka/igt@i915_pm_rpm@module-reload.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-byt-j1900: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8] +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
#### Warnings ####
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][9] ([i915#1982] / [i915#62] / [i915#92]) -> [DMESG-WARN][10] ([i915#62] / [i915#92])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92]) -> [DMESG-WARN][12] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
* igt@kms_flip@basic-plain-flip@a-dp1:
- fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][14] ([i915#62] / [i915#92]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/fi-kbl-x1275/igt@kms_flip@basic-plain-flip@a-dp1.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/fi-kbl-x1275/igt@kms_flip@basic-plain-flip@a-dp1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (39 -> 36)
------------------------------
Additional (1): fi-tgl-u2
Missing (4): fi-byt-clapper fi-byt-squawks fi-bsw-cyan fi-bdw-samus
Build changes
-------------
* IGT: IGT_5750 -> IGTPW_4822
* Linux: CI_DRM_8814 -> Patchwork_18269
CI-20190529: 20190529
CI_DRM_8814: c3d46022808ab0325db29918a829ac7fa02a4314 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4822: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4822/index.html
IGT_5750: 95d906bf458634850626f7e5d6a707191022279f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18269: 9ee84dc6b15162aac83ea795915497e4a56d8c8a @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9ee84dc6b151 drm/i915/perf: Map OA buffer to user space for gen12 performance query
a30db91cb977 drm/i915/perf: Whitelist OA counter and buffer registers
5300316f93be drm/i915/perf: Whitelist OA report trigger registers
8e729453c3ab drm/i915/perf: Ensure observation logic is not clock gated
0b9b3f22f602 drm/i915/selftests: Clear flags when using wa->reg for comparison
f47a2dc77f17 drm/i915: Allow removal of whitelist register and refactor
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Allow privileged user to map the OA buffer (rev6)
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
` (8 preceding siblings ...)
2020-07-30 1:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-07-30 2:27 ` Patchwork
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-07-30 2:27 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30272 bytes --]
== Series Details ==
Series: Allow privileged user to map the OA buffer (rev6)
URL : https://patchwork.freedesktop.org/series/79460/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8814_full -> Patchwork_18269_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_18269_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18269_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_18269_full:
### IGT changes ###
#### Possible regressions ####
* igt@perf@global-sseu-config:
- shard-iclb: [PASS][1] -> [INCOMPLETE][2] +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb5/igt@perf@global-sseu-config.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb5/igt@perf@global-sseu-config.html
- shard-glk: [PASS][3] -> [INCOMPLETE][4] +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-glk9/igt@perf@global-sseu-config.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-glk4/igt@perf@global-sseu-config.html
* igt@perf@low-oa-exponent-permissions:
- shard-skl: [PASS][5] -> [INCOMPLETE][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl3/igt@perf@low-oa-exponent-permissions.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl4/igt@perf@low-oa-exponent-permissions.html
- shard-tglb: [PASS][7] -> [INCOMPLETE][8] +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-tglb8/igt@perf@low-oa-exponent-permissions.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-tglb5/igt@perf@low-oa-exponent-permissions.html
- shard-kbl: [PASS][9] -> [INCOMPLETE][10] +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-kbl3/igt@perf@low-oa-exponent-permissions.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-kbl4/igt@perf@low-oa-exponent-permissions.html
* {igt@perf@oa-regs-whitelisted} (NEW):
- shard-tglb: NOTRUN -> [DMESG-WARN][11]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-tglb5/igt@perf@oa-regs-whitelisted.html
- shard-skl: NOTRUN -> [INCOMPLETE][12] +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl6/igt@perf@oa-regs-whitelisted.html
- shard-glk: NOTRUN -> [INCOMPLETE][13]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-glk7/igt@perf@oa-regs-whitelisted.html
- shard-iclb: NOTRUN -> [INCOMPLETE][14] +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb6/igt@perf@oa-regs-whitelisted.html
* {igt@perf@triggered-oa-reports-paranoid-0} (NEW):
- shard-skl: NOTRUN -> [DMESG-WARN][15]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl7/igt@perf@triggered-oa-reports-paranoid-0.html
- shard-tglb: NOTRUN -> [INCOMPLETE][16]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-tglb1/igt@perf@triggered-oa-reports-paranoid-0.html
- shard-glk: NOTRUN -> [DMESG-WARN][17]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-glk5/igt@perf@triggered-oa-reports-paranoid-0.html
- shard-kbl: NOTRUN -> [INCOMPLETE][18] +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-kbl2/igt@perf@triggered-oa-reports-paranoid-0.html
* igt@runner@aborted:
- shard-iclb: NOTRUN -> ([FAIL][19], [FAIL][20], [FAIL][21], [FAIL][22])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb2/igt@runner@aborted.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb1/igt@runner@aborted.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb5/igt@runner@aborted.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb6/igt@runner@aborted.html
#### Warnings ####
* igt@runner@aborted:
- shard-skl: [FAIL][23] ([i915#1611] / [i915#2029]) -> ([FAIL][24], [FAIL][25], [FAIL][26], [FAIL][27])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl3/igt@runner@aborted.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl7/igt@runner@aborted.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl4/igt@runner@aborted.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl6/igt@runner@aborted.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl1/igt@runner@aborted.html
New tests
---------
New tests have been introduced between CI_DRM_8814_full and Patchwork_18269_full:
### New IGT tests (9) ###
* igt@perf@closed-fd-and-unmapped-access:
- Statuses : 7 pass(s) 1 skip(s)
- Exec time: [0.0, 0.37] s
* igt@perf@invalid-map-oa-buffer:
- Statuses : 7 pass(s) 1 skip(s)
- Exec time: [0.0, 0.15] s
* igt@perf@map-oa-buffer:
- Statuses : 7 pass(s) 1 skip(s)
- Exec time: [0.0, 0.31] s
* igt@perf@non-privileged-access-vaddr:
- Statuses : 7 pass(s) 1 skip(s)
- Exec time: [0.0, 0.32] s
* igt@perf@non-privileged-map-oa-buffer:
- Statuses : 6 pass(s) 1 skip(s)
- Exec time: [0.0, 0.25] s
* igt@perf@oa-regs-not-whitelisted:
- Statuses : 6 pass(s) 2 skip(s)
- Exec time: [0.0, 0.22] s
* igt@perf@oa-regs-whitelisted:
- Statuses : 1 dmesg-warn(s) 5 incomplete(s) 2 skip(s)
- Exec time: [0.0, 0.02] s
* igt@perf@triggered-oa-reports-paranoid-0:
- Statuses : 3 dmesg-warn(s) 3 incomplete(s) 2 skip(s)
- Exec time: [0.0, 3.80] s
* igt@perf@triggered-oa-reports-paranoid-1:
- Statuses : 6 pass(s) 2 skip(s)
- Exec time: [0.0, 3.73] s
Known issues
------------
Here are the changes found in Patchwork_18269_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_whisper@basic-fds-forked-all:
- shard-glk: [PASS][28] -> [DMESG-WARN][29] ([i915#118] / [i915#95])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-glk8/igt@gem_exec_whisper@basic-fds-forked-all.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-glk3/igt@gem_exec_whisper@basic-fds-forked-all.html
* igt@gen9_exec_parse@allowed-all:
- shard-apl: [PASS][30] -> [DMESG-WARN][31] ([i915#1436] / [i915#1635] / [i915#716])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-apl4/igt@gen9_exec_parse@allowed-all.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-apl4/igt@gen9_exec_parse@allowed-all.html
* igt@kms_color@pipe-b-ctm-negative:
- shard-skl: [PASS][32] -> [DMESG-WARN][33] ([i915#1982]) +47 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl10/igt@kms_color@pipe-b-ctm-negative.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl8/igt@kms_color@pipe-b-ctm-negative.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][34] -> [DMESG-WARN][35] ([i915#180]) +8 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-hsw: [PASS][36] -> [TIMEOUT][37] ([i915#1958] / [i915#2119])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_fence_pin_leak:
- shard-skl: [PASS][38] -> [SKIP][39] ([fdo#109271]) +5 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl4/igt@kms_fence_pin_leak.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl7/igt@kms_fence_pin_leak.html
* igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ab-vga1-hdmi-a1:
- shard-hsw: [PASS][40] -> [DMESG-WARN][41] ([i915#1982])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw4/igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ab-vga1-hdmi-a1.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw6/igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ab-vga1-hdmi-a1.html
* igt@kms_flip@flip-vs-suspend@a-hdmi-a1:
- shard-glk: [PASS][42] -> [DMESG-WARN][43] ([i915#1982]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-glk4/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-glk8/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [PASS][44] -> [FAIL][45] ([i915#2122]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-glk: [PASS][46] -> [FAIL][47] ([i915#49])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-glk4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
- shard-tglb: [PASS][48] -> [DMESG-WARN][49] ([i915#1982]) +4 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][50] -> [FAIL][51] ([i915#1188])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl7/igt@kms_hdr@bpc-switch.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl2/igt@kms_hdr@bpc-switch.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-skl: [PASS][52] -> [FAIL][53] ([i915#83])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl4/igt@kms_panel_fitting@atomic-fastset.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl7/igt@kms_panel_fitting@atomic-fastset.html
- shard-iclb: [PASS][54] -> [FAIL][55] ([i915#83])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb5/igt@kms_panel_fitting@atomic-fastset.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb1/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [PASS][56] -> [FAIL][57] ([fdo#108145] / [i915#265])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [PASS][58] -> [SKIP][59] ([fdo#109642] / [fdo#111068])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb3/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [PASS][60] -> [SKIP][61] ([fdo#109441]) +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb2/igt@kms_psr@psr2_dpms.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb8/igt@kms_psr@psr2_dpms.html
* igt@perf@global-sseu-config:
- shard-apl: [PASS][62] -> [INCOMPLETE][63] ([i915#1635])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-apl1/igt@perf@global-sseu-config.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-apl4/igt@perf@global-sseu-config.html
* igt@perf@low-oa-exponent-permissions:
- shard-apl: [PASS][64] -> [DMESG-WARN][65] ([i915#1635])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-apl7/igt@perf@low-oa-exponent-permissions.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-apl3/igt@perf@low-oa-exponent-permissions.html
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-kbl: [DMESG-WARN][66] ([i915#180]) -> [PASS][67] +2 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-kbl4/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-kbl3/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_exec_whisper@basic-forked:
- shard-glk: [DMESG-WARN][68] ([i915#118] / [i915#95]) -> [PASS][69] +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-glk2/igt@gem_exec_whisper@basic-forked.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-glk6/igt@gem_exec_whisper@basic-forked.html
* igt@gem_readwrite@beyond-eob:
- shard-snb: [TIMEOUT][70] ([i915#1958] / [i915#2119]) -> [PASS][71] +2 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-snb6/igt@gem_readwrite@beyond-eob.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-snb5/igt@gem_readwrite@beyond-eob.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-tglb: [SKIP][72] ([i915#1904]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-tglb8/igt@i915_pm_dc@dc3co-vpb-simulation.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-tglb1/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [FAIL][74] ([i915#454]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb8/igt@i915_pm_dc@dc6-psr.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
* igt@kms_big_fb@linear-8bpp-rotate-180:
- shard-apl: [DMESG-WARN][76] ([i915#1635] / [i915#1982]) -> [PASS][77] +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-apl7/igt@kms_big_fb@linear-8bpp-rotate-180.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-apl6/igt@kms_big_fb@linear-8bpp-rotate-180.html
* igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge:
- shard-skl: [DMESG-WARN][78] ([i915#1982]) -> [PASS][79] +55 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl8/igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl7/igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- shard-tglb: [DMESG-WARN][80] ([i915#1982]) -> [PASS][81] +2 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-tglb3/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-tglb3/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
- shard-hsw: [FAIL][82] ([i915#57]) -> [PASS][83]
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw4/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
* igt@kms_flip@2x-plain-flip@ab-vga1-hdmi-a1:
- shard-hsw: [DMESG-WARN][84] ([i915#1982]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw6/igt@kms_flip@2x-plain-flip@ab-vga1-hdmi-a1.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw1/igt@kms_flip@2x-plain-flip@ab-vga1-hdmi-a1.html
* igt@kms_flip@flip-vs-suspend@b-edp1:
- shard-skl: [INCOMPLETE][86] ([i915#198]) -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl5/igt@kms_flip@flip-vs-suspend@b-edp1.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl8/igt@kms_flip@flip-vs-suspend@b-edp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack:
- shard-kbl: [DMESG-WARN][88] ([i915#1982]) -> [PASS][89] +2 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack.html
* igt@kms_frontbuffer_tracking@fbc-badstride:
- shard-glk: [DMESG-WARN][90] ([i915#1982]) -> [PASS][91] +2 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-glk4/igt@kms_frontbuffer_tracking@fbc-badstride.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-glk2/igt@kms_frontbuffer_tracking@fbc-badstride.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][92] ([fdo#108145] / [i915#265]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_cursor@pipe-b-viewport-size-128:
- shard-skl: [SKIP][94] ([fdo#109271]) -> [PASS][95] +14 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl5/igt@kms_plane_cursor@pipe-b-viewport-size-128.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl6/igt@kms_plane_cursor@pipe-b-viewport-size-128.html
* igt@kms_plane_multiple@atomic-pipe-a-tiling-none:
- shard-hsw: [TIMEOUT][96] ([i915#1958] / [i915#2119]) -> [PASS][97] +3 similar issues
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw8/igt@kms_plane_multiple@atomic-pipe-a-tiling-none.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw8/igt@kms_plane_multiple@atomic-pipe-a-tiling-none.html
* igt@kms_psr@no_drrs:
- shard-skl: [CRASH][98] -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl5/igt@kms_psr@no_drrs.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl6/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][100] ([fdo#109441]) -> [PASS][101] +3 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb7/igt@kms_psr@psr2_primary_mmap_cpu.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_setmode@basic:
- shard-kbl: [FAIL][102] ([i915#31]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-kbl7/igt@kms_setmode@basic.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-kbl1/igt@kms_setmode@basic.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-skl: [WARN][104] ([i915#2100]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl5/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl1/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
* igt@perf@polling-parameterized:
- shard-iclb: [FAIL][106] ([i915#1542]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb8/igt@perf@polling-parameterized.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb1/igt@perf@polling-parameterized.html
* igt@perf_pmu@semaphore-busy@rcs0:
- shard-kbl: [FAIL][108] ([i915#1820]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-kbl2/igt@perf_pmu@semaphore-busy@rcs0.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-kbl2/igt@perf_pmu@semaphore-busy@rcs0.html
#### Warnings ####
* igt@gem_exec_reloc@basic-concurrent16:
- shard-snb: [TIMEOUT][110] ([i915#1958] / [i915#2119]) -> [FAIL][111] ([i915#1930])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-snb6/igt@gem_exec_reloc@basic-concurrent16.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-snb2/igt@gem_exec_reloc@basic-concurrent16.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][112] ([i915#588]) -> [SKIP][113] ([i915#658])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb5/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_dc@dc6-psr:
- shard-skl: [DMESG-FAIL][114] ([i915#1982]) -> [FAIL][115] ([i915#454])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl6/igt@i915_pm_dc@dc6-psr.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl1/igt@i915_pm_dc@dc6-psr.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
- shard-skl: [SKIP][116] ([fdo#109271]) -> [DMESG-WARN][117] ([i915#1982]) +1 similar issue
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl5/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl2/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
* igt@kms_ccs@pipe-c-bad-pixel-format:
- shard-skl: [SKIP][118] ([fdo#109271]) -> [SKIP][119] ([fdo#109271] / [fdo#111304])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl5/igt@kms_ccs@pipe-c-bad-pixel-format.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl5/igt@kms_ccs@pipe-c-bad-pixel-format.html
* igt@kms_color_chamelium@pipe-c-ctm-max:
- shard-hsw: [TIMEOUT][120] ([i915#1958] / [i915#2119]) -> [SKIP][121] ([fdo#109271] / [fdo#111827])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw8/igt@kms_color_chamelium@pipe-c-ctm-max.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw5/igt@kms_color_chamelium@pipe-c-ctm-max.html
- shard-snb: [TIMEOUT][122] ([i915#1958] / [i915#2119]) -> [SKIP][123] ([fdo#109271] / [fdo#111827])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-snb6/igt@kms_color_chamelium@pipe-c-ctm-max.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-snb6/igt@kms_color_chamelium@pipe-c-ctm-max.html
* igt@kms_color_chamelium@pipe-c-gamma:
- shard-hsw: [SKIP][124] ([fdo#109271] / [fdo#111827]) -> [TIMEOUT][125] ([i915#1958] / [i915#2119])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw1/igt@kms_color_chamelium@pipe-c-gamma.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw2/igt@kms_color_chamelium@pipe-c-gamma.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [SKIP][126] ([fdo#109349]) -> [DMESG-WARN][127] ([i915#1226])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-hsw: [TIMEOUT][128] ([i915#1958] / [i915#2119]) -> [SKIP][129] ([fdo#109271])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
- shard-snb: [TIMEOUT][130] ([i915#1958] / [i915#2119]) -> [SKIP][131] ([fdo#109271]) +1 similar issue
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-snb6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-snb4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-skl: [DMESG-WARN][132] ([i915#1982]) -> [SKIP][133] ([fdo#109271])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl9/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render:
- shard-hsw: [SKIP][134] ([fdo#109271]) -> [TIMEOUT][135] ([i915#1958] / [i915#2119]) +1 similar issue
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-hsw2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-hsw2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-skl: [SKIP][136] ([fdo#109271]) -> [DMESG-FAIL][137] ([fdo#108145] / [i915#1982])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
- shard-skl: [FAIL][138] ([fdo#108145] / [i915#265]) -> [DMESG-FAIL][139] ([fdo#108145] / [i915#1982])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8814/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111304]: https://bugs.freedesktop.org/show_bug.cgi?id=111304
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1611]: https://gitlab.freedesktop.org/drm/intel/issues/1611
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1820]: https://gitlab.freedesktop.org/drm/intel/issues/1820
[i915#1904]: https://gitlab.freedesktop.org/drm/intel/issues/1904
[i915#1930]: https://gitlab.freedesktop.org/drm/intel/issues/1930
[i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2100]: https://gitlab.freedesktop.org/drm/intel/issues/2100
[i915#2119]: https://gitlab.freedesktop.org/drm/intel/issues/2119
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#57]: https://gitlab.freedesktop.org/drm/intel/issues/57
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#83]: https://gitlab.freedesktop.org/drm/intel/issues/83
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Build changes
-------------
* IGT: IGT_5750 -> IGTPW_4822
* Linux: CI_DRM_8814 -> Patchwo
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18269/index.html
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[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 4/6] drm/i915/perf: Whitelist OA report trigger registers
2020-07-30 0:48 ` [Intel-gfx] [PATCH 4/6] drm/i915/perf: Whitelist OA report trigger registers Umesh Nerlige Ramappa
@ 2020-07-30 8:14 ` Chris Wilson
0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2020-07-30 8:14 UTC (permalink / raw)
To: Umesh Nerlige Ramappa, intel-gfx
Quoting Umesh Nerlige Ramappa (2020-07-30 01:48:24)
> +void intel_engine_apply_oa_whitelist(struct intel_engine_cs *engine)
> +{
> + struct i915_wa_list *w = &engine->whitelist;
> + struct drm_i915_private *i915 = engine->i915;
> +
> + if (IS_GEN(i915, 12))
> + whitelist_build_perf_counters(w, gen12_oa_regs,
> + ARRAY_SIZE(gen12_oa_regs));
> + else if (INTEL_GEN(i915) > 8)
> + whitelist_build_perf_counters(w, gen9_oa_regs,
> + ARRAY_SIZE(gen9_oa_regs));
> + else
> + return;
> +
> + intel_engine_apply_whitelist(engine);
> +}
> +
> +void intel_engine_remove_oa_whitelist(struct intel_engine_cs *engine)
> +{
> + struct i915_wa_list *w = &engine->whitelist;
> + struct drm_i915_private *i915 = engine->i915;
> +
> + if (IS_GEN(i915, 12))
> + whitelist_delete_perf_counters(w, gen12_oa_regs,
> + ARRAY_SIZE(gen12_oa_regs));
> + else if (INTEL_GEN(i915) > 8)
> + whitelist_delete_perf_counters(w, gen9_oa_regs,
> + ARRAY_SIZE(gen9_oa_regs));
> + else
> + return;
Keep the oa_regs in i915_perf, and make this pair of functions that
touch more generic by
intel_engine_add_whitelist(engine, i915_reg_t *reg, size_t count);
Hmm. The other can of worms would be to call it
intel_engine_allow_user_register_access()
intel_engine_deny_user_register_access()
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query
2020-07-30 0:48 ` [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query Umesh Nerlige Ramappa
@ 2020-07-30 9:00 ` Chris Wilson
2020-07-30 9:08 ` Chris Wilson
1 sibling, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2020-07-30 9:00 UTC (permalink / raw)
To: Umesh Nerlige Ramappa, intel-gfx
Quoting Umesh Nerlige Ramappa (2020-07-30 01:48:26)
> @@ -3318,12 +3354,87 @@ static int i915_perf_release(struct inode *inode, struct file *file)
> i915_perf_destroy_locked(stream);
> mutex_unlock(&perf->lock);
>
> + /*
> + * User could have multiple vmas from multiple mmaps. We want to zap
> + * them all here.
> + */
> + unmap_mapping_range(file->f_mapping, 0, -1, 1);
I'd prefer to explicitly revoke the mapping before removing the
stream->oa_buffer (i.e. at the start of the release before
i915_perf_destroy). That way it takes far less thought to convince
oneself that there is no window for accessing the stale PTE. Include a
comment to explain that a fresh fault cannot occur as the mmap holds a
reference to the stream (via the vma->vm_file), and so before the user's
munmap, the stream cannot be destroy.
-Chris
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query
2020-07-30 0:48 ` [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query Umesh Nerlige Ramappa
2020-07-30 9:00 ` Chris Wilson
@ 2020-07-30 9:08 ` Chris Wilson
1 sibling, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2020-07-30 9:08 UTC (permalink / raw)
To: Umesh Nerlige Ramappa, intel-gfx
Quoting Umesh Nerlige Ramappa (2020-07-30 01:48:26)
> #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 00546062e023..36f6b9799ecd 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2048,6 +2048,22 @@ struct drm_i915_perf_open_param {
> */
> #define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
>
> +/**
> + * Returns OA buffer properties to be used with mmap.
> + *
> + * This ioctl is available in perf revision 8.
> + */
> +#define I915_PERF_IOCTL_GET_OA_BUFFER_INFO _IO('i', 0x3)
This should be _IORW iirc.
> +
> +/**
> + * OA buffer size and offset.
> + */
> +struct drm_i915_perf_oa_buffer_info {
> + __u32 size;
> + __u32 offset;
> + __u64 reserved[4];
5xu64? Might as well just trim it to 4xu64. Unless you have a reason for
a large reserved, we can always extend the struct later (or replace it
with a new ioctl).
However, I would suggest {
u32 type; /* in */
u32 flags; /* in */
u64 size; /* out */
u64 offset; /* out */
u64 rsvd; /* mbz */
};
Oh, and don't forget to check all unused members are 0.
-Chris
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^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer
@ 2020-10-10 0:20 Umesh Nerlige Ramappa
0 siblings, 0 replies; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-10-10 0:20 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
Allow user to map the OA buffer and also trigger reports into it.
CI fixes:
v1: Fixes a memory corruption due to addition of OA whitelist on demand.
v2: Spinlock when applying whitelist
v3: Use uncore->lock. Do not check for wal->count when applying whitelist.
v4: Refresh and rerun with newly added test (forked access).
v5:
- Split patches into smaller units
- Grow the wal->list only for the engine that needs it.
- Bring back the wal->count check when applying whitelist during resume
v6: Fix checkpatch and sparse warnings
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Test-with: 20201002232634.51807-1-umesh.nerlige.ramappa@intel.com
Piotr Maciejewski (1):
drm/i915/perf: Ensure observation logic is not clock gated
Umesh Nerlige Ramappa (5):
drm/i915/gt: Lock intel_engine_apply_whitelist with uncore->lock
drm/i915/perf: Whitelist OA report trigger registers
drm/i915/gt: Refactor _wa_add to reuse wa_index and wa_list_grow
drm/i915/perf: Whitelist OA counter and buffer registers
drm/i915/perf: Map OA buffer to user space for gen12 performance query
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 212 ++++++++++++----
drivers/gpu/drm/i915/gt/intel_workarounds.h | 7 +
.../gpu/drm/i915/gt/intel_workarounds_types.h | 5 +
drivers/gpu/drm/i915/i915_perf.c | 228 +++++++++++++++++-
drivers/gpu/drm/i915/i915_perf_types.h | 8 +
drivers/gpu/drm/i915/i915_reg.h | 10 +
include/uapi/drm/i915_drm.h | 33 +++
9 files changed, 455 insertions(+), 52 deletions(-)
--
2.20.1
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^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer
@ 2020-10-02 23:27 Umesh Nerlige Ramappa
0 siblings, 0 replies; 16+ messages in thread
From: Umesh Nerlige Ramappa @ 2020-10-02 23:27 UTC (permalink / raw)
To: intel-gfx, Chris Wilson, Lionel G Landwerlin
Allow user to map the OA buffer and also trigger reports into it.
CI fixes:
v1: Fixes a memory corruption due to addition of OA whitelist on demand.
v2: Spinlock when applying whitelist
v3: Use uncore->lock. Do not check for wal->count when applying whitelist.
v4: Refresh and rerun with newly added test (forked access).
v5:
- Split patches into smaller units
- Grow the wal->list only for the engine that needs it.
- Bring back the wal->count check when applying whitelist during resume
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Test-with: 20201002013957.16456-1-umesh.nerlige.ramappa@intel.com
Piotr Maciejewski (1):
drm/i915/perf: Ensure observation logic is not clock gated
Umesh Nerlige Ramappa (5):
drm/i915/gt: Lock intel_engine_apply_whitelist with uncore->lock
drm/i915/perf: Whitelist OA report trigger registers
drm/i915/gt: Refactor _wa_add to reuse wa_index and wa_list_grow
drm/i915/perf: Whitelist OA counter and buffer registers
drm/i915/perf: Map OA buffer to user space for gen12 performance query
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 212 ++++++++++++----
drivers/gpu/drm/i915/gt/intel_workarounds.h | 7 +
.../gpu/drm/i915/gt/intel_workarounds_types.h | 5 +
drivers/gpu/drm/i915/i915_perf.c | 228 +++++++++++++++++-
drivers/gpu/drm/i915/i915_perf_types.h | 8 +
drivers/gpu/drm/i915/i915_reg.h | 10 +
include/uapi/drm/i915_drm.h | 33 +++
9 files changed, 455 insertions(+), 52 deletions(-)
--
2.20.1
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^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2020-10-10 0:21 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-30 0:48 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 1/6] drm/i915: Allow removal of whitelist register and refactor Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 2/6] drm/i915/selftests: Clear flags when using wa->reg for comparison Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 3/6] drm/i915/perf: Ensure observation logic is not clock gated Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 4/6] drm/i915/perf: Whitelist OA report trigger registers Umesh Nerlige Ramappa
2020-07-30 8:14 ` Chris Wilson
2020-07-30 0:48 ` [Intel-gfx] [PATCH 5/6] drm/i915/perf: Whitelist OA counter and buffer registers Umesh Nerlige Ramappa
2020-07-30 0:48 ` [Intel-gfx] [PATCH 6/6] drm/i915/perf: Map OA buffer to user space for gen12 performance query Umesh Nerlige Ramappa
2020-07-30 9:00 ` Chris Wilson
2020-07-30 9:08 ` Chris Wilson
2020-07-30 1:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Allow privileged user to map the OA buffer (rev6) Patchwork
2020-07-30 1:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-07-30 1:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-30 2:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-02 23:27 [Intel-gfx] [PATCH 0/6] Allow privileged user to map the OA buffer Umesh Nerlige Ramappa
2020-10-10 0:20 Umesh Nerlige Ramappa
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