* [Intel-gfx] [PATCH 0/2] Add generic i915_ggtt ballooning support @ 2020-08-02 15:34 Michal Wajdeczko 2020-08-02 15:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: " Michal Wajdeczko ` (4 more replies) 0 siblings, 5 replies; 8+ messages in thread From: Michal Wajdeczko @ 2020-08-02 15:34 UTC (permalink / raw) To: intel-gfx Rebase forgotten series [1] [1] https://patchwork.freedesktop.org/series/71920/ Michal Wajdeczko (2): drm/i915/ggtt: Add generic i915_ggtt ballooning support drm/i915/vgt: Move VGT GGTT ballooning nodes to i915_ggtt drivers/gpu/drm/i915/gt/intel_ggtt.c | 69 +++++++++++++++++++------ drivers/gpu/drm/i915/gt/intel_gtt.h | 5 ++ drivers/gpu/drm/i915/i915_vgpu.c | 75 +++++----------------------- 3 files changed, 71 insertions(+), 78 deletions(-) -- 2.27.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: Add generic i915_ggtt ballooning support 2020-08-02 15:34 [Intel-gfx] [PATCH 0/2] Add generic i915_ggtt ballooning support Michal Wajdeczko @ 2020-08-02 15:34 ` Michal Wajdeczko 2020-08-02 15:56 ` Chris Wilson 2020-08-02 15:34 ` [Intel-gfx] [PATCH 2/2] drm/i915/vgt: Move VGT GGTT ballooning nodes to i915_ggtt Michal Wajdeczko ` (3 subsequent siblings) 4 siblings, 1 reply; 8+ messages in thread From: Michal Wajdeczko @ 2020-08-02 15:34 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula, Chris Wilson Reserving part of the GGTT for the GuC requires same steps as in VGT GGTT ballooning. Add generic GGTT ballooning helpers to intel_ggtt.c to avoid code duplication. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Xiong Zhang <xiong.y.zhang@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/gt/intel_ggtt.c | 69 ++++++++++++++++++++++------ drivers/gpu/drm/i915/gt/intel_gtt.h | 4 ++ drivers/gpu/drm/i915/i915_vgpu.c | 64 +++++--------------------- 3 files changed, 70 insertions(+), 67 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c index 33a3f627ddb1..7001252b4703 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -462,29 +462,17 @@ static void ggtt_unbind_vma(struct i915_address_space *vm, struct i915_vma *vma) static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt) { - u64 size; - int ret; - if (!intel_uc_uses_guc(&ggtt->vm.gt->uc)) return 0; GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP); - size = ggtt->vm.total - GUC_GGTT_TOP; - - ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size, - GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE, - PIN_NOEVICT); - if (ret) - drm_dbg(&ggtt->vm.i915->drm, - "Failed to reserve top of GGTT for GuC\n"); - - return ret; + return i915_ggtt_balloon(ggtt, GUC_GGTT_TOP, ggtt->vm.total, + &ggtt->uc_fw); } static void ggtt_release_guc_top(struct i915_ggtt *ggtt) { - if (drm_mm_node_allocated(&ggtt->uc_fw)) - drm_mm_remove_node(&ggtt->uc_fw); + i915_ggtt_deballoon(ggtt, &ggtt->uc_fw); } static void cleanup_init_ggtt(struct i915_ggtt *ggtt) @@ -1464,3 +1452,54 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma) } return ret; } + +/** + * i915_ggtt_balloon - reserve fixed space in an GGTT + * @ggtt: the &struct i915_ggtt + * @start: start offset inside the GGTT, + * must be #I915_GTT_MIN_ALIGNMENT aligned + * @end: end offset inside the GGTT, + * must be #I915_GTT_PAGE_SIZE aligned + * @node: the &struct drm_mm_node + * + * i915_ggtt_balloon() tries to reserve the @node from @start to @end inside + * GGTT the address space. + * + * Returns: 0 on success, -ENOSPC if no suitable hole is found. + */ +int i915_ggtt_balloon(struct i915_ggtt *ggtt, u64 start, u64 end, + struct drm_mm_node *node) +{ + u64 size = end - start; + int err; + + GEM_BUG_ON(start >= end); + drm_dbg(&ggtt->vm.i915->drm, "%sGGTT [%#llx-%#llx] %lluK\n", + "ballooning ", start, end, size / SZ_1K); + + err = i915_gem_gtt_reserve(&ggtt->vm, node, size, start, + I915_COLOR_UNEVICTABLE, PIN_NOEVICT); + if (unlikely(err)) { + drm_err(&ggtt->vm.i915->drm, "%sGGTT [%#llx-%#llx] %lluK\n", + "Failed to balloon ", node->start, + node->start + node->size, node->size / SZ_1K); + return err; + } + + ggtt->vm.reserved += node->size; + return 0; +} + +void i915_ggtt_deballoon(struct i915_ggtt *ggtt, struct drm_mm_node *node) +{ + if (!drm_mm_node_allocated(node)) + return; + + drm_dbg(&ggtt->vm.i915->drm, "%sGGTT [%#llx-%#llx] %lluK\n", + "deballooning ", node->start, node->start + node->size, + node->size / SZ_1K); + + GEM_BUG_ON(ggtt->vm.reserved < node->size); + ggtt->vm.reserved -= node->size; + drm_mm_remove_node(node); +} diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h index c13c650ced22..111306f2f8d6 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.h +++ b/drivers/gpu/drm/i915/gt/intel_gtt.h @@ -495,6 +495,10 @@ static inline bool i915_ggtt_has_aperture(const struct i915_ggtt *ggtt) return ggtt->mappable_end > 0; } +int i915_ggtt_balloon(struct i915_ggtt *ggtt, u64 start, u64 end, + struct drm_mm_node *node); +void i915_ggtt_deballoon(struct i915_ggtt *ggtt, struct drm_mm_node *node); + int i915_ppgtt_init_hw(struct intel_gt *gt); struct i915_ppgtt *i915_ppgtt_create(struct intel_gt *gt); diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c index 70fca72f5162..f505142d6dfc 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.c +++ b/drivers/gpu/drm/i915/i915_vgpu.c @@ -145,23 +145,6 @@ struct _balloon_info_ { static struct _balloon_info_ bl_info; -static void vgt_deballoon_space(struct i915_ggtt *ggtt, - struct drm_mm_node *node) -{ - struct drm_i915_private *dev_priv = ggtt->vm.i915; - if (!drm_mm_node_allocated(node)) - return; - - drm_dbg(&dev_priv->drm, - "deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n", - node->start, - node->start + node->size, - node->size / 1024); - - ggtt->vm.reserved -= node->size; - drm_mm_remove_node(node); -} - /** * intel_vgt_deballoon - deballoon reserved graphics address trunks * @ggtt: the global GGTT from which we reserved earlier @@ -180,30 +163,7 @@ void intel_vgt_deballoon(struct i915_ggtt *ggtt) drm_dbg(&dev_priv->drm, "VGT deballoon.\n"); for (i = 0; i < 4; i++) - vgt_deballoon_space(ggtt, &bl_info.space[i]); -} - -static int vgt_balloon_space(struct i915_ggtt *ggtt, - struct drm_mm_node *node, - unsigned long start, unsigned long end) -{ - struct drm_i915_private *dev_priv = ggtt->vm.i915; - unsigned long size = end - start; - int ret; - - if (start >= end) - return -EINVAL; - - drm_info(&dev_priv->drm, - "balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n", - start, end, size / 1024); - ret = i915_gem_gtt_reserve(&ggtt->vm, node, - size, start, I915_COLOR_UNEVICTABLE, - 0); - if (!ret) - ggtt->vm.reserved += size; - - return ret; + i915_ggtt_deballoon(ggtt, &bl_info.space[i]); } /** @@ -292,32 +252,32 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) /* Unmappable graphic memory ballooning */ if (unmappable_base > ggtt->mappable_end) { - ret = vgt_balloon_space(ggtt, &bl_info.space[2], - ggtt->mappable_end, unmappable_base); + ret = i915_ggtt_balloon(ggtt, ggtt->mappable_end, + unmappable_base, &bl_info.space[2]); if (ret) goto err; } if (unmappable_end < ggtt_end) { - ret = vgt_balloon_space(ggtt, &bl_info.space[3], - unmappable_end, ggtt_end); + ret = i915_ggtt_balloon(ggtt, unmappable_end, ggtt_end, + &bl_info.space[3]); if (ret) goto err_upon_mappable; } /* Mappable graphic memory ballooning */ if (mappable_base) { - ret = vgt_balloon_space(ggtt, &bl_info.space[0], - 0, mappable_base); + ret = i915_ggtt_balloon(ggtt, 0, mappable_base, + &bl_info.space[0]); if (ret) goto err_upon_unmappable; } if (mappable_end < ggtt->mappable_end) { - ret = vgt_balloon_space(ggtt, &bl_info.space[1], - mappable_end, ggtt->mappable_end); + ret = i915_ggtt_balloon(ggtt, mappable_end, ggtt->mappable_end, + &bl_info.space[1]); if (ret) goto err_below_mappable; @@ -327,11 +287,11 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) return 0; err_below_mappable: - vgt_deballoon_space(ggtt, &bl_info.space[0]); + i915_ggtt_deballoon(ggtt, &bl_info.space[0]); err_upon_unmappable: - vgt_deballoon_space(ggtt, &bl_info.space[3]); + i915_ggtt_deballoon(ggtt, &bl_info.space[3]); err_upon_mappable: - vgt_deballoon_space(ggtt, &bl_info.space[2]); + i915_ggtt_deballoon(ggtt, &bl_info.space[2]); err: drm_err(&dev_priv->drm, "VGT balloon fail\n"); return ret; -- 2.27.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: Add generic i915_ggtt ballooning support 2020-08-02 15:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: " Michal Wajdeczko @ 2020-08-02 15:56 ` Chris Wilson 0 siblings, 0 replies; 8+ messages in thread From: Chris Wilson @ 2020-08-02 15:56 UTC (permalink / raw) To: Michal Wajdeczko, intel-gfx; +Cc: Jani Nikula Quoting Michal Wajdeczko (2020-08-02 16:34:09) > Reserving part of the GGTT for the GuC requires same steps > as in VGT GGTT ballooning. Add generic GGTT ballooning > helpers to intel_ggtt.c to avoid code duplication. > > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Xiong Zhang <xiong.y.zhang@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_ggtt.c | 69 ++++++++++++++++++++++------ > drivers/gpu/drm/i915/gt/intel_gtt.h | 4 ++ > drivers/gpu/drm/i915/i915_vgpu.c | 64 +++++--------------------- > 3 files changed, 70 insertions(+), 67 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c > index 33a3f627ddb1..7001252b4703 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c > @@ -462,29 +462,17 @@ static void ggtt_unbind_vma(struct i915_address_space *vm, struct i915_vma *vma) > > static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt) > { > - u64 size; > - int ret; > - > if (!intel_uc_uses_guc(&ggtt->vm.gt->uc)) > return 0; > > GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP); > - size = ggtt->vm.total - GUC_GGTT_TOP; > - > - ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size, > - GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE, > - PIN_NOEVICT); > - if (ret) > - drm_dbg(&ggtt->vm.i915->drm, > - "Failed to reserve top of GGTT for GuC\n"); > - > - return ret; > + return i915_ggtt_balloon(ggtt, GUC_GGTT_TOP, ggtt->vm.total, > + &ggtt->uc_fw); I still don't buy this, this is definitely not "ballooning". And I'm yet to be convinced that ballooning is a central concept to the i915_ggtt itself and not a client coordination facility on top. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/vgt: Move VGT GGTT ballooning nodes to i915_ggtt 2020-08-02 15:34 [Intel-gfx] [PATCH 0/2] Add generic i915_ggtt ballooning support Michal Wajdeczko 2020-08-02 15:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: " Michal Wajdeczko @ 2020-08-02 15:34 ` Michal Wajdeczko 2020-08-02 15:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add generic i915_ggtt ballooning support Patchwork ` (2 subsequent siblings) 4 siblings, 0 replies; 8+ messages in thread From: Michal Wajdeczko @ 2020-08-02 15:34 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula, Chris Wilson Since VGT ballooning nodes are GGTT specific, we can move them to i915_ggtt struct close to some other similar nodes. This way we drop another place in driver that uses static data. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Xiong Zhang <xiong.y.zhang@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/gt/intel_gtt.h | 1 + drivers/gpu/drm/i915/i915_vgpu.c | 27 ++++++++------------------- 2 files changed, 9 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h index 111306f2f8d6..72780543c9c6 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.h +++ b/drivers/gpu/drm/i915/gt/intel_gtt.h @@ -336,6 +336,7 @@ struct i915_ggtt { struct mutex error_mutex; struct drm_mm_node error_capture; struct drm_mm_node uc_fw; + struct drm_mm_node balloon[4]; }; struct i915_ppgtt { diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c index f505142d6dfc..6eb7657fb2ca 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.c +++ b/drivers/gpu/drm/i915/i915_vgpu.c @@ -134,17 +134,6 @@ bool intel_vgpu_has_huge_gtt(struct drm_i915_private *dev_priv) return dev_priv->vgpu.caps & VGT_CAPS_HUGE_GTT; } -struct _balloon_info_ { - /* - * There are up to 2 regions per mappable/unmappable graphic - * memory that might be ballooned. Here, index 0/1 is for mappable - * graphic memory, 2/3 for unmappable graphic memory. - */ - struct drm_mm_node space[4]; -}; - -static struct _balloon_info_ bl_info; - /** * intel_vgt_deballoon - deballoon reserved graphics address trunks * @ggtt: the global GGTT from which we reserved earlier @@ -163,7 +152,7 @@ void intel_vgt_deballoon(struct i915_ggtt *ggtt) drm_dbg(&dev_priv->drm, "VGT deballoon.\n"); for (i = 0; i < 4; i++) - i915_ggtt_deballoon(ggtt, &bl_info.space[i]); + i915_ggtt_deballoon(ggtt, &ggtt->balloon[i]); } /** @@ -253,7 +242,7 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) /* Unmappable graphic memory ballooning */ if (unmappable_base > ggtt->mappable_end) { ret = i915_ggtt_balloon(ggtt, ggtt->mappable_end, - unmappable_base, &bl_info.space[2]); + unmappable_base, &ggtt->balloon[2]); if (ret) goto err; @@ -261,7 +250,7 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) if (unmappable_end < ggtt_end) { ret = i915_ggtt_balloon(ggtt, unmappable_end, ggtt_end, - &bl_info.space[3]); + &ggtt->balloon[3]); if (ret) goto err_upon_mappable; } @@ -269,7 +258,7 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) /* Mappable graphic memory ballooning */ if (mappable_base) { ret = i915_ggtt_balloon(ggtt, 0, mappable_base, - &bl_info.space[0]); + &ggtt->balloon[0]); if (ret) goto err_upon_unmappable; @@ -277,7 +266,7 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) if (mappable_end < ggtt->mappable_end) { ret = i915_ggtt_balloon(ggtt, mappable_end, ggtt->mappable_end, - &bl_info.space[1]); + &ggtt->balloon[1]); if (ret) goto err_below_mappable; @@ -287,11 +276,11 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) return 0; err_below_mappable: - i915_ggtt_deballoon(ggtt, &bl_info.space[0]); + i915_ggtt_deballoon(ggtt, &ggtt->balloon[0]); err_upon_unmappable: - i915_ggtt_deballoon(ggtt, &bl_info.space[3]); + i915_ggtt_deballoon(ggtt, &ggtt->balloon[3]); err_upon_mappable: - i915_ggtt_deballoon(ggtt, &bl_info.space[2]); + i915_ggtt_deballoon(ggtt, &ggtt->balloon[2]); err: drm_err(&dev_priv->drm, "VGT balloon fail\n"); return ret; -- 2.27.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add generic i915_ggtt ballooning support 2020-08-02 15:34 [Intel-gfx] [PATCH 0/2] Add generic i915_ggtt ballooning support Michal Wajdeczko 2020-08-02 15:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: " Michal Wajdeczko 2020-08-02 15:34 ` [Intel-gfx] [PATCH 2/2] drm/i915/vgt: Move VGT GGTT ballooning nodes to i915_ggtt Michal Wajdeczko @ 2020-08-02 15:58 ` Patchwork 2020-08-02 16:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-08-02 19:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 4 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2020-08-02 15:58 UTC (permalink / raw) To: Michal Wajdeczko; +Cc: intel-gfx == Series Details == Series: Add generic i915_ggtt ballooning support URL : https://patchwork.freedesktop.org/series/80177/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Add generic i915_ggtt ballooning support 2020-08-02 15:34 [Intel-gfx] [PATCH 0/2] Add generic i915_ggtt ballooning support Michal Wajdeczko ` (2 preceding siblings ...) 2020-08-02 15:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add generic i915_ggtt ballooning support Patchwork @ 2020-08-02 16:17 ` Patchwork 2020-08-02 19:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 4 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2020-08-02 16:17 UTC (permalink / raw) To: Michal Wajdeczko; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 4995 bytes --] == Series Details == Series: Add generic i915_ggtt ballooning support URL : https://patchwork.freedesktop.org/series/80177/ State : success == Summary == CI Bug Log - changes from CI_DRM_8832 -> Patchwork_18294 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/index.html Known issues ------------ Here are the changes found in Patchwork_18294 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s3: - fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html * igt@i915_module_load@reload: - fi-byt-j1900: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/fi-byt-j1900/igt@i915_module_load@reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/fi-byt-j1900/igt@i915_module_load@reload.html #### Possible fixes #### * igt@i915_module_load@reload: - fi-bxt-dsi: [DMESG-WARN][5] ([i915#1635] / [i915#1982]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/fi-bxt-dsi/igt@i915_module_load@reload.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/fi-bxt-dsi/igt@i915_module_load@reload.html * igt@i915_selftest@live@active: - {fi-ehl-1}: [DMESG-FAIL][7] ([i915#541]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/fi-ehl-1/igt@i915_selftest@live@active.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/fi-ehl-1/igt@i915_selftest@live@active.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-bsw-kefka: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1: - fi-icl-u2: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html #### Warnings #### * igt@gem_exec_suspend@basic-s3: - fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][14] ([i915#62] / [i915#92]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/fi-kbl-x1275/igt@gem_exec_suspend@basic-s3.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/fi-kbl-x1275/igt@gem_exec_suspend@basic-s3.html * igt@kms_flip@basic-flip-vs-dpms@a-dp1: - fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92]) -> [DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-dpms@a-dp1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-dpms@a-dp1.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (42 -> 35) ------------------------------ Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * Linux: CI_DRM_8832 -> Patchwork_18294 CI-20190529: 20190529 CI_DRM_8832: 00b9a4b2331e1dceef8994e3b144e2c5e8c55003 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5757: d78c7fd293cb228fe03ccff730202b033e25ff18 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18294: c9d01ff1c89f338f52fd60f7261fe51395897a3e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c9d01ff1c89f drm/i915/vgt: Move VGT GGTT ballooning nodes to i915_ggtt ab86294c92b2 drm/i915/ggtt: Add generic i915_ggtt ballooning support == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/index.html [-- Attachment #1.2: Type: text/html, Size: 6459 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Add generic i915_ggtt ballooning support 2020-08-02 15:34 [Intel-gfx] [PATCH 0/2] Add generic i915_ggtt ballooning support Michal Wajdeczko ` (3 preceding siblings ...) 2020-08-02 16:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2020-08-02 19:37 ` Patchwork 4 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2020-08-02 19:37 UTC (permalink / raw) To: Michal Wajdeczko; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 13503 bytes --] == Series Details == Series: Add generic i915_ggtt ballooning support URL : https://patchwork.freedesktop.org/series/80177/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8832_full -> Patchwork_18294_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_18294_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18294_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_18294_full: ### IGT changes ### #### Possible regressions #### * igt@gem_mmap_gtt@fault-concurrent: - shard-snb: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-snb6/igt@gem_mmap_gtt@fault-concurrent.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-snb4/igt@gem_mmap_gtt@fault-concurrent.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-skl: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@runner@aborted: - shard-snb: NOTRUN -> [FAIL][5] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-snb4/igt@runner@aborted.html Known issues ------------ Here are the changes found in Patchwork_18294_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_huc_copy@huc-copy: - shard-tglb: [PASS][6] -> [SKIP][7] ([i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-tglb1/igt@gem_huc_copy@huc-copy.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-tglb6/igt@gem_huc_copy@huc-copy.html * igt@i915_selftest@mock@contexts: - shard-skl: [PASS][8] -> [INCOMPLETE][9] ([i915#198]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl2/igt@i915_selftest@mock@contexts.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl5/igt@i915_selftest@mock@contexts.html * igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge: - shard-skl: [PASS][10] -> [DMESG-WARN][11] ([i915#1982]) +7 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl6/igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl5/igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge.html * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-ytiled: - shard-apl: [PASS][12] -> [DMESG-WARN][13] ([i915#1635] / [i915#1982]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-apl3/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-ytiled.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-apl6/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-ytiled.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu: - shard-tglb: [PASS][14] -> [DMESG-WARN][15] ([i915#1982]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-tglb7/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-tglb5/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html * igt@kms_hdr@bpc-switch-suspend: - shard-kbl: [PASS][16] -> [DMESG-WARN][17] ([i915#180]) +8 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-kbl2/igt@kms_hdr@bpc-switch-suspend.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-kbl2/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-skl: [PASS][18] -> [INCOMPLETE][19] ([CI#80]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl10/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][20] -> [FAIL][21] ([fdo#108145] / [i915#265]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [PASS][22] -> [SKIP][23] ([fdo#109441]) +1 similar issue [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@perf@non-sampling-read-error: - shard-glk: [PASS][24] -> [DMESG-WARN][25] ([i915#1982]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-glk2/igt@perf@non-sampling-read-error.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-glk5/igt@perf@non-sampling-read-error.html #### Possible fixes #### * igt@gem_eio@in-flight-suspend: - shard-skl: [INCOMPLETE][26] -> [PASS][27] [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl10/igt@gem_eio@in-flight-suspend.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl8/igt@gem_eio@in-flight-suspend.html * igt@i915_module_load@reload: - shard-skl: [DMESG-WARN][28] ([i915#1982]) -> [PASS][29] +11 similar issues [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl9/igt@i915_module_load@reload.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl6/igt@i915_module_load@reload.html * igt@kms_big_fb@y-tiled-64bpp-rotate-0: - shard-glk: [DMESG-FAIL][30] ([i915#118] / [i915#95]) -> [PASS][31] [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-glk8/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-glk4/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html * igt@kms_color@pipe-c-ctm-blue-to-red: - shard-kbl: [DMESG-WARN][32] ([i915#78]) -> [PASS][33] [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-kbl2/igt@kms_color@pipe-c-ctm-blue-to-red.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-kbl2/igt@kms_color@pipe-c-ctm-blue-to-red.html * igt@kms_cursor_crc@pipe-b-cursor-128x42-random: - shard-glk: [FAIL][34] ([i915#54]) -> [PASS][35] [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-glk8/igt@kms_cursor_crc@pipe-b-cursor-128x42-random.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-glk4/igt@kms_cursor_crc@pipe-b-cursor-128x42-random.html * igt@kms_cursor_legacy@all-pipes-torture-bo: - shard-iclb: [DMESG-WARN][36] ([i915#128]) -> [PASS][37] [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-iclb5/igt@kms_cursor_legacy@all-pipes-torture-bo.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-iclb8/igt@kms_cursor_legacy@all-pipes-torture-bo.html * igt@kms_flip@flip-vs-dpms-off-vs-modeset@b-dp1: - shard-kbl: [DMESG-WARN][38] -> [PASS][39] [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-kbl2/igt@kms_flip@flip-vs-dpms-off-vs-modeset@b-dp1.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-kbl2/igt@kms_flip@flip-vs-dpms-off-vs-modeset@b-dp1.html * igt@kms_flip@flip-vs-dpms-off-vs-modeset@c-dp1: - shard-kbl: [DMESG-WARN][40] ([i915#165]) -> [PASS][41] [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-kbl2/igt@kms_flip@flip-vs-dpms-off-vs-modeset@c-dp1.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-kbl2/igt@kms_flip@flip-vs-dpms-off-vs-modeset@c-dp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [DMESG-WARN][42] ([i915#180]) -> [PASS][43] +10 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html * igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1: - shard-skl: [FAIL][44] ([i915#2122]) -> [PASS][45] [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl5/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl5/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite: - shard-kbl: [DMESG-WARN][46] ([i915#1982]) -> [PASS][47] [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render: - shard-tglb: [DMESG-WARN][48] ([i915#1982]) -> [PASS][49] +1 similar issue [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render.html * igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary: - shard-iclb: [DMESG-WARN][50] ([i915#1982]) -> [PASS][51] [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-iclb3/igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-iclb5/igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [FAIL][52] ([i915#1188]) -> [PASS][53] [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl7/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_psr@psr2_sprite_plane_onoff: - shard-iclb: [SKIP][54] ([fdo#109441]) -> [PASS][55] [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-iclb5/igt@kms_psr@psr2_sprite_plane_onoff.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-iclb2/igt@kms_psr@psr2_sprite_plane_onoff.html #### Warnings #### * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [DMESG-FAIL][56] ([fdo#108145] / [i915#1982]) -> [DMESG-WARN][57] ([i915#1982]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8832/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#128]: https://gitlab.freedesktop.org/drm/intel/issues/128 [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635 [i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#78]: https://gitlab.freedesktop.org/drm/intel/issues/78 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_8832 -> Patchwork_18294 CI-20190529: 20190529 CI_DRM_8832: 00b9a4b2331e1dceef8994e3b144e2c5e8c55003 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5757: d78c7fd293cb228fe03ccff730202b033e25ff18 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18294: c9d01ff1c89f338f52fd60f7261fe51395897a3e @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18294/index.html [-- Attachment #1.2: Type: text/html, Size: 15654 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: Add generic i915_ggtt ballooning support @ 2020-01-11 17:36 Michal Wajdeczko 0 siblings, 0 replies; 8+ messages in thread From: Michal Wajdeczko @ 2020-01-11 17:36 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula Reserving part of the GGTT for the GuC requires same steps as in VGT GGTT ballooning. Add generic GGTT ballooning helpers to intel_ggtt.c to avoid code duplication. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Xiong Zhang <xiong.y.zhang@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/gt/intel_ggtt.c | 71 ++++++++++++++++++++++------ drivers/gpu/drm/i915/gt/intel_gtt.h | 4 ++ drivers/gpu/drm/i915/i915_vgpu.c | 60 +++++------------------ 3 files changed, 73 insertions(+), 62 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c index 79096722ce16..636542c7c272 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -459,28 +459,17 @@ static void ggtt_unbind_vma(struct i915_vma *vma) static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt) { - u64 size; - int ret; - if (!USES_GUC(ggtt->vm.i915)) return 0; GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP); - size = ggtt->vm.total - GUC_GGTT_TOP; - - ret = i915_gem_gtt_reserve(&ggtt->vm, &ggtt->uc_fw, size, - GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE, - PIN_NOEVICT); - if (ret) - DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n"); - - return ret; + return i915_ggtt_balloon(ggtt, GUC_GGTT_TOP, ggtt->vm.total, + &ggtt->uc_fw); } static void ggtt_release_guc_top(struct i915_ggtt *ggtt) { - if (drm_mm_node_allocated(&ggtt->uc_fw)) - drm_mm_remove_node(&ggtt->uc_fw); + i915_ggtt_deballoon(ggtt, &ggtt->uc_fw); } static void cleanup_init_ggtt(struct i915_ggtt *ggtt) @@ -1484,3 +1473,57 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma) } return ret; } + +/** + * i915_ggtt_balloon - reserve fixed space in an GGTT + * @ggtt: the &struct i915_ggtt + * @start: start offset inside the GGTT, + * must be #I915_GTT_MIN_ALIGNMENT aligned + * @end: end offset inside the GGTT, + * must be #I915_GTT_PAGE_SIZE aligned + * @node: the &struct drm_mm_node + * + * i915_ggtt_balloon() tries to reserve the @node from @start to @end inside + * GGTT the address space. + * + * Returns: 0 on success, -ENOSPC if no suitable hole is found. + */ +int i915_ggtt_balloon(struct i915_ggtt *ggtt, u64 start, u64 end, + struct drm_mm_node *node) +{ + u64 size = end - start; + int err; + + GEM_BUG_ON(start >= end); + DRM_DEV_DEBUG_DRIVER(ggtt->vm.i915->drm.dev, + "%sGGTT [%#llx-%#llx] %lluK\n", + "ballooning ", start, end, size / SZ_1K); + + err = i915_gem_gtt_reserve(&ggtt->vm, node, size, start, + I915_COLOR_UNEVICTABLE, PIN_NOEVICT); + if (unlikely(err)) { + DRM_DEV_ERROR(ggtt->vm.i915->drm.dev, + "%sGGTT [%#llx-%#llx] %lluK\n", + "Failed to balloon ", node->start, + node->start + node->size, node->size / SZ_1K); + return err; + } + + ggtt->vm.reserved += node->size; + return 0; +} + +void i915_ggtt_deballoon(struct i915_ggtt *ggtt, struct drm_mm_node *node) +{ + if (!drm_mm_node_allocated(node)) + return; + + DRM_DEV_DEBUG_DRIVER(ggtt->vm.i915->drm.dev, + "%sGGTT [%#llx-%#llx] %lluK\n", + "deballooning ", node->start, + node->start + node->size, node->size / SZ_1K); + + GEM_BUG_ON(ggtt->vm.reserved < node->size); + ggtt->vm.reserved -= node->size; + drm_mm_remove_node(node); +} diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h index 7da7681c20b1..ac852d1a3302 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.h +++ b/drivers/gpu/drm/i915/gt/intel_gtt.h @@ -508,6 +508,10 @@ static inline bool i915_ggtt_has_aperture(const struct i915_ggtt *ggtt) return ggtt->mappable_end > 0; } +int i915_ggtt_balloon(struct i915_ggtt *ggtt, u64 start, u64 end, + struct drm_mm_node *node); +void i915_ggtt_deballoon(struct i915_ggtt *ggtt, struct drm_mm_node *node); + int i915_ppgtt_init_hw(struct intel_gt *gt); struct i915_ppgtt *i915_ppgtt_create(struct intel_gt *gt); diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c index 968be26735c5..4e1889a7aa5c 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.c +++ b/drivers/gpu/drm/i915/i915_vgpu.c @@ -117,21 +117,6 @@ struct _balloon_info_ { static struct _balloon_info_ bl_info; -static void vgt_deballoon_space(struct i915_ggtt *ggtt, - struct drm_mm_node *node) -{ - if (!drm_mm_node_allocated(node)) - return; - - DRM_DEBUG_DRIVER("deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n", - node->start, - node->start + node->size, - node->size / 1024); - - ggtt->vm.reserved -= node->size; - drm_mm_remove_node(node); -} - /** * intel_vgt_deballoon - deballoon reserved graphics address trunks * @ggtt: the global GGTT from which we reserved earlier @@ -149,28 +134,7 @@ void intel_vgt_deballoon(struct i915_ggtt *ggtt) DRM_DEBUG("VGT deballoon.\n"); for (i = 0; i < 4; i++) - vgt_deballoon_space(ggtt, &bl_info.space[i]); -} - -static int vgt_balloon_space(struct i915_ggtt *ggtt, - struct drm_mm_node *node, - unsigned long start, unsigned long end) -{ - unsigned long size = end - start; - int ret; - - if (start >= end) - return -EINVAL; - - DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n", - start, end, size / 1024); - ret = i915_gem_gtt_reserve(&ggtt->vm, node, - size, start, I915_COLOR_UNEVICTABLE, - 0); - if (!ret) - ggtt->vm.reserved += size; - - return ret; + i915_ggtt_deballoon(ggtt, &bl_info.space[i]); } /** @@ -256,32 +220,32 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) /* Unmappable graphic memory ballooning */ if (unmappable_base > ggtt->mappable_end) { - ret = vgt_balloon_space(ggtt, &bl_info.space[2], - ggtt->mappable_end, unmappable_base); + ret = i915_ggtt_balloon(ggtt, ggtt->mappable_end, + unmappable_base, &bl_info.space[2]); if (ret) goto err; } if (unmappable_end < ggtt_end) { - ret = vgt_balloon_space(ggtt, &bl_info.space[3], - unmappable_end, ggtt_end); + ret = i915_ggtt_balloon(ggtt, unmappable_end, ggtt_end, + &bl_info.space[3]); if (ret) goto err_upon_mappable; } /* Mappable graphic memory ballooning */ if (mappable_base) { - ret = vgt_balloon_space(ggtt, &bl_info.space[0], - 0, mappable_base); + ret = i915_ggtt_balloon(ggtt, 0, mappable_base, + &bl_info.space[0]); if (ret) goto err_upon_unmappable; } if (mappable_end < ggtt->mappable_end) { - ret = vgt_balloon_space(ggtt, &bl_info.space[1], - mappable_end, ggtt->mappable_end); + ret = i915_ggtt_balloon(ggtt, mappable_end, ggtt->mappable_end, + &bl_info.space[1]); if (ret) goto err_below_mappable; @@ -291,11 +255,11 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt) return 0; err_below_mappable: - vgt_deballoon_space(ggtt, &bl_info.space[0]); + i915_ggtt_deballoon(ggtt, &bl_info.space[0]); err_upon_unmappable: - vgt_deballoon_space(ggtt, &bl_info.space[3]); + i915_ggtt_deballoon(ggtt, &bl_info.space[3]); err_upon_mappable: - vgt_deballoon_space(ggtt, &bl_info.space[2]); + i915_ggtt_deballoon(ggtt, &bl_info.space[2]); err: DRM_ERROR("VGT balloon fail\n"); return ret; -- 2.19.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-08-02 19:37 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-08-02 15:34 [Intel-gfx] [PATCH 0/2] Add generic i915_ggtt ballooning support Michal Wajdeczko 2020-08-02 15:34 ` [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: " Michal Wajdeczko 2020-08-02 15:56 ` Chris Wilson 2020-08-02 15:34 ` [Intel-gfx] [PATCH 2/2] drm/i915/vgt: Move VGT GGTT ballooning nodes to i915_ggtt Michal Wajdeczko 2020-08-02 15:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add generic i915_ggtt ballooning support Patchwork 2020-08-02 16:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-08-02 19:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2020-01-11 17:36 [Intel-gfx] [PATCH 1/2] drm/i915/ggtt: " Michal Wajdeczko
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