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* [intel-linux-intel-lts:5.4/yocto 8401/8941] drivers/gpu/drm/kmb/kmb_crtc.c:101:6: warning: variable 'vsync_end_offset' set but not used
@ 2020-08-02 15:31 kernel test robot
  0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2020-08-02 15:31 UTC (permalink / raw)
  To: kbuild-all

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tree:   https://github.com/intel/linux-intel-lts.git 5.4/yocto
head:   0194b1072920957ee8a7abdfb3ddebee69c1d485
commit: 1eb5fdc59996895071868eda8aff4088ba9ae303 [8401/8941] drm/kmb: Set hardcoded values to LCD_VSYNC_START
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout 1eb5fdc59996895071868eda8aff4088ba9ae303
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/kmb/kmb_crtc.c: In function 'kmb_crtc_mode_set_nofb':
>> drivers/gpu/drm/kmb/kmb_crtc.c:101:6: warning: variable 'vsync_end_offset' set but not used [-Wunused-but-set-variable]
     101 |  int vsync_end_offset;
         |      ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/kmb/kmb_crtc.c:100:6: warning: variable 'vsync_start_offset' set but not used [-Wunused-but-set-variable]
     100 |  int vsync_start_offset;
         |      ^~~~~~~~~~~~~~~~~~

vim +/vsync_end_offset +101 drivers/gpu/drm/kmb/kmb_crtc.c

776ba618de297ec Anitha Chrisanthus 2018-11-29   94  
776ba618de297ec Anitha Chrisanthus 2018-11-29   95  static void kmb_crtc_mode_set_nofb(struct drm_crtc *crtc)
776ba618de297ec Anitha Chrisanthus 2018-11-29   96  {
776ba618de297ec Anitha Chrisanthus 2018-11-29   97  	struct drm_display_mode *m = &crtc->state->adjusted_mode;
ccf63d55c166480 Anitha Chrisanthus 2019-06-20   98  	struct drm_device *dev = crtc->dev;
776ba618de297ec Anitha Chrisanthus 2018-11-29   99  	struct videomode vm;
776ba618de297ec Anitha Chrisanthus 2018-11-29 @100  	int vsync_start_offset;
776ba618de297ec Anitha Chrisanthus 2018-11-29 @101  	int vsync_end_offset;
776ba618de297ec Anitha Chrisanthus 2018-11-29  102  	unsigned int ctrl = 0;
776ba618de297ec Anitha Chrisanthus 2018-11-29  103  
776ba618de297ec Anitha Chrisanthus 2018-11-29  104  	vm.vfront_porch = m->crtc_vsync_start - m->crtc_vdisplay;
776ba618de297ec Anitha Chrisanthus 2018-11-29  105  	vm.vback_porch = m->crtc_vtotal - m->crtc_vsync_end;
776ba618de297ec Anitha Chrisanthus 2018-11-29  106  	vm.vsync_len = m->crtc_vsync_end - m->crtc_vsync_start;
776ba618de297ec Anitha Chrisanthus 2018-11-29  107  	vm.hfront_porch = m->crtc_hsync_start - m->crtc_hdisplay;
776ba618de297ec Anitha Chrisanthus 2018-11-29  108  	vm.hback_porch = m->crtc_htotal - m->crtc_hsync_end;
776ba618de297ec Anitha Chrisanthus 2018-11-29  109  	vm.hsync_len = m->crtc_hsync_end - m->crtc_hsync_start;
776ba618de297ec Anitha Chrisanthus 2018-11-29  110  
776ba618de297ec Anitha Chrisanthus 2018-11-29  111  	vsync_start_offset = m->crtc_vsync_start - m->crtc_hsync_start;
776ba618de297ec Anitha Chrisanthus 2018-11-29  112  	vsync_end_offset = m->crtc_vsync_end - m->crtc_hsync_end;
776ba618de297ec Anitha Chrisanthus 2018-11-29  113  
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  114  	kmb_write_lcd(dev->dev_private, LCD_V_ACTIVEHEIGHT,
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  115  			m->crtc_vdisplay - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  116  	kmb_write_lcd(dev->dev_private, LCD_V_BACKPORCH, vm.vback_porch - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  117  	kmb_write_lcd(dev->dev_private, LCD_V_FRONTPORCH, vm.vfront_porch - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  118  	kmb_write_lcd(dev->dev_private, LCD_VSYNC_WIDTH, vm.vsync_len - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  119  	kmb_write_lcd(dev->dev_private, LCD_H_ACTIVEWIDTH,
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  120  			m->crtc_hdisplay - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  121  	kmb_write_lcd(dev->dev_private, LCD_H_BACKPORCH, vm.hback_porch - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  122  	kmb_write_lcd(dev->dev_private, LCD_H_FRONTPORCH, vm.hfront_porch - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  123  	kmb_write_lcd(dev->dev_private, LCD_HSYNC_WIDTH, vm.hsync_len - 1);
1eb5fdc59996895 Anitha Chrisanthus 2019-07-12  124  	/*this is hardcoded as 0 in the Myriadx code */
1eb5fdc59996895 Anitha Chrisanthus 2019-07-12  125  	kmb_write_lcd(dev->dev_private, LCD_VSYNC_START, 0);
1eb5fdc59996895 Anitha Chrisanthus 2019-07-12  126  	kmb_write_lcd(dev->dev_private, LCD_VSYNC_END, 0);
776ba618de297ec Anitha Chrisanthus 2018-11-29  127  
776ba618de297ec Anitha Chrisanthus 2018-11-29  128  	if (m->flags == DRM_MODE_FLAG_INTERLACE) {
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  129  		kmb_write_lcd(dev->dev_private,
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  130  				LCD_VSYNC_WIDTH_EVEN, vm.vsync_len - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  131  		kmb_write_lcd(dev->dev_private,
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  132  				LCD_V_BACKPORCH_EVEN, vm.vback_porch - 1);
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  133  		kmb_write_lcd(dev->dev_private,
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  134  				LCD_V_FRONTPORCH_EVEN, vm.vfront_porch - 1);
1eb5fdc59996895 Anitha Chrisanthus 2019-07-12  135  		kmb_write_lcd(dev->dev_private, LCD_V_ACTIVEHEIGHT_EVEN,
1eb5fdc59996895 Anitha Chrisanthus 2019-07-12  136  			m->crtc_vdisplay - 1);
1eb5fdc59996895 Anitha Chrisanthus 2019-07-12  137  		/*this is hardcoded as 10 in the Myriadx code*/
1eb5fdc59996895 Anitha Chrisanthus 2019-07-12  138  		kmb_write_lcd(dev->dev_private, LCD_VSYNC_START_EVEN, 10);
1eb5fdc59996895 Anitha Chrisanthus 2019-07-12  139  		kmb_write_lcd(dev->dev_private, LCD_VSYNC_END_EVEN, 10);
776ba618de297ec Anitha Chrisanthus 2018-11-29  140  	}
24bcc7c19dfc01c Anitha Chrisanthus 2019-01-30  141  	/* enable VL1 layer as default */
24bcc7c19dfc01c Anitha Chrisanthus 2019-01-30  142  	ctrl = LCD_CTRL_ENABLE | LCD_CTRL_VL1_ENABLE;
776ba618de297ec Anitha Chrisanthus 2018-11-29  143  	ctrl |= LCD_CTRL_PROGRESSIVE | LCD_CTRL_TIM_GEN_ENABLE
776ba618de297ec Anitha Chrisanthus 2018-11-29  144  		| LCD_CTRL_OUTPUT_ENABLED;
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  145  	kmb_write_lcd(dev->dev_private, LCD_CONTROL, ctrl);
776ba618de297ec Anitha Chrisanthus 2018-11-29  146  
ccf63d55c166480 Anitha Chrisanthus 2019-06-20  147  	kmb_write_lcd(dev->dev_private, LCD_TIMING_GEN_TRIG, ENABLE);
776ba618de297ec Anitha Chrisanthus 2018-11-29  148  
776ba618de297ec Anitha Chrisanthus 2018-11-29  149  	/* TBD */
776ba618de297ec Anitha Chrisanthus 2018-11-29  150  	/* set clocks here */
776ba618de297ec Anitha Chrisanthus 2018-11-29  151  }
776ba618de297ec Anitha Chrisanthus 2018-11-29  152  

:::::: The code at line 101 was first introduced by commit
:::::: 776ba618de297ec68dc793e07376b2fcaa9cc80b drm/kmb: Add support for KeemBay Display

:::::: TO: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
:::::: CC: Qin, Chao <chao.qin@intel.com>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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2020-08-02 15:31 [intel-linux-intel-lts:5.4/yocto 8401/8941] drivers/gpu/drm/kmb/kmb_crtc.c:101:6: warning: variable 'vsync_end_offset' set but not used kernel test robot

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