* [PATCH 0/3] Fix uncompress debug prints on Qualcomm
@ 2020-08-21 12:39 ` Linus Walleij
0 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2020-08-21 12:39 UTC (permalink / raw)
To: Russell King
Cc: linux-arm-kernel, Andy Gross, Bjorn Andersson, linux-arm-msm,
Linus Walleij
This fixes the earlies debug prints on the Qualcomm platform
and possibly others. The root cause that the "Uncompressing Linux..."
and other super-early debug prints were not working was that
the Qualcomm UART has some elaborate TX ready code in waituart
(after this waituarttxrdy) that was not called.
waituart would sometimes check for CTS (clear to send) which
would make the kernel unstable on these platforms if we
introduce more users of that macro without thinking twice.
To fix this properly I first split the CTS check into its own
function and make it clear when we do or do not check for CTS.
I then convert the flow control option for 8250 to a generic flow
control option so that other debug UART drivers can look for
CTS to be asserted if they support it.
Linus Walleij (3):
ARM: debug: Split waituart to CTS and TXRDY
ARM: debug: Select flow control for all debug UARTs
ARM: uncompress: Wait for ready and busy in debug prints
arch/arm/Kconfig.debug | 16 +++++++++++-----
arch/arm/boot/compressed/debug.S | 5 ++++-
arch/arm/boot/compressed/head.S | 15 ++++++++++-----
arch/arm/include/debug/8250.S | 7 ++++---
arch/arm/include/debug/asm9260.S | 5 ++++-
arch/arm/include/debug/at91.S | 5 ++++-
arch/arm/include/debug/bcm63xx.S | 5 ++++-
arch/arm/include/debug/brcmstb.S | 5 ++++-
arch/arm/include/debug/clps711x.S | 5 ++++-
arch/arm/include/debug/dc21285.S | 5 ++++-
arch/arm/include/debug/digicolor.S | 5 ++++-
arch/arm/include/debug/efm32.S | 5 ++++-
arch/arm/include/debug/icedcc.S | 15 ++++++++++++---
arch/arm/include/debug/imx.S | 5 ++++-
arch/arm/include/debug/meson.S | 5 ++++-
arch/arm/include/debug/msm.S | 5 ++++-
arch/arm/include/debug/omap2plus.S | 5 ++++-
arch/arm/include/debug/pl01x.S | 5 ++++-
arch/arm/include/debug/renesas-scif.S | 5 ++++-
arch/arm/include/debug/sa1100.S | 5 ++++-
arch/arm/include/debug/samsung.S | 5 ++++-
arch/arm/include/debug/sirf.S | 5 ++++-
arch/arm/include/debug/sti.S | 5 ++++-
arch/arm/include/debug/stm32.S | 5 ++++-
arch/arm/include/debug/tegra.S | 7 ++++---
arch/arm/include/debug/vf.S | 5 ++++-
arch/arm/include/debug/vt8500.S | 5 ++++-
arch/arm/include/debug/zynq.S | 5 ++++-
arch/arm/kernel/debug.S | 11 +++++++++--
29 files changed, 142 insertions(+), 44 deletions(-)
--
2.26.2
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 0/3] Fix uncompress debug prints on Qualcomm
@ 2020-08-21 12:39 ` Linus Walleij
0 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2020-08-21 12:39 UTC (permalink / raw)
To: Russell King
Cc: linux-arm-msm, Linus Walleij, Andy Gross, linux-arm-kernel,
Bjorn Andersson
This fixes the earlies debug prints on the Qualcomm platform
and possibly others. The root cause that the "Uncompressing Linux..."
and other super-early debug prints were not working was that
the Qualcomm UART has some elaborate TX ready code in waituart
(after this waituarttxrdy) that was not called.
waituart would sometimes check for CTS (clear to send) which
would make the kernel unstable on these platforms if we
introduce more users of that macro without thinking twice.
To fix this properly I first split the CTS check into its own
function and make it clear when we do or do not check for CTS.
I then convert the flow control option for 8250 to a generic flow
control option so that other debug UART drivers can look for
CTS to be asserted if they support it.
Linus Walleij (3):
ARM: debug: Split waituart to CTS and TXRDY
ARM: debug: Select flow control for all debug UARTs
ARM: uncompress: Wait for ready and busy in debug prints
arch/arm/Kconfig.debug | 16 +++++++++++-----
arch/arm/boot/compressed/debug.S | 5 ++++-
arch/arm/boot/compressed/head.S | 15 ++++++++++-----
arch/arm/include/debug/8250.S | 7 ++++---
arch/arm/include/debug/asm9260.S | 5 ++++-
arch/arm/include/debug/at91.S | 5 ++++-
arch/arm/include/debug/bcm63xx.S | 5 ++++-
arch/arm/include/debug/brcmstb.S | 5 ++++-
arch/arm/include/debug/clps711x.S | 5 ++++-
arch/arm/include/debug/dc21285.S | 5 ++++-
arch/arm/include/debug/digicolor.S | 5 ++++-
arch/arm/include/debug/efm32.S | 5 ++++-
arch/arm/include/debug/icedcc.S | 15 ++++++++++++---
arch/arm/include/debug/imx.S | 5 ++++-
arch/arm/include/debug/meson.S | 5 ++++-
arch/arm/include/debug/msm.S | 5 ++++-
arch/arm/include/debug/omap2plus.S | 5 ++++-
arch/arm/include/debug/pl01x.S | 5 ++++-
arch/arm/include/debug/renesas-scif.S | 5 ++++-
arch/arm/include/debug/sa1100.S | 5 ++++-
arch/arm/include/debug/samsung.S | 5 ++++-
arch/arm/include/debug/sirf.S | 5 ++++-
arch/arm/include/debug/sti.S | 5 ++++-
arch/arm/include/debug/stm32.S | 5 ++++-
arch/arm/include/debug/tegra.S | 7 ++++---
arch/arm/include/debug/vf.S | 5 ++++-
arch/arm/include/debug/vt8500.S | 5 ++++-
arch/arm/include/debug/zynq.S | 5 ++++-
arch/arm/kernel/debug.S | 11 +++++++++--
29 files changed, 142 insertions(+), 44 deletions(-)
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] ARM: debug: Split waituart to CTS and TXRDY
2020-08-21 12:39 ` Linus Walleij
@ 2020-08-21 12:39 ` Linus Walleij
-1 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2020-08-21 12:39 UTC (permalink / raw)
To: Russell King
Cc: linux-arm-kernel, Andy Gross, Bjorn Andersson, linux-arm-msm,
Linus Walleij
This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) was dangerous because in some cases
this will involve waiting for a modem CTS (clear to send)
signal, and debug messages would maybe not work on platforms
with no modem connected to the UART port: they will just
hang waiting for the modem to assert CTS and this might never
happen.
Looking through all UART debug drivers implementing the waituart
macro I discovered that all users except two actually use this
macro to check if the UART is ready for TX, let's call this
TXRDY.
Only two debug UART drivers actually check for CTS:
- arch/arm/include/debug/8250.S
- arch/arm/include/debug/tegra.S
The former is very significant since the 8250 is possibly
the most common UART on the planet.
We have the following problem: the semantics of waituart are
ambiguous making it dangerous to introduce the macro to debug
code fixing debug prints for Qualcomm. To start to pry this
problem apart, this patch does the following:
- Convert all debug UART drivers to define two macros:
- waituartcts with the clear semantic to wait for CTS
to be asserted
- waituarttxrdy with the clear semantic to wait for the TX
capability of the UART to be ready
- When doing this take care to assign the right function to
each drivers macro, so they now do exactly the above.
- Update the three sites in the kernel invoking the waituart
macro to call waituartcts/waituarttxrdy in sequence, so that
the functional impact on the kernel should be zero.
After this we can start to change the code sites using this
code to do the right thing.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/compressed/debug.S | 3 ++-
arch/arm/include/debug/8250.S | 5 ++++-
arch/arm/include/debug/asm9260.S | 5 ++++-
arch/arm/include/debug/at91.S | 5 ++++-
arch/arm/include/debug/bcm63xx.S | 5 ++++-
arch/arm/include/debug/brcmstb.S | 5 ++++-
arch/arm/include/debug/clps711x.S | 5 ++++-
arch/arm/include/debug/dc21285.S | 5 ++++-
arch/arm/include/debug/digicolor.S | 5 ++++-
arch/arm/include/debug/efm32.S | 5 ++++-
arch/arm/include/debug/icedcc.S | 15 ++++++++++++---
arch/arm/include/debug/imx.S | 5 ++++-
arch/arm/include/debug/meson.S | 5 ++++-
arch/arm/include/debug/msm.S | 5 ++++-
arch/arm/include/debug/omap2plus.S | 5 ++++-
arch/arm/include/debug/pl01x.S | 5 ++++-
arch/arm/include/debug/renesas-scif.S | 5 ++++-
arch/arm/include/debug/sa1100.S | 5 ++++-
arch/arm/include/debug/samsung.S | 5 ++++-
arch/arm/include/debug/sirf.S | 5 ++++-
arch/arm/include/debug/sti.S | 5 ++++-
arch/arm/include/debug/stm32.S | 5 ++++-
arch/arm/include/debug/tegra.S | 5 ++++-
arch/arm/include/debug/vf.S | 5 ++++-
arch/arm/include/debug/vt8500.S | 5 ++++-
arch/arm/include/debug/zynq.S | 5 ++++-
arch/arm/kernel/debug.S | 6 ++++--
27 files changed, 114 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S
index 6bf2917a4621..97f4e74692e8 100644
--- a/arch/arm/boot/compressed/debug.S
+++ b/arch/arm/boot/compressed/debug.S
@@ -8,7 +8,8 @@
ENTRY(putc)
addruart r1, r2, r3
- waituart r3, r1
+ waituartcts r3, r1
+ waituarttxrdy r3, r1
senduart r0, r1
busyuart r3, r1
mov pc, lr
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
index e4a036f082c2..769246d87fff 100644
--- a/arch/arm/include/debug/8250.S
+++ b/arch/arm/include/debug/8250.S
@@ -45,7 +45,10 @@
bne 1002b
.endm
- .macro waituart,rd,rx
+ .macro waituarttxrdy,rd,rx
+ .endm
+
+ .macro waituartcts,rd,rx
#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
1001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
diff --git a/arch/arm/include/debug/asm9260.S b/arch/arm/include/debug/asm9260.S
index 0da1eb625331..5a0ce145c44a 100644
--- a/arch/arm/include/debug/asm9260.S
+++ b/arch/arm/include/debug/asm9260.S
@@ -11,7 +11,10 @@
ldr \rv, = CONFIG_DEBUG_UART_VIRT
.endm
- .macro waituart,rd,rx
+ .macro waituarttxrdy,rd,rx
+ .endm
+
+ .macro waituartcts,rd,rx
.endm
.macro senduart,rd,rx
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index 6c91cbaaa20b..17722824e2f2 100644
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -19,12 +19,15 @@
strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
.endm
- .macro waituart,rd,rx
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
beq 1001b
.endm
+ .macro waituartcts,rd,rx
+ .endm
+
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
diff --git a/arch/arm/include/debug/bcm63xx.S b/arch/arm/include/debug/bcm63xx.S
index 06a896227396..da65abb6738d 100644
--- a/arch/arm/include/debug/bcm63xx.S
+++ b/arch/arm/include/debug/bcm63xx.S
@@ -17,12 +17,15 @@
strb \rd, [\rx, #UART_FIFO_REG]
.endm
- .macro waituart, rd, rx
+ .macro waituarttxrdy, rd, rx
1001: ldr \rd, [\rx, #UART_IR_REG]
tst \rd, #(1 << UART_IR_TXEMPTY)
beq 1001b
.endm
+ .macro waituartcts, rd, rx
+ .endm
+
.macro busyuart, rd, rx
1002: ldr \rd, [\rx, #UART_IR_REG]
tst \rd, #(1 << UART_IR_TXTRESH)
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 132a20c4a676..7ffe66993029 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -142,7 +142,10 @@ ARM_BE8( rev \rd, \rd )
bne 1002b
.endm
- .macro waituart,rd,rx
+ .macro waituarttxrdy,rd,rx
+ .endm
+
+ .macro waituartcts,rd,rx
.endm
/*
diff --git a/arch/arm/include/debug/clps711x.S b/arch/arm/include/debug/clps711x.S
index 774a67ac3877..a983d12a6515 100644
--- a/arch/arm/include/debug/clps711x.S
+++ b/arch/arm/include/debug/clps711x.S
@@ -20,7 +20,10 @@
ldr \rp, =CLPS711X_UART_PADDR
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
.macro senduart,rd,rx
diff --git a/arch/arm/include/debug/dc21285.S b/arch/arm/include/debug/dc21285.S
index d7e8c71706ab..4ec0e5e31704 100644
--- a/arch/arm/include/debug/dc21285.S
+++ b/arch/arm/include/debug/dc21285.S
@@ -34,5 +34,8 @@
bne 1001b
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S
index 256f5f4da275..443674cad76a 100644
--- a/arch/arm/include/debug/digicolor.S
+++ b/arch/arm/include/debug/digicolor.S
@@ -21,7 +21,10 @@
strb \rd, [\rx, #UA0_EMI_REC]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
.macro busyuart,rd,rx
diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S
index 5ed5028306f4..b0083d6e31e8 100644
--- a/arch/arm/include/debug/efm32.S
+++ b/arch/arm/include/debug/efm32.S
@@ -29,7 +29,10 @@
strb \rd, [\rx, #UARTn_TXDATA]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #UARTn_STATUS]
tst \rd, #UARTn_STATUS_TXBL
beq 1001b
diff --git a/arch/arm/include/debug/icedcc.S b/arch/arm/include/debug/icedcc.S
index 74a0dd036a17..d5e65da8a687 100644
--- a/arch/arm/include/debug/icedcc.S
+++ b/arch/arm/include/debug/icedcc.S
@@ -23,7 +23,10 @@
beq 1001b
.endm
- .macro waituart, rd, rx
+ .macro waituartcts, rd, rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
@@ -47,7 +50,10 @@
beq 1001b
.endm
- .macro waituart, rd, rx
+ .macro waituartcts, rd, rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
mov \rd, #0x10000000
1001:
subs \rd, \rd, #1
@@ -72,7 +78,10 @@
.endm
- .macro waituart, rd, rx
+ .macro waituartcts, rd, rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S
index 1c1b9d1da4c8..bb7b9550580c 100644
--- a/arch/arm/include/debug/imx.S
+++ b/arch/arm/include/debug/imx.S
@@ -35,7 +35,10 @@
str \rd, [\rx, #0x40] @ TXDATA
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
.macro busyuart,rd,rx
diff --git a/arch/arm/include/debug/meson.S b/arch/arm/include/debug/meson.S
index 1e501a0054ae..7b60e4401225 100644
--- a/arch/arm/include/debug/meson.S
+++ b/arch/arm/include/debug/meson.S
@@ -25,7 +25,10 @@
beq 1002b
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
tst \rd, #MESON_AO_UART_TX_FIFO_FULL
bne 1001b
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9405b71461da..530edc74f9a3 100644
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -17,7 +17,10 @@ ARM_BE8(rev \rd, \rd )
str \rd, [\rx, #0x70]
.endm
- .macro waituart, rd, rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
@ check for TX_EMT in UARTDM_SR
ldr \rd, [\rx, #0x08]
ARM_BE8(rev \rd, \rd )
diff --git a/arch/arm/include/debug/omap2plus.S b/arch/arm/include/debug/omap2plus.S
index b5696a33ba0f..0680be6c79d3 100644
--- a/arch/arm/include/debug/omap2plus.S
+++ b/arch/arm/include/debug/omap2plus.S
@@ -75,5 +75,8 @@ omap_uart_lsr: .word 0
bne 1001b
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
diff --git a/arch/arm/include/debug/pl01x.S b/arch/arm/include/debug/pl01x.S
index a2a553afe7b8..0c7bfa4c10db 100644
--- a/arch/arm/include/debug/pl01x.S
+++ b/arch/arm/include/debug/pl01x.S
@@ -26,7 +26,10 @@
strb \rd, [\rx, #UART01x_DR]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #UART01x_FR]
ARM_BE8( rev \rd, \rd )
tst \rd, #UART01x_FR_TXFF
diff --git a/arch/arm/include/debug/renesas-scif.S b/arch/arm/include/debug/renesas-scif.S
index 25f06663a9a4..8e433e981bbe 100644
--- a/arch/arm/include/debug/renesas-scif.S
+++ b/arch/arm/include/debug/renesas-scif.S
@@ -33,7 +33,10 @@
ldr \rv, =SCIF_VIRT
.endm
- .macro waituart, rd, rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
1001: ldrh \rd, [\rx, #FSR]
tst \rd, #TDFE
beq 1001b
diff --git a/arch/arm/include/debug/sa1100.S b/arch/arm/include/debug/sa1100.S
index 6109e6058e5b..7968ea52df3d 100644
--- a/arch/arm/include/debug/sa1100.S
+++ b/arch/arm/include/debug/sa1100.S
@@ -51,7 +51,10 @@
str \rd, [\rx, #UTDR]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #UTSR1]
tst \rd, #UTSR1_TNF
beq 1001b
diff --git a/arch/arm/include/debug/samsung.S b/arch/arm/include/debug/samsung.S
index 69201d7fb48f..ab474d564a90 100644
--- a/arch/arm/include/debug/samsung.S
+++ b/arch/arm/include/debug/samsung.S
@@ -69,7 +69,10 @@ ARM_BE8(rev \rd, \rd)
1002: @ exit busyuart
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
ldr \rd, [\rx, # S3C2410_UFCON]
ARM_BE8(rev \rd, \rd)
tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S
index e73e4de0a015..3612c7b9cbe7 100644
--- a/arch/arm/include/debug/sirf.S
+++ b/arch/arm/include/debug/sirf.S
@@ -29,7 +29,10 @@
.macro busyuart,rd,rx
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
tst \rd, #SIRF_LLUART_TXFIFO_EMPTY
beq 1001b
diff --git a/arch/arm/include/debug/sti.S b/arch/arm/include/debug/sti.S
index 6b42c91f217d..72d052511890 100644
--- a/arch/arm/include/debug/sti.S
+++ b/arch/arm/include/debug/sti.S
@@ -45,7 +45,10 @@
strb \rd, [\rx, #ASC_TX_BUF_OFF]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #ASC_STA_OFF]
tst \rd, #ASC_STA_TX_FULL
bne 1001b
diff --git a/arch/arm/include/debug/stm32.S b/arch/arm/include/debug/stm32.S
index f3c4a37210ed..b6d9df30e37d 100644
--- a/arch/arm/include/debug/stm32.S
+++ b/arch/arm/include/debug/stm32.S
@@ -27,7 +27,10 @@
strb \rd, [\rx, #STM32_USART_TDR_OFF]
.endm
-.macro waituart,rd,rx
+.macro waituartcts,rd,rx
+.endm
+
+.macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
tst \rd, #STM32_USART_TXE @ TXE = 1 = tx empty
beq 1001b
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index 2148d0f88591..2bca6358cdd0 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -178,7 +178,7 @@
1002:
.endm
- .macro waituart, rd, rx
+ .macro waituartcts, rd, rx
#ifdef FLOW_CONTROL
cmp \rx, #0
beq 1002f
@@ -189,6 +189,9 @@
#endif
.endm
+ .macro waituarttxrdy,rd,rx
+ .endm
+
/*
* Storage for the state maintained by the macros above.
*
diff --git a/arch/arm/include/debug/vf.S b/arch/arm/include/debug/vf.S
index 854d9bd82770..035bcbf117ab 100644
--- a/arch/arm/include/debug/vf.S
+++ b/arch/arm/include/debug/vf.S
@@ -29,5 +29,8 @@
beq 1001b @ wait until transmit done
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
diff --git a/arch/arm/include/debug/vt8500.S b/arch/arm/include/debug/vt8500.S
index 8dc1df2d91b8..d01094fdbc8c 100644
--- a/arch/arm/include/debug/vt8500.S
+++ b/arch/arm/include/debug/vt8500.S
@@ -28,7 +28,10 @@
bne 1001b
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
#endif
diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S
index 58d77c972fd6..5d42cc35ecf3 100644
--- a/arch/arm/include/debug/zynq.S
+++ b/arch/arm/include/debug/zynq.S
@@ -33,7 +33,10 @@
strb \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #UART_SR_OFFSET]
ARM_BE8( rev \rd, \rd )
tst \rd, #UART_SR_TXEMPTY
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index e112072b579d..e7c87522c176 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -89,11 +89,13 @@ ENTRY(printascii)
2: teq r1, #'\n'
bne 3f
mov r1, #'\r'
- waituart r2, r3
+ waituartcts r2, r3
+ waituarttxrdy r2, r3
senduart r1, r3
busyuart r2, r3
mov r1, #'\n'
-3: waituart r2, r3
+3: waituartcts r2, r3
+ waituarttxrdy r2, r3
senduart r1, r3
busyuart r2, r3
b 1b
--
2.26.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/3] ARM: debug: Split waituart to CTS and TXRDY
@ 2020-08-21 12:39 ` Linus Walleij
0 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2020-08-21 12:39 UTC (permalink / raw)
To: Russell King
Cc: linux-arm-msm, Linus Walleij, Andy Gross, linux-arm-kernel,
Bjorn Andersson
This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) was dangerous because in some cases
this will involve waiting for a modem CTS (clear to send)
signal, and debug messages would maybe not work on platforms
with no modem connected to the UART port: they will just
hang waiting for the modem to assert CTS and this might never
happen.
Looking through all UART debug drivers implementing the waituart
macro I discovered that all users except two actually use this
macro to check if the UART is ready for TX, let's call this
TXRDY.
Only two debug UART drivers actually check for CTS:
- arch/arm/include/debug/8250.S
- arch/arm/include/debug/tegra.S
The former is very significant since the 8250 is possibly
the most common UART on the planet.
We have the following problem: the semantics of waituart are
ambiguous making it dangerous to introduce the macro to debug
code fixing debug prints for Qualcomm. To start to pry this
problem apart, this patch does the following:
- Convert all debug UART drivers to define two macros:
- waituartcts with the clear semantic to wait for CTS
to be asserted
- waituarttxrdy with the clear semantic to wait for the TX
capability of the UART to be ready
- When doing this take care to assign the right function to
each drivers macro, so they now do exactly the above.
- Update the three sites in the kernel invoking the waituart
macro to call waituartcts/waituarttxrdy in sequence, so that
the functional impact on the kernel should be zero.
After this we can start to change the code sites using this
code to do the right thing.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/compressed/debug.S | 3 ++-
arch/arm/include/debug/8250.S | 5 ++++-
arch/arm/include/debug/asm9260.S | 5 ++++-
arch/arm/include/debug/at91.S | 5 ++++-
arch/arm/include/debug/bcm63xx.S | 5 ++++-
arch/arm/include/debug/brcmstb.S | 5 ++++-
arch/arm/include/debug/clps711x.S | 5 ++++-
arch/arm/include/debug/dc21285.S | 5 ++++-
arch/arm/include/debug/digicolor.S | 5 ++++-
arch/arm/include/debug/efm32.S | 5 ++++-
arch/arm/include/debug/icedcc.S | 15 ++++++++++++---
arch/arm/include/debug/imx.S | 5 ++++-
arch/arm/include/debug/meson.S | 5 ++++-
arch/arm/include/debug/msm.S | 5 ++++-
arch/arm/include/debug/omap2plus.S | 5 ++++-
arch/arm/include/debug/pl01x.S | 5 ++++-
arch/arm/include/debug/renesas-scif.S | 5 ++++-
arch/arm/include/debug/sa1100.S | 5 ++++-
arch/arm/include/debug/samsung.S | 5 ++++-
arch/arm/include/debug/sirf.S | 5 ++++-
arch/arm/include/debug/sti.S | 5 ++++-
arch/arm/include/debug/stm32.S | 5 ++++-
arch/arm/include/debug/tegra.S | 5 ++++-
arch/arm/include/debug/vf.S | 5 ++++-
arch/arm/include/debug/vt8500.S | 5 ++++-
arch/arm/include/debug/zynq.S | 5 ++++-
arch/arm/kernel/debug.S | 6 ++++--
27 files changed, 114 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S
index 6bf2917a4621..97f4e74692e8 100644
--- a/arch/arm/boot/compressed/debug.S
+++ b/arch/arm/boot/compressed/debug.S
@@ -8,7 +8,8 @@
ENTRY(putc)
addruart r1, r2, r3
- waituart r3, r1
+ waituartcts r3, r1
+ waituarttxrdy r3, r1
senduart r0, r1
busyuart r3, r1
mov pc, lr
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
index e4a036f082c2..769246d87fff 100644
--- a/arch/arm/include/debug/8250.S
+++ b/arch/arm/include/debug/8250.S
@@ -45,7 +45,10 @@
bne 1002b
.endm
- .macro waituart,rd,rx
+ .macro waituarttxrdy,rd,rx
+ .endm
+
+ .macro waituartcts,rd,rx
#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
1001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
diff --git a/arch/arm/include/debug/asm9260.S b/arch/arm/include/debug/asm9260.S
index 0da1eb625331..5a0ce145c44a 100644
--- a/arch/arm/include/debug/asm9260.S
+++ b/arch/arm/include/debug/asm9260.S
@@ -11,7 +11,10 @@
ldr \rv, = CONFIG_DEBUG_UART_VIRT
.endm
- .macro waituart,rd,rx
+ .macro waituarttxrdy,rd,rx
+ .endm
+
+ .macro waituartcts,rd,rx
.endm
.macro senduart,rd,rx
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index 6c91cbaaa20b..17722824e2f2 100644
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -19,12 +19,15 @@
strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
.endm
- .macro waituart,rd,rx
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
beq 1001b
.endm
+ .macro waituartcts,rd,rx
+ .endm
+
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
diff --git a/arch/arm/include/debug/bcm63xx.S b/arch/arm/include/debug/bcm63xx.S
index 06a896227396..da65abb6738d 100644
--- a/arch/arm/include/debug/bcm63xx.S
+++ b/arch/arm/include/debug/bcm63xx.S
@@ -17,12 +17,15 @@
strb \rd, [\rx, #UART_FIFO_REG]
.endm
- .macro waituart, rd, rx
+ .macro waituarttxrdy, rd, rx
1001: ldr \rd, [\rx, #UART_IR_REG]
tst \rd, #(1 << UART_IR_TXEMPTY)
beq 1001b
.endm
+ .macro waituartcts, rd, rx
+ .endm
+
.macro busyuart, rd, rx
1002: ldr \rd, [\rx, #UART_IR_REG]
tst \rd, #(1 << UART_IR_TXTRESH)
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 132a20c4a676..7ffe66993029 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -142,7 +142,10 @@ ARM_BE8( rev \rd, \rd )
bne 1002b
.endm
- .macro waituart,rd,rx
+ .macro waituarttxrdy,rd,rx
+ .endm
+
+ .macro waituartcts,rd,rx
.endm
/*
diff --git a/arch/arm/include/debug/clps711x.S b/arch/arm/include/debug/clps711x.S
index 774a67ac3877..a983d12a6515 100644
--- a/arch/arm/include/debug/clps711x.S
+++ b/arch/arm/include/debug/clps711x.S
@@ -20,7 +20,10 @@
ldr \rp, =CLPS711X_UART_PADDR
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
.macro senduart,rd,rx
diff --git a/arch/arm/include/debug/dc21285.S b/arch/arm/include/debug/dc21285.S
index d7e8c71706ab..4ec0e5e31704 100644
--- a/arch/arm/include/debug/dc21285.S
+++ b/arch/arm/include/debug/dc21285.S
@@ -34,5 +34,8 @@
bne 1001b
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S
index 256f5f4da275..443674cad76a 100644
--- a/arch/arm/include/debug/digicolor.S
+++ b/arch/arm/include/debug/digicolor.S
@@ -21,7 +21,10 @@
strb \rd, [\rx, #UA0_EMI_REC]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
.macro busyuart,rd,rx
diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S
index 5ed5028306f4..b0083d6e31e8 100644
--- a/arch/arm/include/debug/efm32.S
+++ b/arch/arm/include/debug/efm32.S
@@ -29,7 +29,10 @@
strb \rd, [\rx, #UARTn_TXDATA]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #UARTn_STATUS]
tst \rd, #UARTn_STATUS_TXBL
beq 1001b
diff --git a/arch/arm/include/debug/icedcc.S b/arch/arm/include/debug/icedcc.S
index 74a0dd036a17..d5e65da8a687 100644
--- a/arch/arm/include/debug/icedcc.S
+++ b/arch/arm/include/debug/icedcc.S
@@ -23,7 +23,10 @@
beq 1001b
.endm
- .macro waituart, rd, rx
+ .macro waituartcts, rd, rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
@@ -47,7 +50,10 @@
beq 1001b
.endm
- .macro waituart, rd, rx
+ .macro waituartcts, rd, rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
mov \rd, #0x10000000
1001:
subs \rd, \rd, #1
@@ -72,7 +78,10 @@
.endm
- .macro waituart, rd, rx
+ .macro waituartcts, rd, rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S
index 1c1b9d1da4c8..bb7b9550580c 100644
--- a/arch/arm/include/debug/imx.S
+++ b/arch/arm/include/debug/imx.S
@@ -35,7 +35,10 @@
str \rd, [\rx, #0x40] @ TXDATA
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
.macro busyuart,rd,rx
diff --git a/arch/arm/include/debug/meson.S b/arch/arm/include/debug/meson.S
index 1e501a0054ae..7b60e4401225 100644
--- a/arch/arm/include/debug/meson.S
+++ b/arch/arm/include/debug/meson.S
@@ -25,7 +25,10 @@
beq 1002b
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
tst \rd, #MESON_AO_UART_TX_FIFO_FULL
bne 1001b
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9405b71461da..530edc74f9a3 100644
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -17,7 +17,10 @@ ARM_BE8(rev \rd, \rd )
str \rd, [\rx, #0x70]
.endm
- .macro waituart, rd, rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
@ check for TX_EMT in UARTDM_SR
ldr \rd, [\rx, #0x08]
ARM_BE8(rev \rd, \rd )
diff --git a/arch/arm/include/debug/omap2plus.S b/arch/arm/include/debug/omap2plus.S
index b5696a33ba0f..0680be6c79d3 100644
--- a/arch/arm/include/debug/omap2plus.S
+++ b/arch/arm/include/debug/omap2plus.S
@@ -75,5 +75,8 @@ omap_uart_lsr: .word 0
bne 1001b
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
diff --git a/arch/arm/include/debug/pl01x.S b/arch/arm/include/debug/pl01x.S
index a2a553afe7b8..0c7bfa4c10db 100644
--- a/arch/arm/include/debug/pl01x.S
+++ b/arch/arm/include/debug/pl01x.S
@@ -26,7 +26,10 @@
strb \rd, [\rx, #UART01x_DR]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #UART01x_FR]
ARM_BE8( rev \rd, \rd )
tst \rd, #UART01x_FR_TXFF
diff --git a/arch/arm/include/debug/renesas-scif.S b/arch/arm/include/debug/renesas-scif.S
index 25f06663a9a4..8e433e981bbe 100644
--- a/arch/arm/include/debug/renesas-scif.S
+++ b/arch/arm/include/debug/renesas-scif.S
@@ -33,7 +33,10 @@
ldr \rv, =SCIF_VIRT
.endm
- .macro waituart, rd, rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy, rd, rx
1001: ldrh \rd, [\rx, #FSR]
tst \rd, #TDFE
beq 1001b
diff --git a/arch/arm/include/debug/sa1100.S b/arch/arm/include/debug/sa1100.S
index 6109e6058e5b..7968ea52df3d 100644
--- a/arch/arm/include/debug/sa1100.S
+++ b/arch/arm/include/debug/sa1100.S
@@ -51,7 +51,10 @@
str \rd, [\rx, #UTDR]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #UTSR1]
tst \rd, #UTSR1_TNF
beq 1001b
diff --git a/arch/arm/include/debug/samsung.S b/arch/arm/include/debug/samsung.S
index 69201d7fb48f..ab474d564a90 100644
--- a/arch/arm/include/debug/samsung.S
+++ b/arch/arm/include/debug/samsung.S
@@ -69,7 +69,10 @@ ARM_BE8(rev \rd, \rd)
1002: @ exit busyuart
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
ldr \rd, [\rx, # S3C2410_UFCON]
ARM_BE8(rev \rd, \rd)
tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S
index e73e4de0a015..3612c7b9cbe7 100644
--- a/arch/arm/include/debug/sirf.S
+++ b/arch/arm/include/debug/sirf.S
@@ -29,7 +29,10 @@
.macro busyuart,rd,rx
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
tst \rd, #SIRF_LLUART_TXFIFO_EMPTY
beq 1001b
diff --git a/arch/arm/include/debug/sti.S b/arch/arm/include/debug/sti.S
index 6b42c91f217d..72d052511890 100644
--- a/arch/arm/include/debug/sti.S
+++ b/arch/arm/include/debug/sti.S
@@ -45,7 +45,10 @@
strb \rd, [\rx, #ASC_TX_BUF_OFF]
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #ASC_STA_OFF]
tst \rd, #ASC_STA_TX_FULL
bne 1001b
diff --git a/arch/arm/include/debug/stm32.S b/arch/arm/include/debug/stm32.S
index f3c4a37210ed..b6d9df30e37d 100644
--- a/arch/arm/include/debug/stm32.S
+++ b/arch/arm/include/debug/stm32.S
@@ -27,7 +27,10 @@
strb \rd, [\rx, #STM32_USART_TDR_OFF]
.endm
-.macro waituart,rd,rx
+.macro waituartcts,rd,rx
+.endm
+
+.macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
tst \rd, #STM32_USART_TXE @ TXE = 1 = tx empty
beq 1001b
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index 2148d0f88591..2bca6358cdd0 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -178,7 +178,7 @@
1002:
.endm
- .macro waituart, rd, rx
+ .macro waituartcts, rd, rx
#ifdef FLOW_CONTROL
cmp \rx, #0
beq 1002f
@@ -189,6 +189,9 @@
#endif
.endm
+ .macro waituarttxrdy,rd,rx
+ .endm
+
/*
* Storage for the state maintained by the macros above.
*
diff --git a/arch/arm/include/debug/vf.S b/arch/arm/include/debug/vf.S
index 854d9bd82770..035bcbf117ab 100644
--- a/arch/arm/include/debug/vf.S
+++ b/arch/arm/include/debug/vf.S
@@ -29,5 +29,8 @@
beq 1001b @ wait until transmit done
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
diff --git a/arch/arm/include/debug/vt8500.S b/arch/arm/include/debug/vt8500.S
index 8dc1df2d91b8..d01094fdbc8c 100644
--- a/arch/arm/include/debug/vt8500.S
+++ b/arch/arm/include/debug/vt8500.S
@@ -28,7 +28,10 @@
bne 1001b
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
#endif
diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S
index 58d77c972fd6..5d42cc35ecf3 100644
--- a/arch/arm/include/debug/zynq.S
+++ b/arch/arm/include/debug/zynq.S
@@ -33,7 +33,10 @@
strb \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
.endm
- .macro waituart,rd,rx
+ .macro waituartcts,rd,rx
+ .endm
+
+ .macro waituarttxrdy,rd,rx
1001: ldr \rd, [\rx, #UART_SR_OFFSET]
ARM_BE8( rev \rd, \rd )
tst \rd, #UART_SR_TXEMPTY
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index e112072b579d..e7c87522c176 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -89,11 +89,13 @@ ENTRY(printascii)
2: teq r1, #'\n'
bne 3f
mov r1, #'\r'
- waituart r2, r3
+ waituartcts r2, r3
+ waituarttxrdy r2, r3
senduart r1, r3
busyuart r2, r3
mov r1, #'\n'
-3: waituart r2, r3
+3: waituartcts r2, r3
+ waituarttxrdy r2, r3
senduart r1, r3
busyuart r2, r3
b 1b
--
2.26.2
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] ARM: debug: Select flow control for all debug UARTs
2020-08-21 12:39 ` Linus Walleij
@ 2020-08-21 12:39 ` Linus Walleij
-1 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2020-08-21 12:39 UTC (permalink / raw)
To: Russell King
Cc: linux-arm-kernel, Andy Gross, Bjorn Andersson, linux-arm-msm,
Linus Walleij
Instead of a flow control selection mechanism specifically for
8250, make this available for all debug UARTs. If the debug
UART supports waiting for CTS to be asserted, then this code
can be activated for terminals that need it.
We keep the defaults for EBSA110, Footbridge, Gemini and RPC
so that this still works as expected for these older platforms:
they assume that flow control shall be enabled for debug
prints.
I switch the location of the check for
ifdef CONFIG_DEBUG_UART_FLOW_CONTROL from the actual debug
UART drivers: the code would get compiled-out for 8250 and
Tegra unless their custom config (or passing -DFLOW_CONTROL
in the Tegra case) was not set. Instead this is conditional
at the three places where we print debug messages. The idea
is that debug UARTs can be implemented without this ifdef
boilerplate so they look cleaner, alas the ifdef has to be
somewhere.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Spreading out the ifdef CONFIG_DEBUG_UART_FLOW_CONTROL is a
bit of a taste choice, if preferred I can keep it in each
UART driver as well. If many UART drivers implement this
it is likely better like this IMO but I can do it either way.
---
arch/arm/Kconfig.debug | 16 +++++++++++-----
arch/arm/boot/compressed/debug.S | 2 ++
arch/arm/include/debug/8250.S | 2 --
arch/arm/include/debug/tegra.S | 2 --
arch/arm/kernel/debug.S | 7 ++++++-
5 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 80000a66a4e3..87912e5c2256 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1546,6 +1546,17 @@ config DEBUG_SIRFSOC_UART
bool
depends on ARCH_SIRF
+config DEBUG_UART_FLOW_CONTROL
+ bool "Enable flow control (CTS) for the debug UART"
+ depends on DEBUG_LL
+ default y if ARCH_EBSA110 || DEBUG_FOOTBRIDGE_COM1 || DEBUG_GEMINI || ARCH_RPC
+ help
+ Some UART ports are connected to terminals that will use modem
+ control signals to indicate whether they are ready to receive text.
+ In practice this means that the terminal is asserting the special
+ control signal CTS (Clear To Send). If your debug UART supports
+ this and your debug terminal will require it, enable this option.
+
config DEBUG_LL_INCLUDE
string
default "debug/sa1100.S" if DEBUG_SA1100
@@ -1893,11 +1904,6 @@ config DEBUG_UART_8250_PALMCHIP
except for having a different register layout. Say Y here if
the debug UART is of this type.
-config DEBUG_UART_8250_FLOW_CONTROL
- bool "Enable flow control for 8250 UART"
- depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
- default y if ARCH_EBSA110 || DEBUG_FOOTBRIDGE_COM1 || DEBUG_GEMINI || ARCH_RPC
-
config DEBUG_UNCOMPRESS
bool "Enable decompressor debugging via DEBUG_LL output"
depends on ARCH_MULTIPLATFORM || PLAT_SAMSUNG || ARM_SINGLE_ARMV7M
diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S
index 97f4e74692e8..fac40a717fcf 100644
--- a/arch/arm/boot/compressed/debug.S
+++ b/arch/arm/boot/compressed/debug.S
@@ -8,7 +8,9 @@
ENTRY(putc)
addruart r1, r2, r3
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
waituartcts r3, r1
+#endif
waituarttxrdy r3, r1
senduart r0, r1
busyuart r3, r1
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
index 769246d87fff..e3692a37cede 100644
--- a/arch/arm/include/debug/8250.S
+++ b/arch/arm/include/debug/8250.S
@@ -49,9 +49,7 @@
.endm
.macro waituartcts,rd,rx
-#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
1001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
beq 1001b
-#endif
.endm
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index 2bca6358cdd0..98daa7f48314 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -179,14 +179,12 @@
.endm
.macro waituartcts, rd, rx
-#ifdef FLOW_CONTROL
cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
beq 1001b
1002:
-#endif
.endm
.macro waituarttxrdy,rd,rx
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index e7c87522c176..d92f44bdf438 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -89,12 +89,17 @@ ENTRY(printascii)
2: teq r1, #'\n'
bne 3f
mov r1, #'\r'
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
waituartcts r2, r3
+#endif
waituarttxrdy r2, r3
senduart r1, r3
busyuart r2, r3
mov r1, #'\n'
-3: waituartcts r2, r3
+3:
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
+ waituartcts r2, r3
+#endif
waituarttxrdy r2, r3
senduart r1, r3
busyuart r2, r3
--
2.26.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] ARM: debug: Select flow control for all debug UARTs
@ 2020-08-21 12:39 ` Linus Walleij
0 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2020-08-21 12:39 UTC (permalink / raw)
To: Russell King
Cc: linux-arm-msm, Linus Walleij, Andy Gross, linux-arm-kernel,
Bjorn Andersson
Instead of a flow control selection mechanism specifically for
8250, make this available for all debug UARTs. If the debug
UART supports waiting for CTS to be asserted, then this code
can be activated for terminals that need it.
We keep the defaults for EBSA110, Footbridge, Gemini and RPC
so that this still works as expected for these older platforms:
they assume that flow control shall be enabled for debug
prints.
I switch the location of the check for
ifdef CONFIG_DEBUG_UART_FLOW_CONTROL from the actual debug
UART drivers: the code would get compiled-out for 8250 and
Tegra unless their custom config (or passing -DFLOW_CONTROL
in the Tegra case) was not set. Instead this is conditional
at the three places where we print debug messages. The idea
is that debug UARTs can be implemented without this ifdef
boilerplate so they look cleaner, alas the ifdef has to be
somewhere.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Spreading out the ifdef CONFIG_DEBUG_UART_FLOW_CONTROL is a
bit of a taste choice, if preferred I can keep it in each
UART driver as well. If many UART drivers implement this
it is likely better like this IMO but I can do it either way.
---
arch/arm/Kconfig.debug | 16 +++++++++++-----
arch/arm/boot/compressed/debug.S | 2 ++
arch/arm/include/debug/8250.S | 2 --
arch/arm/include/debug/tegra.S | 2 --
arch/arm/kernel/debug.S | 7 ++++++-
5 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 80000a66a4e3..87912e5c2256 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1546,6 +1546,17 @@ config DEBUG_SIRFSOC_UART
bool
depends on ARCH_SIRF
+config DEBUG_UART_FLOW_CONTROL
+ bool "Enable flow control (CTS) for the debug UART"
+ depends on DEBUG_LL
+ default y if ARCH_EBSA110 || DEBUG_FOOTBRIDGE_COM1 || DEBUG_GEMINI || ARCH_RPC
+ help
+ Some UART ports are connected to terminals that will use modem
+ control signals to indicate whether they are ready to receive text.
+ In practice this means that the terminal is asserting the special
+ control signal CTS (Clear To Send). If your debug UART supports
+ this and your debug terminal will require it, enable this option.
+
config DEBUG_LL_INCLUDE
string
default "debug/sa1100.S" if DEBUG_SA1100
@@ -1893,11 +1904,6 @@ config DEBUG_UART_8250_PALMCHIP
except for having a different register layout. Say Y here if
the debug UART is of this type.
-config DEBUG_UART_8250_FLOW_CONTROL
- bool "Enable flow control for 8250 UART"
- depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
- default y if ARCH_EBSA110 || DEBUG_FOOTBRIDGE_COM1 || DEBUG_GEMINI || ARCH_RPC
-
config DEBUG_UNCOMPRESS
bool "Enable decompressor debugging via DEBUG_LL output"
depends on ARCH_MULTIPLATFORM || PLAT_SAMSUNG || ARM_SINGLE_ARMV7M
diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S
index 97f4e74692e8..fac40a717fcf 100644
--- a/arch/arm/boot/compressed/debug.S
+++ b/arch/arm/boot/compressed/debug.S
@@ -8,7 +8,9 @@
ENTRY(putc)
addruart r1, r2, r3
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
waituartcts r3, r1
+#endif
waituarttxrdy r3, r1
senduart r0, r1
busyuart r3, r1
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
index 769246d87fff..e3692a37cede 100644
--- a/arch/arm/include/debug/8250.S
+++ b/arch/arm/include/debug/8250.S
@@ -49,9 +49,7 @@
.endm
.macro waituartcts,rd,rx
-#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
1001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
beq 1001b
-#endif
.endm
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index 2bca6358cdd0..98daa7f48314 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -179,14 +179,12 @@
.endm
.macro waituartcts, rd, rx
-#ifdef FLOW_CONTROL
cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
beq 1001b
1002:
-#endif
.endm
.macro waituarttxrdy,rd,rx
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index e7c87522c176..d92f44bdf438 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -89,12 +89,17 @@ ENTRY(printascii)
2: teq r1, #'\n'
bne 3f
mov r1, #'\r'
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
waituartcts r2, r3
+#endif
waituarttxrdy r2, r3
senduart r1, r3
busyuart r2, r3
mov r1, #'\n'
-3: waituartcts r2, r3
+3:
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
+ waituartcts r2, r3
+#endif
waituarttxrdy r2, r3
senduart r1, r3
busyuart r2, r3
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] ARM: uncompress: Wait for ready and busy in debug prints
2020-08-21 12:39 ` Linus Walleij
@ 2020-08-21 12:39 ` Linus Walleij
-1 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2020-08-21 12:39 UTC (permalink / raw)
To: Russell King
Cc: linux-arm-kernel, Andy Gross, Bjorn Andersson, linux-arm-msm,
Linus Walleij, Nicolas Pitre, Fabrizio Castro, Ard Biesheuvel
For some platforms such as Qualcomm we need to wait for the
UART to be ready before writing characters to the UART
in the same manner as the macro in debug.S used with the
main "Uncompressing Linux ..." text. Pass an extra temporary
variable to writeb and make it call waituarttxrdy and
busyuart just like the other decomression messages.
Optionally it will also call waituartcts if and only if
CONFIG_DEBUG_UART_FLOW_CONTROL is selected.
After this the decompression debug messages work fine on
Qualcomm platforms if you compile head.S with -DDEBUG.
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/compressed/head.S | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index ba121eea9468..5c9c6fe590cb 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -28,19 +28,19 @@
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
.macro loadsp, rb, tmp1, tmp2
.endm
- .macro writeb, ch, rb
+ .macro writeb, ch, rb, tmp
mcr p14, 0, \ch, c0, c5, 0
.endm
#elif defined(CONFIG_CPU_XSCALE)
.macro loadsp, rb, tmp1, tmp2
.endm
- .macro writeb, ch, rb
+ .macro writeb, ch, rb, tmp
mcr p14, 0, \ch, c8, c0, 0
.endm
#else
.macro loadsp, rb, tmp1, tmp2
.endm
- .macro writeb, ch, rb
+ .macro writeb, ch, rb, tmp
mcr p14, 0, \ch, c1, c0, 0
.endm
#endif
@@ -49,8 +49,13 @@
#include CONFIG_DEBUG_LL_INCLUDE
- .macro writeb, ch, rb
+ .macro writeb, ch, rb, tmp
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
+ waituartcts \tmp, \rb
+#endif
+ waituarttxrdy \tmp, \rb
senduart \ch, \rb
+ busyuart \tmp, \rb
.endm
#if defined(CONFIG_ARCH_SA1100)
@@ -1326,7 +1331,7 @@ puts: loadsp r3, r2, r1
1: ldrb r2, [r0], #1
teq r2, #0
moveq pc, lr
-2: writeb r2, r3
+2: writeb r2, r3, r1
mov r1, #0x00020000
3: subs r1, r1, #1
bne 3b
--
2.26.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] ARM: uncompress: Wait for ready and busy in debug prints
@ 2020-08-21 12:39 ` Linus Walleij
0 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2020-08-21 12:39 UTC (permalink / raw)
To: Russell King
Cc: Fabrizio Castro, Nicolas Pitre, linux-arm-msm, Linus Walleij,
Bjorn Andersson, Andy Gross, Ard Biesheuvel, linux-arm-kernel
For some platforms such as Qualcomm we need to wait for the
UART to be ready before writing characters to the UART
in the same manner as the macro in debug.S used with the
main "Uncompressing Linux ..." text. Pass an extra temporary
variable to writeb and make it call waituarttxrdy and
busyuart just like the other decomression messages.
Optionally it will also call waituartcts if and only if
CONFIG_DEBUG_UART_FLOW_CONTROL is selected.
After this the decompression debug messages work fine on
Qualcomm platforms if you compile head.S with -DDEBUG.
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/compressed/head.S | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index ba121eea9468..5c9c6fe590cb 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -28,19 +28,19 @@
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
.macro loadsp, rb, tmp1, tmp2
.endm
- .macro writeb, ch, rb
+ .macro writeb, ch, rb, tmp
mcr p14, 0, \ch, c0, c5, 0
.endm
#elif defined(CONFIG_CPU_XSCALE)
.macro loadsp, rb, tmp1, tmp2
.endm
- .macro writeb, ch, rb
+ .macro writeb, ch, rb, tmp
mcr p14, 0, \ch, c8, c0, 0
.endm
#else
.macro loadsp, rb, tmp1, tmp2
.endm
- .macro writeb, ch, rb
+ .macro writeb, ch, rb, tmp
mcr p14, 0, \ch, c1, c0, 0
.endm
#endif
@@ -49,8 +49,13 @@
#include CONFIG_DEBUG_LL_INCLUDE
- .macro writeb, ch, rb
+ .macro writeb, ch, rb, tmp
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
+ waituartcts \tmp, \rb
+#endif
+ waituarttxrdy \tmp, \rb
senduart \ch, \rb
+ busyuart \tmp, \rb
.endm
#if defined(CONFIG_ARCH_SA1100)
@@ -1326,7 +1331,7 @@ puts: loadsp r3, r2, r1
1: ldrb r2, [r0], #1
teq r2, #0
moveq pc, lr
-2: writeb r2, r3
+2: writeb r2, r3, r1
mov r1, #0x00020000
3: subs r1, r1, #1
bne 3b
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-08-21 12:41 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-08-21 12:39 [PATCH 0/3] Fix uncompress debug prints on Qualcomm Linus Walleij
2020-08-21 12:39 ` Linus Walleij
2020-08-21 12:39 ` [PATCH 1/3] ARM: debug: Split waituart to CTS and TXRDY Linus Walleij
2020-08-21 12:39 ` Linus Walleij
2020-08-21 12:39 ` [PATCH 2/3] ARM: debug: Select flow control for all debug UARTs Linus Walleij
2020-08-21 12:39 ` Linus Walleij
2020-08-21 12:39 ` [PATCH 3/3] ARM: uncompress: Wait for ready and busy in debug prints Linus Walleij
2020-08-21 12:39 ` Linus Walleij
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