[Intel-gfx] [PATCH 1/2] drm/i915: Compute has_drrs after compute has_psr

[Intel-gfx] [PATCH 1/2] drm/i915: Compute has_drrs after compute has_psr

[José Roberto de Souza]

DRRS and PSR can't be enable together, so giving preference to PSR
as it allows more power-savings by complete shutting down display,
so to guarantee this, it should compute DRRS state after compute PSR.

Cc: Srinivas K <srinivasx.k@intel.com>
Cc: Hariom Pandey <hariom.pandey@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 52 +++++++++++++++----------
 1 file changed, 31 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 79c27f91f42c..3bf50b1ae983 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
 		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
+static void
+intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
+			     struct intel_crtc_state *pipe_config,
+			     int output_bpp, bool constant_n)
+{
+	struct intel_connector *intel_connector = intel_dp->attached_connector;
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	/*
+	 * DRRS and PSR can't be enable together, so giving preference to PSR
+	 * as it allows more power-savings by complete shutting down display,
+	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
+	 * after intel_psr_compute_config().
+	 */
+	if (pipe_config->has_psr)
+		return;
+
+	if (!intel_connector->panel.downclock_mode ||
+	    dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
+		return;
+
+	pipe_config->has_drrs = true;
+	intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
+			       intel_connector->panel.downclock_mode->clock,
+			       pipe_config->port_clock, &pipe_config->dp_m2_n2,
+			       constant_n, pipe_config->fec_enable);
+}
+
 int
 intel_dp_compute_config(struct intel_encoder *encoder,
 			struct intel_crtc_state *pipe_config,
@@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (ret)
 		return ret;
 
-	pipe_config->has_drrs = false;
 	if (!intel_dp_port_has_audio(dev_priv, port))
 		pipe_config->has_audio = false;
 	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
@@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 			       &pipe_config->dp_m_n,
 			       constant_n, pipe_config->fec_enable);
 
-	if (intel_connector->panel.downclock_mode != NULL &&
-		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
-			pipe_config->has_drrs = true;
-			intel_link_compute_m_n(output_bpp,
-					       pipe_config->lane_count,
-					       intel_connector->panel.downclock_mode->clock,
-					       pipe_config->port_clock,
-					       &pipe_config->dp_m2_n2,
-					       constant_n, pipe_config->fec_enable);
-	}
-
 	if (!HAS_DDI(dev_priv))
 		intel_dp_set_clock(encoder, pipe_config);
 
 	intel_psr_compute_config(intel_dp, pipe_config);
+	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
+				     constant_n);
 	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
 	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
 
@@ -7730,16 +7748,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-	if (!crtc_state->has_drrs) {
-		drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
+	if (!crtc_state->has_drrs)
 		return;
-	}
-
-	if (dev_priv->psr.enabled) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR enabled. Not enabling DRRS.\n");
-		return;
-	}
 
 	mutex_lock(&dev_priv->drrs.mutex);
 	if (dev_priv->drrs.dp) {
-- 
2.28.0

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[Intel-gfx] [PATCH 2/2] drm/i915/drrs: Disable DRRS when needed in fastsets

[José Roberto de Souza]

Changes in the configuration could cause PSR to be compatible and
enabled so driver must also be able to disable DRRS when doing
fastsets.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/173
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
Cc: Srinivas K <srinivasx.k@intel.com>
Cc: Hariom Pandey <hariom.pandey@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  2 +-
 drivers/gpu/drm/i915/display/intel_dp.c  | 84 +++++++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_dp.h  |  2 +
 3 files changed, 71 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index de5b216561d8..ff05a852417c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4012,7 +4012,7 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
 
 	intel_psr_update(intel_dp, crtc_state, conn_state);
 	intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
-	intel_edp_drrs_enable(intel_dp, crtc_state);
+	intel_edp_drrs_update(intel_dp, crtc_state);
 
 	intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3bf50b1ae983..de2c9851395d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2576,9 +2576,9 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
 }
 
 static void
-intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
-			     struct intel_crtc_state *pipe_config,
-			     int output_bpp, bool constant_n)
+intel_dp_compute_drrs(struct intel_dp *intel_dp,
+		      struct intel_crtc_state *pipe_config,
+		      int output_bpp, bool constant_n)
 {
 	struct intel_connector *intel_connector = intel_dp->attached_connector;
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -2586,8 +2586,8 @@ intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
 	/*
 	 * DRRS and PSR can't be enable together, so giving preference to PSR
 	 * as it allows more power-savings by complete shutting down display,
-	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
-	 * after intel_psr_compute_config().
+	 * so to guarantee this, intel_dp_compute_drrs() must be called after
+	 * intel_psr_compute_config().
 	 */
 	if (pipe_config->has_psr)
 		return;
@@ -2688,8 +2688,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 		intel_dp_set_clock(encoder, pipe_config);
 
 	intel_psr_compute_config(intel_dp, pipe_config);
-	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
-				     constant_n);
+	intel_dp_compute_drrs(intel_dp, pipe_config, output_bpp, constant_n);
 	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
 	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
 
@@ -7736,6 +7735,15 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv,
 		    refresh_rate);
 }
 
+static void
+intel_edp_drrs_enable_locked(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	dev_priv->drrs.busy_frontbuffer_bits = 0;
+	dev_priv->drrs.dp = intel_dp;
+}
+
 /**
  * intel_edp_drrs_enable - init drrs struct if supported
  * @intel_dp: DP struct
@@ -7752,19 +7760,34 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
 		return;
 
 	mutex_lock(&dev_priv->drrs.mutex);
+
 	if (dev_priv->drrs.dp) {
-		drm_dbg_kms(&dev_priv->drm, "DRRS already enabled\n");
+		drm_warn(&dev_priv->drm, "DRRS already enabled\n");
 		goto unlock;
 	}
 
-	dev_priv->drrs.busy_frontbuffer_bits = 0;
-
-	dev_priv->drrs.dp = intel_dp;
+	intel_edp_drrs_enable_locked(intel_dp);
 
 unlock:
 	mutex_unlock(&dev_priv->drrs.mutex);
 }
 
+static void
+intel_edp_drrs_disable_locked(struct intel_dp *intel_dp,
+			      const struct intel_crtc_state *crtc_state)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
+		int refresh;
+
+		refresh = drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode);
+		intel_dp_set_drrs_state(dev_priv, crtc_state, refresh);
+	}
+
+	dev_priv->drrs.dp = NULL;
+}
+
 /**
  * intel_edp_drrs_disable - Disable DRRS
  * @intel_dp: DP struct
@@ -7785,16 +7808,45 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp,
 		return;
 	}
 
-	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
-		intel_dp_set_drrs_state(dev_priv, old_crtc_state,
-			drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode));
-
-	dev_priv->drrs.dp = NULL;
+	intel_edp_drrs_disable_locked(intel_dp, old_crtc_state);
 	mutex_unlock(&dev_priv->drrs.mutex);
 
 	cancel_delayed_work_sync(&dev_priv->drrs.work);
 }
 
+/**
+ * intel_edp_drrs_update - Update DRRS state
+ * @intel_dp: Intel DP
+ * @crtc_state: new CRTC state
+ *
+ * This function will update DRRS states, disabling or enabling DRRS when
+ * executing fastsets. For full modeset, intel_edp_drrs_disable() and
+ * intel_edp_drrs_enable() should be called instead.
+ */
+void
+intel_edp_drrs_update(struct intel_dp *intel_dp,
+		      const struct intel_crtc_state *crtc_state)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	if (dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
+		return;
+
+	mutex_lock(&dev_priv->drrs.mutex);
+
+	/* New state matches current one? */
+	if (crtc_state->has_drrs == !!dev_priv->drrs.dp)
+		goto unlock;
+
+	if (crtc_state->has_drrs)
+		intel_edp_drrs_enable_locked(intel_dp);
+	else
+		intel_edp_drrs_disable_locked(intel_dp, crtc_state);
+
+unlock:
+	mutex_unlock(&dev_priv->drrs.mutex);
+}
+
 static void intel_edp_drrs_downclock_work(struct work_struct *work)
 {
 	struct drm_i915_private *dev_priv =
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index b901ab850cbd..057b2c152cbd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -81,6 +81,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
 			   const struct intel_crtc_state *crtc_state);
 void intel_edp_drrs_disable(struct intel_dp *intel_dp,
 			    const struct intel_crtc_state *crtc_state);
+void intel_edp_drrs_update(struct intel_dp *intel_dp,
+			   const struct intel_crtc_state *crtc_state);
 void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
 			       unsigned int frontbuffer_bits);
 void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
-- 
2.28.0

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Compute has_drrs after compute has_psr

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 5157 bytes --]

== Series Details ==

Series: series starting with [1/2] drm/i915: Compute has_drrs after compute has_psr
URL   : https://patchwork.freedesktop.org/series/80866/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8910 -> Patchwork_18383
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/index.html

Known issues
------------

  Here are the changes found in Patchwork_18383 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-bsw-kefka:       [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-byt-j1900:       [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  
#### Possible fixes ####

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [FAIL][5] ([i915#1372]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
    - fi-skl-guc:         [DMESG-WARN][7] ([i915#2203]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2.html

  
#### Warnings ####

  * igt@i915_module_load@reload:
    - fi-kbl-x1275:       [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][10] ([i915#62] / [i915#92]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@i915_module_load@reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-kbl-x1275/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [SKIP][11] ([fdo#109271]) -> [DMESG-FAIL][12] ([i915#62])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
    - fi-skl-6700k2:      [INCOMPLETE][13] ([i915#151] / [i915#2203]) -> [DMESG-WARN][14] ([i915#2203])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-6700k2/igt@i915_pm_rpm@module-reload.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-skl-6700k2/igt@i915_pm_rpm@module-reload.html

  * igt@prime_vgem@basic-fence-flip:
    - fi-kbl-x1275:       [DMESG-WARN][15] ([i915#62] / [i915#92]) -> [DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@prime_vgem@basic-fence-flip.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-kbl-x1275/igt@prime_vgem@basic-fence-flip.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
  [i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2100]: https://gitlab.freedesktop.org/drm/intel/issues/2100
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (39 -> 34)
------------------------------

  Missing    (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper 


Build changes
-------------

  * Linux: CI_DRM_8910 -> Patchwork_18383

  CI-20190529: 20190529
  CI_DRM_8910: a300e6a7af948f4a89a1e4ca42e8d2ae0d580f4e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5769: 4e5f76be680b65780204668e302026cf638decc9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18383: 25180711e9ba9480a1e4035d71f78e1f291a5ed4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

25180711e9ba drm/i915/drrs: Disable DRRS when needed in fastsets
01366d7e280f drm/i915: Compute has_drrs after compute has_psr

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/index.html

[-- Attachment #1.2: Type: text/html, Size: 6606 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Compute has_drrs after compute has_psr

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 13407 bytes --]

== Series Details ==

Series: series starting with [1/2] drm/i915: Compute has_drrs after compute has_psr
URL   : https://patchwork.freedesktop.org/series/80866/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8910_full -> Patchwork_18383_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_18383_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_whisper@basic-forked-all:
    - shard-glk:          [PASS][1] -> [DMESG-WARN][2] ([i915#118] / [i915#95])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk7/igt@gem_exec_whisper@basic-forked-all.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-glk4/igt@gem_exec_whisper@basic-forked-all.html

  * igt@gem_mmap_gtt@fault-concurrent:
    - shard-kbl:          [PASS][3] -> [DMESG-WARN][4] ([i915#2165])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl2/igt@gem_mmap_gtt@fault-concurrent.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl2/igt@gem_mmap_gtt@fault-concurrent.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-180:
    - shard-glk:          [PASS][5] -> [DMESG-FAIL][6] ([i915#118] / [i915#95])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk4/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-glk8/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html

  * igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge:
    - shard-glk:          [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk8/igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-glk2/igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge.html

  * igt@kms_flip@flip-vs-fences@a-edp1:
    - shard-skl:          [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +12 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl8/igt@kms_flip@flip-vs-fences@a-edp1.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl8/igt@kms_flip@flip-vs-fences@a-edp1.html

  * igt@kms_flip@flip-vs-suspend@c-dp1:
    - shard-kbl:          [PASS][11] -> [DMESG-WARN][12] ([i915#180]) +6 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl2/igt@kms_flip@flip-vs-suspend@c-dp1.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl2/igt@kms_flip@flip-vs-suspend@c-dp1.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1:
    - shard-skl:          [PASS][13] -> [FAIL][14] ([i915#2122])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl4/igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl5/igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-kbl:          [PASS][15] -> [DMESG-WARN][16] ([i915#1982])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html
    - shard-iclb:         [PASS][17] -> [DMESG-WARN][18] ([i915#1982]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][19] -> [INCOMPLETE][20] ([i915#155])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-tglb:         [PASS][21] -> [DMESG-WARN][22] ([i915#1982]) +2 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([fdo#108145] / [i915#265]) +2 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][25] -> [SKIP][26] ([fdo#109441]) +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [PASS][27] -> [FAIL][28] ([i915#31])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl1/igt@kms_setmode@basic.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl1/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_gttfill@all:
    - shard-glk:          [DMESG-WARN][29] ([i915#118] / [i915#95]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk5/igt@gem_exec_gttfill@all.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-glk4/igt@gem_exec_gttfill@all.html

  * igt@gem_media_fill:
    - shard-skl:          [DMESG-WARN][31] ([i915#1982]) -> [PASS][32] +12 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl10/igt@gem_media_fill.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl10/igt@gem_media_fill.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-apl:          [DMESG-WARN][33] ([i915#1436] / [i915#1635] / [i915#716]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-apl6/igt@gen9_exec_parse@allowed-all.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-apl6/igt@gen9_exec_parse@allowed-all.html

  * igt@i915_suspend@debugfs-reader:
    - shard-iclb:         [INCOMPLETE][35] ([i915#1185]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb3/igt@i915_suspend@debugfs-reader.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-iclb7/igt@i915_suspend@debugfs-reader.html

  * igt@kms_big_fb@linear-64bpp-rotate-0:
    - shard-glk:          [DMESG-FAIL][37] ([i915#118] / [i915#95]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk8/igt@kms_big_fb@linear-64bpp-rotate-0.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-glk2/igt@kms_big_fb@linear-64bpp-rotate-0.html

  * igt@kms_cursor_edge_walk@pipe-b-256x256-bottom-edge:
    - shard-hsw:          [DMESG-WARN][39] ([i915#1982]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-hsw6/igt@kms_cursor_edge_walk@pipe-b-256x256-bottom-edge.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-hsw4/igt@kms_cursor_edge_walk@pipe-b-256x256-bottom-edge.html

  * igt@kms_flip@plain-flip-fb-recreate@b-edp1:
    - shard-skl:          [FAIL][41] ([i915#2122]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl2/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl4/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
    - shard-iclb:         [DMESG-WARN][43] ([i915#1982]) -> [PASS][44] +2 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render:
    - shard-skl:          [FAIL][45] ([i915#49]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-kbl:          [DMESG-WARN][47] ([i915#180]) -> [PASS][48] +6 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl7/igt@kms_hdr@bpc-switch-suspend.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl7/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [FAIL][49] ([fdo#108145] / [i915#265]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@perf@blocking-parameterized:
    - shard-iclb:         [FAIL][51] ([i915#1542]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb4/igt@perf@blocking-parameterized.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-iclb6/igt@perf@blocking-parameterized.html

  * igt@prime_busy@after@vecs0:
    - shard-hsw:          [FAIL][53] ([i915#2258]) -> [PASS][54] +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-hsw2/igt@prime_busy@after@vecs0.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-hsw6/igt@prime_busy@after@vecs0.html

  
#### Warnings ####

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-iclb:         [FAIL][55] ([i915#1515]) -> [WARN][56] ([i915#1515])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb6/igt@i915_pm_rc6_residency@rc6-idle.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-iclb5/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][57] ([fdo#109349]) -> [DMESG-WARN][58] ([i915#1226])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb5/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1185]: https://gitlab.freedesktop.org/drm/intel/issues/1185
  [i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1515]: https://gitlab.freedesktop.org/drm/intel/issues/1515
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2165]: https://gitlab.freedesktop.org/drm/intel/issues/2165
  [i915#2258]: https://gitlab.freedesktop.org/drm/intel/issues/2258
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_8910 -> Patchwork_18383

  CI-20190529: 20190529
  CI_DRM_8910: a300e6a7af948f4a89a1e4ca42e8d2ae0d580f4e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5769: 4e5f76be680b65780204668e302026cf638decc9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18383: 25180711e9ba9480a1e4035d71f78e1f291a5ed4 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/index.html

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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Re: [Intel-gfx] [PATCH 2/2] drm/i915/drrs: Disable DRRS when needed in fastsets

[Anshuman Gupta]

On 2020-08-20 at 22:53:53 +0530, José Roberto de Souza wrote:
> Changes in the configuration could cause PSR to be compatible and
> enabled so driver must also be able to disable DRRS when doing
> fastsets.
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/173
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
> Cc: Srinivas K <srinivasx.k@intel.com>
> Cc: Hariom Pandey <hariom.pandey@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
overall patch looks goood to me,
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c  | 84 +++++++++++++++++++-----
>  drivers/gpu/drm/i915/display/intel_dp.h  |  2 +
>  3 files changed, 71 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index de5b216561d8..ff05a852417c 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4012,7 +4012,7 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
>  
>  	intel_psr_update(intel_dp, crtc_state, conn_state);
>  	intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
> -	intel_edp_drrs_enable(intel_dp, crtc_state);
> +	intel_edp_drrs_update(intel_dp, crtc_state);
>  
>  	intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3bf50b1ae983..de2c9851395d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2576,9 +2576,9 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
>  }
>  
>  static void
> -intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> -			     struct intel_crtc_state *pipe_config,
> -			     int output_bpp, bool constant_n)
> +intel_dp_compute_drrs(struct intel_dp *intel_dp,
> +		      struct intel_crtc_state *pipe_config,
> +		      int output_bpp, bool constant_n)
intel_dp_drrs_compute_config looks a better name which u have introduced in patch 1 of this series.
any reason to change the function name in second patch ?
>  {
>  	struct intel_connector *intel_connector = intel_dp->attached_connector;
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> @@ -2586,8 +2586,8 @@ intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
>  	/*
>  	 * DRRS and PSR can't be enable together, so giving preference to PSR
>  	 * as it allows more power-savings by complete shutting down display,
> -	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
> -	 * after intel_psr_compute_config().
> +	 * so to guarantee this, intel_dp_compute_drrs() must be called after
> +	 * intel_psr_compute_config().
>  	 */
>  	if (pipe_config->has_psr)
>  		return;
> @@ -2688,8 +2688,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  		intel_dp_set_clock(encoder, pipe_config);
>  
>  	intel_psr_compute_config(intel_dp, pipe_config);
> -	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> -				     constant_n);
> +	intel_dp_compute_drrs(intel_dp, pipe_config, output_bpp, constant_n);
>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
>  
> @@ -7736,6 +7735,15 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv,
>  		    refresh_rate);
>  }
>  
> +static void
> +intel_edp_drrs_enable_locked(struct intel_dp *intel_dp)
> +{
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	dev_priv->drrs.busy_frontbuffer_bits = 0;
> +	dev_priv->drrs.dp = intel_dp;
> +}
> +
>  /**
>   * intel_edp_drrs_enable - init drrs struct if supported
>   * @intel_dp: DP struct
> @@ -7752,19 +7760,34 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
>  		return;
>  
>  	mutex_lock(&dev_priv->drrs.mutex);
> +
>  	if (dev_priv->drrs.dp) {
> -		drm_dbg_kms(&dev_priv->drm, "DRRS already enabled\n");
> +		drm_warn(&dev_priv->drm, "DRRS already enabled\n");
>  		goto unlock;
>  	}
>  
> -	dev_priv->drrs.busy_frontbuffer_bits = 0;
> -
> -	dev_priv->drrs.dp = intel_dp;
> +	intel_edp_drrs_enable_locked(intel_dp);
>  
>  unlock:
>  	mutex_unlock(&dev_priv->drrs.mutex);
>  }
>  
> +static void
> +intel_edp_drrs_disable_locked(struct intel_dp *intel_dp,
> +			      const struct intel_crtc_state *crtc_state)
> +{
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
> +		int refresh;
> +
> +		refresh = drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode);
> +		intel_dp_set_drrs_state(dev_priv, crtc_state, refresh);
> +	}
> +
> +	dev_priv->drrs.dp = NULL;
> +}
> +
>  /**
>   * intel_edp_drrs_disable - Disable DRRS
>   * @intel_dp: DP struct
> @@ -7785,16 +7808,45 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp,
>  		return;
>  	}
>  
> -	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
> -		intel_dp_set_drrs_state(dev_priv, old_crtc_state,
> -			drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode));
> -
> -	dev_priv->drrs.dp = NULL;
> +	intel_edp_drrs_disable_locked(intel_dp, old_crtc_state);
>  	mutex_unlock(&dev_priv->drrs.mutex);
>  
>  	cancel_delayed_work_sync(&dev_priv->drrs.work);
>  }
>  
> +/**
> + * intel_edp_drrs_update - Update DRRS state
> + * @intel_dp: Intel DP
> + * @crtc_state: new CRTC state
> + *
> + * This function will update DRRS states, disabling or enabling DRRS when
> + * executing fastsets. For full modeset, intel_edp_drrs_disable() and
> + * intel_edp_drrs_enable() should be called instead.
> + */
> +void
> +intel_edp_drrs_update(struct intel_dp *intel_dp,
> +		      const struct intel_crtc_state *crtc_state)
> +{
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	if (dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> +		return;
> +
> +	mutex_lock(&dev_priv->drrs.mutex);
> +
> +	/* New state matches current one? */
> +	if (crtc_state->has_drrs == !!dev_priv->drrs.dp)
> +		goto unlock;
> +
> +	if (crtc_state->has_drrs)
> +		intel_edp_drrs_enable_locked(intel_dp);
> +	else
> +		intel_edp_drrs_disable_locked(intel_dp, crtc_state);
> +
> +unlock:
> +	mutex_unlock(&dev_priv->drrs.mutex);
> +}
> +
>  static void intel_edp_drrs_downclock_work(struct work_struct *work)
>  {
>  	struct drm_i915_private *dev_priv =
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index b901ab850cbd..057b2c152cbd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -81,6 +81,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
>  			   const struct intel_crtc_state *crtc_state);
>  void intel_edp_drrs_disable(struct intel_dp *intel_dp,
>  			    const struct intel_crtc_state *crtc_state);
> +void intel_edp_drrs_update(struct intel_dp *intel_dp,
> +			   const struct intel_crtc_state *crtc_state);
>  void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
>  			       unsigned int frontbuffer_bits);
>  void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
> -- 
> 2.28.0
> 
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: Compute has_drrs after compute has_psr

[Anshuman Gupta]

On 2020-08-20 at 10:23:52 -0700, José Roberto de Souza wrote:
> DRRS and PSR can't be enable together, so giving preference to PSR
> as it allows more power-savings by complete shutting down display,
> so to guarantee this, it should compute DRRS state after compute PSR.
> 
> Cc: Srinivas K <srinivasx.k@intel.com>
> Cc: Hariom Pandey <hariom.pandey@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 52 +++++++++++++++----------
>  1 file changed, 31 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 79c27f91f42c..3bf50b1ae983 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
>  		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
>  }
>  
> +static void
> +intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> +			     struct intel_crtc_state *pipe_config,
> +			     int output_bpp, bool constant_n)
> +{
> +	struct intel_connector *intel_connector = intel_dp->attached_connector;
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	/*
> +	 * DRRS and PSR can't be enable together, so giving preference to PSR
> +	 * as it allows more power-savings by complete shutting down display,
> +	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
> +	 * after intel_psr_compute_config().
> +	 */
> +	if (pipe_config->has_psr)
> +		return;
In cases when psr is supported but is not enabled due to any psr error, drrs can be useful.
AFAIU has_psr is false in cases psr is disabled due any PSR error, this should be fine for such case
> +
> +	if (!intel_connector->panel.downclock_mode ||
> +	    dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> +		return;
> +
> +	pipe_config->has_drrs = true;
> +	intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
> +			       intel_connector->panel.downclock_mode->clock,
> +			       pipe_config->port_clock, &pipe_config->dp_m2_n2,
> +			       constant_n, pipe_config->fec_enable);
> +}
> +
>  int
>  intel_dp_compute_config(struct intel_encoder *encoder,
>  			struct intel_crtc_state *pipe_config,
> @@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	if (ret)
>  		return ret;
>  
> -	pipe_config->has_drrs = false;
May be u can retain it for better readability.
>  	if (!intel_dp_port_has_audio(dev_priv, port))
>  		pipe_config->has_audio = false;
>  	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> @@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  			       &pipe_config->dp_m_n,
>  			       constant_n, pipe_config->fec_enable);
>  
> -	if (intel_connector->panel.downclock_mode != NULL &&
> -		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
> -			pipe_config->has_drrs = true;
> -			intel_link_compute_m_n(output_bpp,
> -					       pipe_config->lane_count,
> -					       intel_connector->panel.downclock_mode->clock,
> -					       pipe_config->port_clock,
> -					       &pipe_config->dp_m2_n2,
> -					       constant_n, pipe_config->fec_enable);
> -	}
> -
>  	if (!HAS_DDI(dev_priv))
>  		intel_dp_set_clock(encoder, pipe_config);
>  
>  	intel_psr_compute_config(intel_dp, pipe_config);
> +	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> +				     constant_n);
>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
>  
> @@ -7730,16 +7748,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  
> -	if (!crtc_state->has_drrs) {
> -		drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
IMHO this print is useful.
with all of above,
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com> 
> +	if (!crtc_state->has_drrs)
>  		return;
> -	}
> -
> -	if (dev_priv->psr.enabled) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "PSR enabled. Not enabling DRRS.\n");
> -		return;
> -	}
>  
>  	mutex_lock(&dev_priv->drrs.mutex);
>  	if (dev_priv->drrs.dp) {
> -- 
> 2.28.0
> 
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: Compute has_drrs after compute has_psr

[Souza, Jose]

On Mon, 2020-08-24 at 16:24 +0530, Anshuman Gupta wrote:
> On 2020-08-20 at 10:23:52 -0700, José Roberto de Souza wrote:
> > DRRS and PSR can't be enable together, so giving preference to PSR
> > as it allows more power-savings by complete shutting down display,
> > so to guarantee this, it should compute DRRS state after compute PSR.
> > 
> > Cc: Srinivas K <
> > srinivasx.k@intel.com
> > >
> > Cc: Hariom Pandey <
> > hariom.pandey@intel.com
> > >
> > Signed-off-by: José Roberto de Souza <
> > jose.souza@intel.com
> > >
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c | 52 +++++++++++++++----------
> >  1 file changed, 31 insertions(+), 21 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 79c27f91f42c..3bf50b1ae983 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
> >  		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
> >  }
> >  
> > +static void
> > +intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> > +			     struct intel_crtc_state *pipe_config,
> > +			     int output_bpp, bool constant_n)
> > +{
> > +	struct intel_connector *intel_connector = intel_dp->attached_connector;
> > +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +
> > +	/*
> > +	 * DRRS and PSR can't be enable together, so giving preference to PSR
> > +	 * as it allows more power-savings by complete shutting down display,
> > +	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
> > +	 * after intel_psr_compute_config().
> > +	 */
> > +	if (pipe_config->has_psr)
> > +		return;
> 
> In cases when psr is supported but is not enabled due to any psr error, drrs can be useful.
> AFAIU has_psr is false in cases psr is disabled due any PSR error, this should be fine for such case

sink_not_reliable is checked in intel_psr_compute_config() so after a PSR error in the next time fastset(in the next patch) DRRS will be enabled.

> > +
> > +	if (!intel_connector->panel.downclock_mode ||
> > +	    dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> > +		return;
> > +
> > +	pipe_config->has_drrs = true;
> > +	intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
> > +			       intel_connector->panel.downclock_mode->clock,
> > +			       pipe_config->port_clock, &pipe_config->dp_m2_n2,
> > +			       constant_n, pipe_config->fec_enable);
> > +}
> > +
> >  int
> >  intel_dp_compute_config(struct intel_encoder *encoder,
> >  			struct intel_crtc_state *pipe_config,
> > @@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >  	if (ret)
> >  		return ret;
> >  
> > -	pipe_config->has_drrs = false;
> 
> May be u can retain it for better readability.

The whole struct is zeroed, other features are not set false if not supported.

> >  	if (!intel_dp_port_has_audio(dev_priv, port))
> >  		pipe_config->has_audio = false;
> >  	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> > @@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >  			       &pipe_config->dp_m_n,
> >  			       constant_n, pipe_config->fec_enable);
> >  
> > -	if (intel_connector->panel.downclock_mode != NULL &&
> > -		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
> > -			pipe_config->has_drrs = true;
> > -			intel_link_compute_m_n(output_bpp,
> > -					       pipe_config->lane_count,
> > -					       intel_connector->panel.downclock_mode->clock,
> > -					       pipe_config->port_clock,
> > -					       &pipe_config->dp_m2_n2,
> > -					       constant_n, pipe_config->fec_enable);
> > -	}
> > -
> >  	if (!HAS_DDI(dev_priv))
> >  		intel_dp_set_clock(encoder, pipe_config);
> >  
> >  	intel_psr_compute_config(intel_dp, pipe_config);
> > +	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> > +				     constant_n);
> >  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> >  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
> >  
> > @@ -7730,16 +7748,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >  
> > -	if (!crtc_state->has_drrs) {
> > -		drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
> 
> IMHO this print is useful.

Okay but will change the message to DRRS enabled, we already know that the panel support DRRS in intel_dp_drrs_init().

> with all of above,
> Reviewed-by: Anshuman Gupta <
> anshuman.gupta@intel.com
> > 
> > +	if (!crtc_state->has_drrs)
> >  		return;
> > -	}
> > -
> > -	if (dev_priv->psr.enabled) {
> > -		drm_dbg_kms(&dev_priv->drm,
> > -			    "PSR enabled. Not enabling DRRS.\n");
> > -		return;
> > -	}
> >  
> >  	mutex_lock(&dev_priv->drrs.mutex);
> >  	if (dev_priv->drrs.dp) {
> > -- 
> > 2.28.0
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > 
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > 
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Re: [Intel-gfx] [PATCH 2/2] drm/i915/drrs: Disable DRRS when needed in fastsets

[Souza, Jose]

On Mon, 2020-08-24 at 14:21 +0530, Anshuman Gupta wrote:
> On 2020-08-20 at 22:53:53 +0530, José Roberto de Souza wrote:
> > Changes in the configuration could cause PSR to be compatible and
> > enabled so driver must also be able to disable DRRS when doing
> > fastsets.
> > 
> > Closes: 
> > https://gitlab.freedesktop.org/drm/intel/-/issues/209
> > 
> > Closes: 
> > https://gitlab.freedesktop.org/drm/intel/-/issues/173
> > 
> > Closes: 
> > https://gitlab.freedesktop.org/drm/intel/-/issues/209
> > 
> > Cc: Srinivas K <
> > srinivasx.k@intel.com
> > >
> > Cc: Hariom Pandey <
> > hariom.pandey@intel.com
> > >
> > Signed-off-by: José Roberto de Souza <
> > jose.souza@intel.com
> > >
> 
> overall patch looks goood to me,
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c |  2 +-
> >  drivers/gpu/drm/i915/display/intel_dp.c  | 84 +++++++++++++++++++-----
> >  drivers/gpu/drm/i915/display/intel_dp.h  |  2 +
> >  3 files changed, 71 insertions(+), 17 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index de5b216561d8..ff05a852417c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -4012,7 +4012,7 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
> >  
> >  	intel_psr_update(intel_dp, crtc_state, conn_state);
> >  	intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
> > -	intel_edp_drrs_enable(intel_dp, crtc_state);
> > +	intel_edp_drrs_update(intel_dp, crtc_state);
> >  
> >  	intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
> >  }
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 3bf50b1ae983..de2c9851395d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2576,9 +2576,9 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
> >  }
> >  
> >  static void
> > -intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> > -			     struct intel_crtc_state *pipe_config,
> > -			     int output_bpp, bool constant_n)
> > +intel_dp_compute_drrs(struct intel_dp *intel_dp,
> > +		      struct intel_crtc_state *pipe_config,
> > +		      int output_bpp, bool constant_n)
> 
> intel_dp_drrs_compute_config looks a better name which u have introduced in patch 1 of this series.
> any reason to change the function name in second patch ?

Thanks for catching this, changing back to the name in patch 1.

> >  {
> >  	struct intel_connector *intel_connector = intel_dp->attached_connector;
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > @@ -2586,8 +2586,8 @@ intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> >  	/*
> >  	 * DRRS and PSR can't be enable together, so giving preference to PSR
> >  	 * as it allows more power-savings by complete shutting down display,
> > -	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
> > -	 * after intel_psr_compute_config().
> > +	 * so to guarantee this, intel_dp_compute_drrs() must be called after
> > +	 * intel_psr_compute_config().
> >  	 */
> >  	if (pipe_config->has_psr)
> >  		return;
> > @@ -2688,8 +2688,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >  		intel_dp_set_clock(encoder, pipe_config);
> >  
> >  	intel_psr_compute_config(intel_dp, pipe_config);
> > -	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> > -				     constant_n);
> > +	intel_dp_compute_drrs(intel_dp, pipe_config, output_bpp, constant_n);
> >  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> >  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
> >  
> > @@ -7736,6 +7735,15 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv,
> >  		    refresh_rate);
> >  }
> >  
> > +static void
> > +intel_edp_drrs_enable_locked(struct intel_dp *intel_dp)
> > +{
> > +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +
> > +	dev_priv->drrs.busy_frontbuffer_bits = 0;
> > +	dev_priv->drrs.dp = intel_dp;
> > +}
> > +
> >  /**
> >   * intel_edp_drrs_enable - init drrs struct if supported
> >   * @intel_dp: DP struct
> > @@ -7752,19 +7760,34 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
> >  		return;
> >  
> >  	mutex_lock(&dev_priv->drrs.mutex);
> > +
> >  	if (dev_priv->drrs.dp) {
> > -		drm_dbg_kms(&dev_priv->drm, "DRRS already enabled\n");
> > +		drm_warn(&dev_priv->drm, "DRRS already enabled\n");
> >  		goto unlock;
> >  	}
> >  
> > -	dev_priv->drrs.busy_frontbuffer_bits = 0;
> > -
> > -	dev_priv->drrs.dp = intel_dp;
> > +	intel_edp_drrs_enable_locked(intel_dp);
> >  
> >  unlock:
> >  	mutex_unlock(&dev_priv->drrs.mutex);
> >  }
> >  
> > +static void
> > +intel_edp_drrs_disable_locked(struct intel_dp *intel_dp,
> > +			      const struct intel_crtc_state *crtc_state)
> > +{
> > +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +
> > +	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
> > +		int refresh;
> > +
> > +		refresh = drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode);
> > +		intel_dp_set_drrs_state(dev_priv, crtc_state, refresh);
> > +	}
> > +
> > +	dev_priv->drrs.dp = NULL;
> > +}
> > +
> >  /**
> >   * intel_edp_drrs_disable - Disable DRRS
> >   * @intel_dp: DP struct
> > @@ -7785,16 +7808,45 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp,
> >  		return;
> >  	}
> >  
> > -	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
> > -		intel_dp_set_drrs_state(dev_priv, old_crtc_state,
> > -			drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode));
> > -
> > -	dev_priv->drrs.dp = NULL;
> > +	intel_edp_drrs_disable_locked(intel_dp, old_crtc_state);
> >  	mutex_unlock(&dev_priv->drrs.mutex);
> >  
> >  	cancel_delayed_work_sync(&dev_priv->drrs.work);
> >  }
> >  
> > +/**
> > + * intel_edp_drrs_update - Update DRRS state
> > + * @intel_dp: Intel DP
> > + * @crtc_state: new CRTC state
> > + *
> > + * This function will update DRRS states, disabling or enabling DRRS when
> > + * executing fastsets. For full modeset, intel_edp_drrs_disable() and
> > + * intel_edp_drrs_enable() should be called instead.
> > + */
> > +void
> > +intel_edp_drrs_update(struct intel_dp *intel_dp,
> > +		      const struct intel_crtc_state *crtc_state)
> > +{
> > +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +
> > +	if (dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> > +		return;
> > +
> > +	mutex_lock(&dev_priv->drrs.mutex);
> > +
> > +	/* New state matches current one? */
> > +	if (crtc_state->has_drrs == !!dev_priv->drrs.dp)
> > +		goto unlock;
> > +
> > +	if (crtc_state->has_drrs)
> > +		intel_edp_drrs_enable_locked(intel_dp);
> > +	else
> > +		intel_edp_drrs_disable_locked(intel_dp, crtc_state);
> > +
> > +unlock:
> > +	mutex_unlock(&dev_priv->drrs.mutex);
> > +}
> > +
> >  static void intel_edp_drrs_downclock_work(struct work_struct *work)
> >  {
> >  	struct drm_i915_private *dev_priv =
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> > index b901ab850cbd..057b2c152cbd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -81,6 +81,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
> >  			   const struct intel_crtc_state *crtc_state);
> >  void intel_edp_drrs_disable(struct intel_dp *intel_dp,
> >  			    const struct intel_crtc_state *crtc_state);
> > +void intel_edp_drrs_update(struct intel_dp *intel_dp,
> > +			   const struct intel_crtc_state *crtc_state);
> >  void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
> >  			       unsigned int frontbuffer_bits);
> >  void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
> > -- 
> > 2.28.0
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > 
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > 
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