* [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-08-20 21:44 ` David Bauer
0 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-08-20 21:44 UTC (permalink / raw)
To: robh+dt, heiko, andy.yan, jagan, jbx6244, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
Changes in v2:
- Change model name to FriendlyElec
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index db2e35796795..61722b9ffa9a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -104,6 +104,11 @@ properties:
- firefly,roc-rk3399-pc-mezzanine
- const: rockchip,rk3399
+ - description: FriendlyElec NanoPi R2S
+ items:
+ - const: friendlyarm,nanopi-r2s
+ - const: rockchip,rk3328
+
- description: FriendlyElec NanoPi4 series boards
items:
- enum:
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-08-20 21:44 ` David Bauer
0 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-08-20 21:44 UTC (permalink / raw)
To: robh+dt, heiko, andy.yan, jagan, jbx6244, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
Changes in v2:
- Change model name to FriendlyElec
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index db2e35796795..61722b9ffa9a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -104,6 +104,11 @@ properties:
- firefly,roc-rk3399-pc-mezzanine
- const: rockchip,rk3399
+ - description: FriendlyElec NanoPi R2S
+ items:
+ - const: friendlyarm,nanopi-r2s
+ - const: rockchip,rk3328
+
- description: FriendlyElec NanoPi4 series boards
items:
- enum:
--
2.28.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-08-20 21:44 ` David Bauer
0 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-08-20 21:44 UTC (permalink / raw)
To: robh+dt, heiko, andy.yan, jagan, jbx6244, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
Changes in v2:
- Change model name to FriendlyElec
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index db2e35796795..61722b9ffa9a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -104,6 +104,11 @@ properties:
- firefly,roc-rk3399-pc-mezzanine
- const: rockchip,rk3399
+ - description: FriendlyElec NanoPi R2S
+ items:
+ - const: friendlyarm,nanopi-r2s
+ - const: rockchip,rk3328
+
- description: FriendlyElec NanoPi4 series boards
items:
- enum:
--
2.28.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 2/2] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
2020-08-20 21:44 ` David Bauer
(?)
@ 2020-08-20 21:44 ` David Bauer
-1 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-08-20 21:44 UTC (permalink / raw)
To: robh+dt, heiko, andy.yan, jagan, jbx6244, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
This adds support for the NanoPi R2S from FriendlyARM.
Rockchip RK3328 SoC
1GB DDR4 RAM
Gigabit Ethernet (WAN)
Gigabit Ethernet (USB3) (LAN)
USB 2.0 Host Port
MicroSD slot
Reset button
WAN - LAN - SYS LED
Signed-off-by: David Bauer <mail@david-bauer.net>
---
Changes in v2:
- Change model name to FriendlyElec
- Enable SD UHS modes
- Add startup delay to SDIO regulator to improve
issues reported with some cards
- Fix PMIC interrupt pin
- Add pinctrl node for ethernet-PHY
- Fix various formatting issues
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 367 ++++++++++++++++++
2 files changed, 368 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b87b1f773083..20055c51e150 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
new file mode 100644
index 000000000000..51c100ea9211
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -0,0 +1,367 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "rk3328.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R2S";
+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ gmac_clkin: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&reset_button_pin>;
+ pinctrl-names = "default";
+
+ reset {
+ label = "Reset Button";
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <50>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&wan_led_pin &sys_led_pin &wan_led_pin>;
+ pinctrl-names = "default";
+
+ lan_led: led-0 {
+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:green:lan";
+ };
+
+ sys_led: led-1 {
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:red:sys";
+ };
+
+ wan_led: led-2 {
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:green:wan";
+ };
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_sd";
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_io_33>;
+ };
+
+ vcc_io_sdio: sdmmcio-regulator {
+ compatible = "regulator-gpio";
+ enable-active-high;
+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&sdio_vcc_pin>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_io_sdio";
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-settling-time-us = <5000>;
+ regulator-type = "voltage";
+ startup-delay-us = <2000>;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ vin-supply = <&vcc_io_33>;
+ };
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&gmac2io {
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
+ clock_in_out = "input";
+ phy-handle = <&rtl8211e>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc_io_33>;
+ pinctrl-0 = <&rgmiim1_pins>;
+ pinctrl-names = "default";
+ rx_delay = <0x18>;
+ snps,aal;
+ tx_delay = <0x24>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8211e: ethernet-phy@0 {
+ pinctrl-0 = <ð_phy_reset_pin>;
+ pinctrl-names = "default";
+ reg = <1>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ rk805: pmic@18 {
+ compatible = "rockchip,rk805";
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk805-clkout2";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&pmic_int_l>;
+ pinctrl-names = "default";
+ reg = <0x18>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vdd_5v>;
+ vcc2-supply = <&vdd_5v>;
+ vcc3-supply = <&vdd_5v>;
+ vcc4-supply = <&vdd_5v>;
+ vcc5-supply = <&vcc_io_33>;
+ vcc6-supply = <&vdd_5v>;
+
+ regulators {
+ vdd_log: DCDC_REG1 {
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io_33: DCDC_REG4 {
+ regulator-name = "vcc_io_33";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_18: LDO_REG1 {
+ regulator-name = "vcc_18";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc18_emmc: LDO_REG2 {
+ regulator-name = "vcc18_emmc";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_10: LDO_REG3 {
+ regulator-name = "vdd_10";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+ };
+ };
+};
+
+&io_domains {
+ pmuio-supply = <&vcc_io_33>;
+ vccio1-supply = <&vcc_io_33>;
+ vccio2-supply = <&vcc18_emmc>;
+ vccio3-supply = <&vcc_io_sdio>;
+ vccio4-supply = <&vcc_18>;
+ vccio5-supply = <&vcc_io_33>;
+ vccio6-supply = <&vcc_io_33>;
+ status = "okay";
+};
+
+&pinctrl {
+ button {
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ethernet-phy {
+ eth_phy_reset_pin: reset-pin {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ leds {
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sd {
+ sdio_vcc_pin: sdio-vcc-pin {
+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ disable-wp;
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ pinctrl-names = "default";
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vcc_io_sdio>;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+};
+
+&u2phy_host {
+ status = "okay";
+};
+
+&u2phy_otg {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
--
2.28.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 2/2] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
@ 2020-08-20 21:44 ` David Bauer
0 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-08-20 21:44 UTC (permalink / raw)
To: robh+dt, heiko, andy.yan, jagan, jbx6244, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
This adds support for the NanoPi R2S from FriendlyARM.
Rockchip RK3328 SoC
1GB DDR4 RAM
Gigabit Ethernet (WAN)
Gigabit Ethernet (USB3) (LAN)
USB 2.0 Host Port
MicroSD slot
Reset button
WAN - LAN - SYS LED
Signed-off-by: David Bauer <mail@david-bauer.net>
---
Changes in v2:
- Change model name to FriendlyElec
- Enable SD UHS modes
- Add startup delay to SDIO regulator to improve
issues reported with some cards
- Fix PMIC interrupt pin
- Add pinctrl node for ethernet-PHY
- Fix various formatting issues
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 367 ++++++++++++++++++
2 files changed, 368 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b87b1f773083..20055c51e150 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
new file mode 100644
index 000000000000..51c100ea9211
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -0,0 +1,367 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "rk3328.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R2S";
+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ gmac_clkin: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&reset_button_pin>;
+ pinctrl-names = "default";
+
+ reset {
+ label = "Reset Button";
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <50>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&wan_led_pin &sys_led_pin &wan_led_pin>;
+ pinctrl-names = "default";
+
+ lan_led: led-0 {
+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:green:lan";
+ };
+
+ sys_led: led-1 {
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:red:sys";
+ };
+
+ wan_led: led-2 {
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:green:wan";
+ };
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_sd";
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_io_33>;
+ };
+
+ vcc_io_sdio: sdmmcio-regulator {
+ compatible = "regulator-gpio";
+ enable-active-high;
+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&sdio_vcc_pin>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_io_sdio";
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-settling-time-us = <5000>;
+ regulator-type = "voltage";
+ startup-delay-us = <2000>;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ vin-supply = <&vcc_io_33>;
+ };
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&gmac2io {
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
+ clock_in_out = "input";
+ phy-handle = <&rtl8211e>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc_io_33>;
+ pinctrl-0 = <&rgmiim1_pins>;
+ pinctrl-names = "default";
+ rx_delay = <0x18>;
+ snps,aal;
+ tx_delay = <0x24>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8211e: ethernet-phy@0 {
+ pinctrl-0 = <ð_phy_reset_pin>;
+ pinctrl-names = "default";
+ reg = <1>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ rk805: pmic@18 {
+ compatible = "rockchip,rk805";
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk805-clkout2";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&pmic_int_l>;
+ pinctrl-names = "default";
+ reg = <0x18>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vdd_5v>;
+ vcc2-supply = <&vdd_5v>;
+ vcc3-supply = <&vdd_5v>;
+ vcc4-supply = <&vdd_5v>;
+ vcc5-supply = <&vcc_io_33>;
+ vcc6-supply = <&vdd_5v>;
+
+ regulators {
+ vdd_log: DCDC_REG1 {
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io_33: DCDC_REG4 {
+ regulator-name = "vcc_io_33";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_18: LDO_REG1 {
+ regulator-name = "vcc_18";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc18_emmc: LDO_REG2 {
+ regulator-name = "vcc18_emmc";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_10: LDO_REG3 {
+ regulator-name = "vdd_10";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+ };
+ };
+};
+
+&io_domains {
+ pmuio-supply = <&vcc_io_33>;
+ vccio1-supply = <&vcc_io_33>;
+ vccio2-supply = <&vcc18_emmc>;
+ vccio3-supply = <&vcc_io_sdio>;
+ vccio4-supply = <&vcc_18>;
+ vccio5-supply = <&vcc_io_33>;
+ vccio6-supply = <&vcc_io_33>;
+ status = "okay";
+};
+
+&pinctrl {
+ button {
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ethernet-phy {
+ eth_phy_reset_pin: reset-pin {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ leds {
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sd {
+ sdio_vcc_pin: sdio-vcc-pin {
+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ disable-wp;
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ pinctrl-names = "default";
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vcc_io_sdio>;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+};
+
+&u2phy_host {
+ status = "okay";
+};
+
+&u2phy_otg {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
--
2.28.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 2/2] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
@ 2020-08-20 21:44 ` David Bauer
0 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-08-20 21:44 UTC (permalink / raw)
To: robh+dt, heiko, andy.yan, jagan, jbx6244, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
This adds support for the NanoPi R2S from FriendlyARM.
Rockchip RK3328 SoC
1GB DDR4 RAM
Gigabit Ethernet (WAN)
Gigabit Ethernet (USB3) (LAN)
USB 2.0 Host Port
MicroSD slot
Reset button
WAN - LAN - SYS LED
Signed-off-by: David Bauer <mail@david-bauer.net>
---
Changes in v2:
- Change model name to FriendlyElec
- Enable SD UHS modes
- Add startup delay to SDIO regulator to improve
issues reported with some cards
- Fix PMIC interrupt pin
- Add pinctrl node for ethernet-PHY
- Fix various formatting issues
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 367 ++++++++++++++++++
2 files changed, 368 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b87b1f773083..20055c51e150 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
new file mode 100644
index 000000000000..51c100ea9211
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -0,0 +1,367 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "rk3328.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R2S";
+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ gmac_clkin: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&reset_button_pin>;
+ pinctrl-names = "default";
+
+ reset {
+ label = "Reset Button";
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <50>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&wan_led_pin &sys_led_pin &wan_led_pin>;
+ pinctrl-names = "default";
+
+ lan_led: led-0 {
+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:green:lan";
+ };
+
+ sys_led: led-1 {
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:red:sys";
+ };
+
+ wan_led: led-2 {
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r2s:green:wan";
+ };
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_sd";
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_io_33>;
+ };
+
+ vcc_io_sdio: sdmmcio-regulator {
+ compatible = "regulator-gpio";
+ enable-active-high;
+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&sdio_vcc_pin>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_io_sdio";
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-settling-time-us = <5000>;
+ regulator-type = "voltage";
+ startup-delay-us = <2000>;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ vin-supply = <&vcc_io_33>;
+ };
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&gmac2io {
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
+ clock_in_out = "input";
+ phy-handle = <&rtl8211e>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc_io_33>;
+ pinctrl-0 = <&rgmiim1_pins>;
+ pinctrl-names = "default";
+ rx_delay = <0x18>;
+ snps,aal;
+ tx_delay = <0x24>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8211e: ethernet-phy@0 {
+ pinctrl-0 = <ð_phy_reset_pin>;
+ pinctrl-names = "default";
+ reg = <1>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ rk805: pmic@18 {
+ compatible = "rockchip,rk805";
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk805-clkout2";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&pmic_int_l>;
+ pinctrl-names = "default";
+ reg = <0x18>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vdd_5v>;
+ vcc2-supply = <&vdd_5v>;
+ vcc3-supply = <&vdd_5v>;
+ vcc4-supply = <&vdd_5v>;
+ vcc5-supply = <&vcc_io_33>;
+ vcc6-supply = <&vdd_5v>;
+
+ regulators {
+ vdd_log: DCDC_REG1 {
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io_33: DCDC_REG4 {
+ regulator-name = "vcc_io_33";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_18: LDO_REG1 {
+ regulator-name = "vcc_18";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc18_emmc: LDO_REG2 {
+ regulator-name = "vcc18_emmc";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_10: LDO_REG3 {
+ regulator-name = "vdd_10";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+ };
+ };
+};
+
+&io_domains {
+ pmuio-supply = <&vcc_io_33>;
+ vccio1-supply = <&vcc_io_33>;
+ vccio2-supply = <&vcc18_emmc>;
+ vccio3-supply = <&vcc_io_sdio>;
+ vccio4-supply = <&vcc_18>;
+ vccio5-supply = <&vcc_io_33>;
+ vccio6-supply = <&vcc_io_33>;
+ status = "okay";
+};
+
+&pinctrl {
+ button {
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ethernet-phy {
+ eth_phy_reset_pin: reset-pin {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ leds {
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sd {
+ sdio_vcc_pin: sdio-vcc-pin {
+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ disable-wp;
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ pinctrl-names = "default";
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vcc_io_sdio>;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+};
+
+&u2phy_host {
+ status = "okay";
+};
+
+&u2phy_otg {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
--
2.28.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/2] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
2020-08-20 21:44 ` David Bauer
(?)
@ 2020-08-21 9:42 ` Johan Jonker
-1 siblings, 0 replies; 21+ messages in thread
From: Johan Jonker @ 2020-08-21 9:42 UTC (permalink / raw)
To: David Bauer, robh+dt, heiko, andy.yan, jagan, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
Hi David,
Increase version number for each new serie.
On 8/20/20 11:44 PM, David Bauer wrote:
> This adds support for the NanoPi R2S from FriendlyARM.
>
> Rockchip RK3328 SoC
> 1GB DDR4 RAM
> Gigabit Ethernet (WAN)
> Gigabit Ethernet (USB3) (LAN)
> USB 2.0 Host Port
> MicroSD slot
> Reset button
> WAN - LAN - SYS LED
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Changes in v2:
> - Change model name to FriendlyElec
> - Enable SD UHS modes
> - Add startup delay to SDIO regulator to improve
> issues reported with some cards
> - Fix PMIC interrupt pin
> - Add pinctrl node for ethernet-PHY
> - Fix various formatting issues
>
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 367 ++++++++++++++++++
> 2 files changed, 368 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
>
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index b87b1f773083..20055c51e150 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> new file mode 100644
> index 000000000000..51c100ea9211
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> @@ -0,0 +1,367 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "rk3328.dtsi"
> +
> +/ {
> + model = "FriendlyElec NanoPi R2S";
> + compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
> +
> + chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + gmac_clkin: external-gmac-clock {
Maybe something more consistant nodename/label combination?
> + compatible = "fixed-clock";
> + clock-frequency = <125000000>;
> + clock-output-names = "gmac_clkin";
> + #clock-cells = <0>;
> + };
> +
> + keys {
> + compatible = "gpio-keys";
> + pinctrl-0 = <&reset_button_pin>;
> + pinctrl-names = "default";
> +
> + reset {
> + label = "Reset Button";
This label shows up in the kernel tree.
User space scripts don't like a space in a dir name for example.
Users don't like typing mixed SHIFT-capitals.
> + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_RESTART>;
> + debounce-interval = <50>;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-0 = <&wan_led_pin &sys_led_pin &wan_led_pin>;
&lan_led_pin ^
Quote by robh:
While bracketing doesn't matter for a DTB, the DT schema checks rely on
bracketing around each distinct entry.
> + pinctrl-names = "default";
> +
> + lan_led: led-0 {
> + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:green:lan";
> + };
> +
> + sys_led: led-1 {
> + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:red:sys";
> + };
> +
> + wan_led: led-2 {
> + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:green:wan";
> + };
> + };
> +
> + vcc_sd: sdmmc-regulator {
> + compatible = "regulator-fixed";
> + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
> + pinctrl-0 = <&sdmmc0m1_gpio>;
> + pinctrl-names = "default";
> + regulator-name = "vcc_sd";
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_io_33>;
> + };
> +
> + vcc_io_sdio: sdmmcio-regulator {
sort nodenames
> + compatible = "regulator-gpio";
> + enable-active-high;
> + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&sdio_vcc_pin>;
> + pinctrl-names = "default";
> + regulator-name = "vcc_io_sdio";
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-settling-time-us = <5000>;
> + regulator-type = "voltage";
> + startup-delay-us = <2000>;
> + states = <1800000 0x1
> + 3300000 0x0>;
> + vin-supply = <&vcc_io_33>;
> + };
> +
> + vdd_5v: vdd-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_5v";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu1 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu2 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu3 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&gmac2io {
> + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
> + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
> + clock_in_out = "input";
> + phy-handle = <&rtl8211e>;
> + phy-mode = "rgmii";
> + phy-supply = <&vcc_io_33>;
> + pinctrl-0 = <&rgmiim1_pins>;
> + pinctrl-names = "default";
> + rx_delay = <0x18>;
> + snps,aal;
> + tx_delay = <0x24>;
> + status = "okay";
> +
> + mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rtl8211e: ethernet-phy@0 {
if reg == <1> then use @1
rtl8211e: ethernet-phy@1 {
reg = <1>;
> + pinctrl-0 = <ð_phy_reset_pin>;
> + pinctrl-names = "default";
> + reg = <1>;
move reg below nodename
> + reset-assert-us = <10000>;
> + reset-deassert-us = <50000>;
> + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + status = "okay";
> +
> + rk805: pmic@18 {
> + compatible = "rockchip,rk805";
reg = <0x18>;
> + #clock-cells = <1>;
> + clock-output-names = "xin32k", "rk805-clkout2";
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&pmic_int_l>;
> + pinctrl-names = "default";
> + reg = <0x18>;
move reg below compatible
Quote by Heiko:
But yes, since the early Chromebook project in 2014 we agreed on
doing in Rockchip dts files:
----
compatible
reg
interrupts
[alphabetical]
status [if needed]
----
> + rockchip,system-power-controller;
> + wakeup-source;
> +
> + vcc1-supply = <&vdd_5v>;
> + vcc2-supply = <&vdd_5v>;
> + vcc3-supply = <&vdd_5v>;
> + vcc4-supply = <&vdd_5v>;
> + vcc5-supply = <&vcc_io_33>;
> + vcc6-supply = <&vdd_5v>;
> +
> + regulators {
> + vdd_log: DCDC_REG1 {
> + regulator-name = "vdd_log";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1450000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> +
> + vdd_arm: DCDC_REG2 {
> + regulator-name = "vdd_arm";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1450000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <950000>;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-name = "vcc_ddr";
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_io_33: DCDC_REG4 {
> + regulator-name = "vcc_io_33";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc_18: LDO_REG1 {
> + regulator-name = "vcc_18";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcc18_emmc: LDO_REG2 {
> + regulator-name = "vcc18_emmc";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdd_10: LDO_REG3 {
> + regulator-name = "vdd_10";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> + };
> + };
> +};
> +
> +&io_domains {
> + pmuio-supply = <&vcc_io_33>;
> + vccio1-supply = <&vcc_io_33>;
> + vccio2-supply = <&vcc18_emmc>;
> + vccio3-supply = <&vcc_io_sdio>;
> + vccio4-supply = <&vcc_18>;
> + vccio5-supply = <&vcc_io_33>;
> + vccio6-supply = <&vcc_io_33>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + button {
> + reset_button_pin: reset-button-pin {
> + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + ethernet-phy {
> + eth_phy_reset_pin: reset-pin {
make something more consistant label/nodename
> + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> + };
> +
> + leds {
> + lan_led_pin: lan-led-pin {
> + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + sys_led_pin: sys-led-pin {
> + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + wan_led_pin: wan-led-pin {
> + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pmic {
> + pmic_int_l: pmic-int-l {
> + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + sd {
> + sdio_vcc_pin: sdio-vcc-pin {
> + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +};
> +
> +&pwm2 {
> + status = "okay";
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + disable-wp;
> + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
> + pinctrl-names = "default";
> + sd-uhs-sdr12;
> + sd-uhs-sdr25;
> + sd-uhs-sdr50;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_sd>;
> + vqmmc-supply = <&vcc_io_sdio>;
> + status = "okay";
> +};
> +
> +&tsadc {
> + rockchip,hw-tshut-mode = <0>;
> + rockchip,hw-tshut-polarity = <0>;
> + status = "okay";
> +};
> +
> +&u2phy {
> + status = "okay";
> +};
> +
> +&u2phy_host {
> + status = "okay";
> +};
> +
> +&u2phy_otg {
> + status = "okay";
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> +
> +&usb20_otg {
Question for Robin Murphy:
Do we need this here?
Does it work without, because on my rk3318 without it is not reliable?
dr_mode = "host"; ??
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/2] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
@ 2020-08-21 9:42 ` Johan Jonker
0 siblings, 0 replies; 21+ messages in thread
From: Johan Jonker @ 2020-08-21 9:42 UTC (permalink / raw)
To: David Bauer, robh+dt, heiko, andy.yan, jagan, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
Hi David,
Increase version number for each new serie.
On 8/20/20 11:44 PM, David Bauer wrote:
> This adds support for the NanoPi R2S from FriendlyARM.
>
> Rockchip RK3328 SoC
> 1GB DDR4 RAM
> Gigabit Ethernet (WAN)
> Gigabit Ethernet (USB3) (LAN)
> USB 2.0 Host Port
> MicroSD slot
> Reset button
> WAN - LAN - SYS LED
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Changes in v2:
> - Change model name to FriendlyElec
> - Enable SD UHS modes
> - Add startup delay to SDIO regulator to improve
> issues reported with some cards
> - Fix PMIC interrupt pin
> - Add pinctrl node for ethernet-PHY
> - Fix various formatting issues
>
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 367 ++++++++++++++++++
> 2 files changed, 368 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
>
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index b87b1f773083..20055c51e150 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> new file mode 100644
> index 000000000000..51c100ea9211
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> @@ -0,0 +1,367 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "rk3328.dtsi"
> +
> +/ {
> + model = "FriendlyElec NanoPi R2S";
> + compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
> +
> + chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + gmac_clkin: external-gmac-clock {
Maybe something more consistant nodename/label combination?
> + compatible = "fixed-clock";
> + clock-frequency = <125000000>;
> + clock-output-names = "gmac_clkin";
> + #clock-cells = <0>;
> + };
> +
> + keys {
> + compatible = "gpio-keys";
> + pinctrl-0 = <&reset_button_pin>;
> + pinctrl-names = "default";
> +
> + reset {
> + label = "Reset Button";
This label shows up in the kernel tree.
User space scripts don't like a space in a dir name for example.
Users don't like typing mixed SHIFT-capitals.
> + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_RESTART>;
> + debounce-interval = <50>;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-0 = <&wan_led_pin &sys_led_pin &wan_led_pin>;
&lan_led_pin ^
Quote by robh:
While bracketing doesn't matter for a DTB, the DT schema checks rely on
bracketing around each distinct entry.
> + pinctrl-names = "default";
> +
> + lan_led: led-0 {
> + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:green:lan";
> + };
> +
> + sys_led: led-1 {
> + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:red:sys";
> + };
> +
> + wan_led: led-2 {
> + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:green:wan";
> + };
> + };
> +
> + vcc_sd: sdmmc-regulator {
> + compatible = "regulator-fixed";
> + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
> + pinctrl-0 = <&sdmmc0m1_gpio>;
> + pinctrl-names = "default";
> + regulator-name = "vcc_sd";
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_io_33>;
> + };
> +
> + vcc_io_sdio: sdmmcio-regulator {
sort nodenames
> + compatible = "regulator-gpio";
> + enable-active-high;
> + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&sdio_vcc_pin>;
> + pinctrl-names = "default";
> + regulator-name = "vcc_io_sdio";
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-settling-time-us = <5000>;
> + regulator-type = "voltage";
> + startup-delay-us = <2000>;
> + states = <1800000 0x1
> + 3300000 0x0>;
> + vin-supply = <&vcc_io_33>;
> + };
> +
> + vdd_5v: vdd-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_5v";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu1 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu2 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu3 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&gmac2io {
> + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
> + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
> + clock_in_out = "input";
> + phy-handle = <&rtl8211e>;
> + phy-mode = "rgmii";
> + phy-supply = <&vcc_io_33>;
> + pinctrl-0 = <&rgmiim1_pins>;
> + pinctrl-names = "default";
> + rx_delay = <0x18>;
> + snps,aal;
> + tx_delay = <0x24>;
> + status = "okay";
> +
> + mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rtl8211e: ethernet-phy@0 {
if reg == <1> then use @1
rtl8211e: ethernet-phy@1 {
reg = <1>;
> + pinctrl-0 = <ð_phy_reset_pin>;
> + pinctrl-names = "default";
> + reg = <1>;
move reg below nodename
> + reset-assert-us = <10000>;
> + reset-deassert-us = <50000>;
> + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + status = "okay";
> +
> + rk805: pmic@18 {
> + compatible = "rockchip,rk805";
reg = <0x18>;
> + #clock-cells = <1>;
> + clock-output-names = "xin32k", "rk805-clkout2";
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&pmic_int_l>;
> + pinctrl-names = "default";
> + reg = <0x18>;
move reg below compatible
Quote by Heiko:
But yes, since the early Chromebook project in 2014 we agreed on
doing in Rockchip dts files:
----
compatible
reg
interrupts
[alphabetical]
status [if needed]
----
> + rockchip,system-power-controller;
> + wakeup-source;
> +
> + vcc1-supply = <&vdd_5v>;
> + vcc2-supply = <&vdd_5v>;
> + vcc3-supply = <&vdd_5v>;
> + vcc4-supply = <&vdd_5v>;
> + vcc5-supply = <&vcc_io_33>;
> + vcc6-supply = <&vdd_5v>;
> +
> + regulators {
> + vdd_log: DCDC_REG1 {
> + regulator-name = "vdd_log";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1450000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> +
> + vdd_arm: DCDC_REG2 {
> + regulator-name = "vdd_arm";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1450000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <950000>;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-name = "vcc_ddr";
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_io_33: DCDC_REG4 {
> + regulator-name = "vcc_io_33";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc_18: LDO_REG1 {
> + regulator-name = "vcc_18";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcc18_emmc: LDO_REG2 {
> + regulator-name = "vcc18_emmc";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdd_10: LDO_REG3 {
> + regulator-name = "vdd_10";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> + };
> + };
> +};
> +
> +&io_domains {
> + pmuio-supply = <&vcc_io_33>;
> + vccio1-supply = <&vcc_io_33>;
> + vccio2-supply = <&vcc18_emmc>;
> + vccio3-supply = <&vcc_io_sdio>;
> + vccio4-supply = <&vcc_18>;
> + vccio5-supply = <&vcc_io_33>;
> + vccio6-supply = <&vcc_io_33>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + button {
> + reset_button_pin: reset-button-pin {
> + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + ethernet-phy {
> + eth_phy_reset_pin: reset-pin {
make something more consistant label/nodename
> + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> + };
> +
> + leds {
> + lan_led_pin: lan-led-pin {
> + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + sys_led_pin: sys-led-pin {
> + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + wan_led_pin: wan-led-pin {
> + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pmic {
> + pmic_int_l: pmic-int-l {
> + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + sd {
> + sdio_vcc_pin: sdio-vcc-pin {
> + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +};
> +
> +&pwm2 {
> + status = "okay";
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + disable-wp;
> + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
> + pinctrl-names = "default";
> + sd-uhs-sdr12;
> + sd-uhs-sdr25;
> + sd-uhs-sdr50;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_sd>;
> + vqmmc-supply = <&vcc_io_sdio>;
> + status = "okay";
> +};
> +
> +&tsadc {
> + rockchip,hw-tshut-mode = <0>;
> + rockchip,hw-tshut-polarity = <0>;
> + status = "okay";
> +};
> +
> +&u2phy {
> + status = "okay";
> +};
> +
> +&u2phy_host {
> + status = "okay";
> +};
> +
> +&u2phy_otg {
> + status = "okay";
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> +
> +&usb20_otg {
Question for Robin Murphy:
Do we need this here?
Does it work without, because on my rk3318 without it is not reliable?
dr_mode = "host"; ??
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/2] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
@ 2020-08-21 9:42 ` Johan Jonker
0 siblings, 0 replies; 21+ messages in thread
From: Johan Jonker @ 2020-08-21 9:42 UTC (permalink / raw)
To: David Bauer, robh+dt, heiko, andy.yan, jagan, robin.murphy,
kever.yang, m.reichl, t.schramm, pgwipeout, devicetree,
linux-arm-kernel, linux-rockchip
Hi David,
Increase version number for each new serie.
On 8/20/20 11:44 PM, David Bauer wrote:
> This adds support for the NanoPi R2S from FriendlyARM.
>
> Rockchip RK3328 SoC
> 1GB DDR4 RAM
> Gigabit Ethernet (WAN)
> Gigabit Ethernet (USB3) (LAN)
> USB 2.0 Host Port
> MicroSD slot
> Reset button
> WAN - LAN - SYS LED
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Changes in v2:
> - Change model name to FriendlyElec
> - Enable SD UHS modes
> - Add startup delay to SDIO regulator to improve
> issues reported with some cards
> - Fix PMIC interrupt pin
> - Add pinctrl node for ethernet-PHY
> - Fix various formatting issues
>
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 367 ++++++++++++++++++
> 2 files changed, 368 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
>
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index b87b1f773083..20055c51e150 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> new file mode 100644
> index 000000000000..51c100ea9211
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> @@ -0,0 +1,367 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "rk3328.dtsi"
> +
> +/ {
> + model = "FriendlyElec NanoPi R2S";
> + compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
> +
> + chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + gmac_clkin: external-gmac-clock {
Maybe something more consistant nodename/label combination?
> + compatible = "fixed-clock";
> + clock-frequency = <125000000>;
> + clock-output-names = "gmac_clkin";
> + #clock-cells = <0>;
> + };
> +
> + keys {
> + compatible = "gpio-keys";
> + pinctrl-0 = <&reset_button_pin>;
> + pinctrl-names = "default";
> +
> + reset {
> + label = "Reset Button";
This label shows up in the kernel tree.
User space scripts don't like a space in a dir name for example.
Users don't like typing mixed SHIFT-capitals.
> + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_RESTART>;
> + debounce-interval = <50>;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-0 = <&wan_led_pin &sys_led_pin &wan_led_pin>;
&lan_led_pin ^
Quote by robh:
While bracketing doesn't matter for a DTB, the DT schema checks rely on
bracketing around each distinct entry.
> + pinctrl-names = "default";
> +
> + lan_led: led-0 {
> + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:green:lan";
> + };
> +
> + sys_led: led-1 {
> + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:red:sys";
> + };
> +
> + wan_led: led-2 {
> + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r2s:green:wan";
> + };
> + };
> +
> + vcc_sd: sdmmc-regulator {
> + compatible = "regulator-fixed";
> + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
> + pinctrl-0 = <&sdmmc0m1_gpio>;
> + pinctrl-names = "default";
> + regulator-name = "vcc_sd";
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_io_33>;
> + };
> +
> + vcc_io_sdio: sdmmcio-regulator {
sort nodenames
> + compatible = "regulator-gpio";
> + enable-active-high;
> + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&sdio_vcc_pin>;
> + pinctrl-names = "default";
> + regulator-name = "vcc_io_sdio";
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-settling-time-us = <5000>;
> + regulator-type = "voltage";
> + startup-delay-us = <2000>;
> + states = <1800000 0x1
> + 3300000 0x0>;
> + vin-supply = <&vcc_io_33>;
> + };
> +
> + vdd_5v: vdd-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_5v";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu1 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu2 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu3 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&gmac2io {
> + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
> + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
> + clock_in_out = "input";
> + phy-handle = <&rtl8211e>;
> + phy-mode = "rgmii";
> + phy-supply = <&vcc_io_33>;
> + pinctrl-0 = <&rgmiim1_pins>;
> + pinctrl-names = "default";
> + rx_delay = <0x18>;
> + snps,aal;
> + tx_delay = <0x24>;
> + status = "okay";
> +
> + mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + rtl8211e: ethernet-phy@0 {
if reg == <1> then use @1
rtl8211e: ethernet-phy@1 {
reg = <1>;
> + pinctrl-0 = <ð_phy_reset_pin>;
> + pinctrl-names = "default";
> + reg = <1>;
move reg below nodename
> + reset-assert-us = <10000>;
> + reset-deassert-us = <50000>;
> + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + status = "okay";
> +
> + rk805: pmic@18 {
> + compatible = "rockchip,rk805";
reg = <0x18>;
> + #clock-cells = <1>;
> + clock-output-names = "xin32k", "rk805-clkout2";
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&pmic_int_l>;
> + pinctrl-names = "default";
> + reg = <0x18>;
move reg below compatible
Quote by Heiko:
But yes, since the early Chromebook project in 2014 we agreed on
doing in Rockchip dts files:
----
compatible
reg
interrupts
[alphabetical]
status [if needed]
----
> + rockchip,system-power-controller;
> + wakeup-source;
> +
> + vcc1-supply = <&vdd_5v>;
> + vcc2-supply = <&vdd_5v>;
> + vcc3-supply = <&vdd_5v>;
> + vcc4-supply = <&vdd_5v>;
> + vcc5-supply = <&vcc_io_33>;
> + vcc6-supply = <&vdd_5v>;
> +
> + regulators {
> + vdd_log: DCDC_REG1 {
> + regulator-name = "vdd_log";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1450000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> +
> + vdd_arm: DCDC_REG2 {
> + regulator-name = "vdd_arm";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1450000>;
> + regulator-ramp-delay = <12500>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <950000>;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-name = "vcc_ddr";
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_io_33: DCDC_REG4 {
> + regulator-name = "vcc_io_33";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc_18: LDO_REG1 {
> + regulator-name = "vcc_18";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcc18_emmc: LDO_REG2 {
> + regulator-name = "vcc18_emmc";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdd_10: LDO_REG3 {
> + regulator-name = "vdd_10";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> + };
> + };
> +};
> +
> +&io_domains {
> + pmuio-supply = <&vcc_io_33>;
> + vccio1-supply = <&vcc_io_33>;
> + vccio2-supply = <&vcc18_emmc>;
> + vccio3-supply = <&vcc_io_sdio>;
> + vccio4-supply = <&vcc_18>;
> + vccio5-supply = <&vcc_io_33>;
> + vccio6-supply = <&vcc_io_33>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + button {
> + reset_button_pin: reset-button-pin {
> + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + ethernet-phy {
> + eth_phy_reset_pin: reset-pin {
make something more consistant label/nodename
> + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> + };
> +
> + leds {
> + lan_led_pin: lan-led-pin {
> + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + sys_led_pin: sys-led-pin {
> + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + wan_led_pin: wan-led-pin {
> + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pmic {
> + pmic_int_l: pmic-int-l {
> + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + sd {
> + sdio_vcc_pin: sdio-vcc-pin {
> + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +};
> +
> +&pwm2 {
> + status = "okay";
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + disable-wp;
> + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
> + pinctrl-names = "default";
> + sd-uhs-sdr12;
> + sd-uhs-sdr25;
> + sd-uhs-sdr50;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_sd>;
> + vqmmc-supply = <&vcc_io_sdio>;
> + status = "okay";
> +};
> +
> +&tsadc {
> + rockchip,hw-tshut-mode = <0>;
> + rockchip,hw-tshut-polarity = <0>;
> + status = "okay";
> +};
> +
> +&u2phy {
> + status = "okay";
> +};
> +
> +&u2phy_host {
> + status = "okay";
> +};
> +
> +&u2phy_otg {
> + status = "okay";
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> +
> +&usb20_otg {
Question for Robin Murphy:
Do we need this here?
Does it work without, because on my rk3318 without it is not reliable?
dr_mode = "host"; ??
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
>
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
2020-08-20 21:44 ` David Bauer
(?)
@ 2020-08-24 21:25 ` Rob Herring
-1 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2020-08-24 21:25 UTC (permalink / raw)
To: David Bauer
Cc: t.schramm, jbx6244, kever.yang, m.reichl, jagan, heiko,
robin.murphy, pgwipeout, andy.yan, devicetree, linux-rockchip,
linux-arm-kernel, robh+dt
On Thu, 20 Aug 2020 23:44:08 +0200, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Changes in v2:
> - Change model name to FriendlyElec
>
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-08-24 21:25 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2020-08-24 21:25 UTC (permalink / raw)
To: David Bauer
Cc: devicetree, heiko, t.schramm, kever.yang, m.reichl,
linux-rockchip, robh+dt, jagan, pgwipeout, andy.yan, jbx6244,
robin.murphy, linux-arm-kernel
On Thu, 20 Aug 2020 23:44:08 +0200, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Changes in v2:
> - Change model name to FriendlyElec
>
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-08-24 21:25 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2020-08-24 21:25 UTC (permalink / raw)
To: David Bauer
Cc: devicetree, heiko, t.schramm, kever.yang, m.reichl,
linux-rockchip, robh+dt, jagan, pgwipeout, andy.yan, jbx6244,
robin.murphy, linux-arm-kernel
On Thu, 20 Aug 2020 23:44:08 +0200, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Changes in v2:
> - Change model name to FriendlyElec
>
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-08-02 21:57 ` Robin Murphy
0 siblings, 0 replies; 21+ messages in thread
From: Robin Murphy @ 2020-08-02 21:57 UTC (permalink / raw)
To: David Bauer, linux-arm-kernel; +Cc: linux-rockchip, devicetree
Hi David,
On 2020-07-31 00:20, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index d4a4045092df..b17931ec2d86 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -104,6 +104,11 @@ properties:
> - firefly,roc-rk3399-pc-mezzanine
> - const: rockchip,rk3399
>
> + - description: FriendlyARM NanoPi R2S
Nit: as the context below hints at, the company call themselves
"FriendlyElec" these days - certainly since long before this board
existed - so for consistency we should probably use that name in the
description (but keep the established vendor prefix).
Robin.
> + items:
> + - const: friendlyarm,nanopi-r2s
> + - const: rockchip,rk3328
> +
> - description: FriendlyElec NanoPi4 series boards
> items:
> - enum:
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-08-02 21:57 ` Robin Murphy
0 siblings, 0 replies; 21+ messages in thread
From: Robin Murphy @ 2020-08-02 21:57 UTC (permalink / raw)
To: David Bauer, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
Hi David,
On 2020-07-31 00:20, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail-YgwEh8z+B+JYon68uE86FQ@public.gmane.org>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index d4a4045092df..b17931ec2d86 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -104,6 +104,11 @@ properties:
> - firefly,roc-rk3399-pc-mezzanine
> - const: rockchip,rk3399
>
> + - description: FriendlyARM NanoPi R2S
Nit: as the context below hints at, the company call themselves
"FriendlyElec" these days - certainly since long before this board
existed - so for consistency we should probably use that name in the
description (but keep the established vendor prefix).
Robin.
> + items:
> + - const: friendlyarm,nanopi-r2s
> + - const: rockchip,rk3328
> +
> - description: FriendlyElec NanoPi4 series boards
> items:
> - enum:
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-08-02 21:57 ` Robin Murphy
0 siblings, 0 replies; 21+ messages in thread
From: Robin Murphy @ 2020-08-02 21:57 UTC (permalink / raw)
To: David Bauer, linux-arm-kernel; +Cc: linux-rockchip, devicetree
Hi David,
On 2020-07-31 00:20, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index d4a4045092df..b17931ec2d86 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -104,6 +104,11 @@ properties:
> - firefly,roc-rk3399-pc-mezzanine
> - const: rockchip,rk3399
>
> + - description: FriendlyARM NanoPi R2S
Nit: as the context below hints at, the company call themselves
"FriendlyElec" these days - certainly since long before this board
existed - so for consistency we should probably use that name in the
description (but keep the established vendor prefix).
Robin.
> + items:
> + - const: friendlyarm,nanopi-r2s
> + - const: rockchip,rk3328
> +
> - description: FriendlyElec NanoPi4 series boards
> items:
> - enum:
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-07-31 22:43 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2020-07-31 22:43 UTC (permalink / raw)
To: David Bauer; +Cc: devicetree, linux-rockchip, linux-arm-kernel
On Fri, 31 Jul 2020 01:20:53 +0200, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-07-31 22:43 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2020-07-31 22:43 UTC (permalink / raw)
To: David Bauer
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Fri, 31 Jul 2020 01:20:53 +0200, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail-YgwEh8z+B+JYon68uE86FQ@public.gmane.org>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-07-31 22:43 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2020-07-31 22:43 UTC (permalink / raw)
To: David Bauer; +Cc: devicetree, linux-arm-kernel, linux-rockchip
On Fri, 31 Jul 2020 01:20:53 +0200, David Bauer wrote:
> Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
>
> Signed-off-by: David Bauer <mail@david-bauer.net>
> ---
> Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-07-30 23:20 ` David Bauer
0 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-07-30 23:20 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: linux-rockchip, devicetree
Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index d4a4045092df..b17931ec2d86 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -104,6 +104,11 @@ properties:
- firefly,roc-rk3399-pc-mezzanine
- const: rockchip,rk3399
+ - description: FriendlyARM NanoPi R2S
+ items:
+ - const: friendlyarm,nanopi-r2s
+ - const: rockchip,rk3328
+
- description: FriendlyElec NanoPi4 series boards
items:
- enum:
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-07-30 23:20 ` David Bauer
0 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-07-30 23:20 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
Signed-off-by: David Bauer <mail-YgwEh8z+B+JYon68uE86FQ@public.gmane.org>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index d4a4045092df..b17931ec2d86 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -104,6 +104,11 @@ properties:
- firefly,roc-rk3399-pc-mezzanine
- const: rockchip,rk3399
+ - description: FriendlyARM NanoPi R2S
+ items:
+ - const: friendlyarm,nanopi-r2s
+ - const: rockchip,rk3328
+
- description: FriendlyElec NanoPi4 series boards
items:
- enum:
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S
@ 2020-07-30 23:20 ` David Bauer
0 siblings, 0 replies; 21+ messages in thread
From: David Bauer @ 2020-07-30 23:20 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: linux-rockchip, devicetree
Add devicetree binding documentation for the FriendlyARM NanoPi R2S.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index d4a4045092df..b17931ec2d86 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -104,6 +104,11 @@ properties:
- firefly,roc-rk3399-pc-mezzanine
- const: rockchip,rk3399
+ - description: FriendlyARM NanoPi R2S
+ items:
+ - const: friendlyarm,nanopi-r2s
+ - const: rockchip,rk3328
+
- description: FriendlyElec NanoPi4 series boards
items:
- enum:
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
end of thread, other threads:[~2020-08-24 21:27 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-08-20 21:44 [PATCH v2 1/2] dt-bindings: Add doc for FriendlyARM NanoPi R2S David Bauer
2020-08-20 21:44 ` David Bauer
2020-08-20 21:44 ` David Bauer
2020-08-20 21:44 ` [PATCH v2 2/2] rockchip: rk3328: Add support " David Bauer
2020-08-20 21:44 ` David Bauer
2020-08-20 21:44 ` David Bauer
2020-08-21 9:42 ` Johan Jonker
2020-08-21 9:42 ` Johan Jonker
2020-08-21 9:42 ` Johan Jonker
2020-08-24 21:25 ` [PATCH v2 1/2] dt-bindings: Add doc " Rob Herring
2020-08-24 21:25 ` Rob Herring
2020-08-24 21:25 ` Rob Herring
-- strict thread matches above, loose matches on Subject: below --
2020-07-30 23:20 David Bauer
2020-07-30 23:20 ` David Bauer
2020-07-30 23:20 ` David Bauer
2020-07-31 22:43 ` Rob Herring
2020-07-31 22:43 ` Rob Herring
2020-07-31 22:43 ` Rob Herring
2020-08-02 21:57 ` Robin Murphy
2020-08-02 21:57 ` Robin Murphy
2020-08-02 21:57 ` Robin Murphy
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