Re: [PATCH 00/77] target/microblaze improvements

["Edgar E. Iglesias" <edgar.iglesias@gmail.com>]

On Tue, Aug 25, 2020 at 01:58:33PM -0700, Richard Henderson wrote:
> Well, this is larger than I expected.
> 

Wow, thanks for working on this Richard!

I'll run some tests on it and go through the patches.

Thanks,
Edgar


> I started off thinking conversion to decodetree would be quick,
> after I reviewed the mttcg patches last week.  Then I realized
> that this could also use conversion to the generic translation loop.
> Then I realized that there were a number of bugs, and some
> inefficiencies, that could be fixed by using tcg exception unwind
> properly.
> 
> Hopefully most of these are small and easy to understand.
> 
> I begin by adding enough stuff to test/tcg to make use of a
> self-built musl cross-environment.  I'll note that linuxtest
> does not pass before or after this patch set -- I think that
> linux-user/microblaze/signal.c needs work -- but that the
> other tests do work.
> 
> I also have an old copy of a microblaze system test image,
> which I think used to be hosted on our wiki.  After basic kernel
> boot, it contains a "selftest" script which runs a bunch of
> user-land isa tests.  That still works fine too.
> 
> HOWEVER: That's not nearly complete.  There are cpu config options
> that aren't default and I don't know how to change or test.
> 
> In addition, the manual is really not clear on what's supposed to
> happen under various edge conditions, especially with MSR[EE] unset.
> E.g. unaligned access: Does the insn get nop-ed out?  Do the low
> bits of the address get ignored?  Right now (before and after) the
> access simply happens unaligned, which doesn't seem correct.
> I assume the reason for having this configure option is to reduce
> the size of the FPGA so that the unaligned access handling hw
> simply isn't present.
> 
> Lemme know what you think.
> 
> 
> r~
> 
> 
> Richard Henderson (77):
>   tests/tcg: Add microblaze to arches filter
>   tests/tcg: Do not require FE_TOWARDZERO
>   tests/tcg: Do not require FE_* exception bits
>   target/microblaze: Tidy gdbstub
>   target/microblaze: Split out PC from env->sregs
>   target/microblaze: Split out MSR from env->sregs
>   target/microblaze: Split out EAR from env->sregs
>   target/microblaze: Split out ESR from env->sregs
>   target/microblaze: Split out FSR from env->sregs
>   target/microblaze: Split out BTR from env->sregs
>   target/microblaze: Split out EDR from env->sregs
>   target/microblaze: Split the cpu_SR array
>   target/microblaze: Fix width of PC and BTARGET
>   target/microblaze: Fix width of MSR
>   target/microblaze: Fix width of ESR
>   target/microblaze: Fix width of FSR
>   target/microblaze: Fix width of BTR
>   target/microblaze: Fix width of EDR
>   target/microblaze: Remove cpu_ear
>   target/microblaze: Tidy raising of exceptions
>   target/microblaze: Mark raise_exception as noreturn
>   target/microblaze: Remove helper_debug and env->debug
>   target/microblaze: Rename env_* tcg variables to cpu_*
>   target/microblaze: Tidy mb_tcg_init
>   target/microblaze: Split out MSR[C] to its own variable
>   target/microblaze: Use DISAS_NORETURN
>   target/microblaze: Check singlestep_enabled in gen_goto_tb
>   target/microblaze: Convert to DisasContextBase
>   target/microblaze: Convert to translator_loop
>   target/microblaze: Remove SIM_COMPAT
>   target/microblaze: Remove DISAS_GNU
>   target/microblaze: Remove empty D macros
>   target/microblaze: Remove LOG_DIS
>   target/microblaze: Ensure imm constant is always available
>   target/microblaze: Add decodetree infrastructure
>   target/microblaze: Convert dec_add to decodetree
>   target/microblaze: Convert dec_sub to decodetree
>   target/microblaze: Implement cmp and cmpu inline
>   target/microblaze: Convert dec_pattern to decodetree
>   target/microblaze: Convert dec_and, dec_or, dec_xor to decodetree
>   target/microblaze: Convert dec_mul to decodetree
>   target/microblaze: Convert dec_div to decodetree
>   target/microblaze: Unwind properly when raising divide-by-zero
>   target/microblaze: Convert dec_bit to decodetree
>   target/microblaze: Convert dec_barrel to decodetree
>   target/microblaze: Convert dec_imm to decodetree
>   target/microblaze: Convert dec_fpu to decodetree
>   target/microblaze: Fix cpu unwind for fpu exceptions
>   target/microblaze: Mark fpu helpers TCG_CALL_NO_WG
>   target/microblaze: Replace MSR_EE_FLAG with MSR_EE
>   target/microblaze: Cache mem_index in DisasContext
>   target/microblaze: Fix cpu unwind for stackprot
>   target/microblaze: Convert dec_load and dec_store to decodetree
>   target/microblaze: Assert no overlap in flags making up tb_flags
>   target/microblaze: Move bimm to BIMM_FLAG
>   target/microblaze: Store "current" iflags in insn_start
>   tcg: Add tcg_get_insn_start_param
>   target/microblaze: Use cc->do_unaligned_access
>   target/microblaze: Replace clear_imm with tb_flags_to_set
>   target/microblaze: Replace delayed_branch with tb_flags_to_set
>   target/microblaze: Tidy mb_cpu_dump_state
>   target/microblaze: Try to keep imm and delay slot together
>   target/microblaze: Convert brk and brki to decodetree
>   target/microblaze: Convert mbar to decodetree
>   target/microblaze: Reorganize branching
>   target/microblaze: Use tcg_gen_lookup_and_goto_ptr
>   target/microblaze: Convert dec_br to decodetree
>   target/microblaze: Convert dec_bcc to decodetree
>   target/microblaze: Convert dec_rts to decodetree
>   target/microblaze: Tidy do_rti, do_rtb, do_rte
>   target/microblaze: Convert msrclr, msrset to decodetree
>   target/microblaze: Convert dec_msr to decodetree
>   target/microblaze: Convert dec_stream to decodetree
>   target/microblaze: Remove last of old decoder
>   target/microblaze: Remove cpu_R[0]
>   target/microblaze: Add flags markup to some helpers
>   target/microblaze: Reduce linux-user address space to 32-bit
> 
>  include/tcg/tcg.h                   |   15 +
>  target/microblaze/cpu-param.h       |   15 +
>  target/microblaze/cpu.h             |   67 +-
>  target/microblaze/helper.h          |   49 +-
>  tests/tcg/multiarch/float_helpers.h |   17 +
>  target/microblaze/insns.decode      |  253 +++
>  linux-user/elfload.c                |    9 +-
>  linux-user/microblaze/cpu_loop.c    |   26 +-
>  linux-user/microblaze/signal.c      |    8 +-
>  target/microblaze/cpu.c             |    9 +-
>  target/microblaze/gdbstub.c         |  193 +-
>  target/microblaze/helper.c          |  164 +-
>  target/microblaze/mmu.c             |    4 +-
>  target/microblaze/op_helper.c       |  175 +-
>  target/microblaze/translate.c       | 3250 ++++++++++++++-------------
>  tests/tcg/multiarch/float_convs.c   |    2 +
>  tests/tcg/multiarch/float_madds.c   |    2 +
>  target/microblaze/meson.build       |    3 +
>  tests/tcg/configure.sh              |    2 +-
>  19 files changed, 2309 insertions(+), 1954 deletions(-)
>  create mode 100644 target/microblaze/insns.decode
> 
> -- 
> 2.25.1
>