* [PATCH v2 0/2] ASoC: ti: j721e-evm: Support for j7200 variant
@ 2020-09-10 12:41 ` Peter Ujfalusi
0 siblings, 0 replies; 8+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 12:41 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: alsa-devel, devicetree, linux-kernel
Hi,
Changes since v1:
- Suffix the 2359296000 constant with 'u' to silence C90 warning
When j7200 SOM is connected to the CPB, the audio setup is a bit different:
Only 48KHz family have clock path, 44.1KHz is not supported.
Update the binding documentation and add support for the j7200 version of CPB
to the driver.
Regards,
Peter
---
Peter Ujfalusi (2):
ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb
ASoC: ti: j721e-evm: Add support for j7200-cpb audio
.../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++-----
sound/soc/ti/j721e-evm.c | 11 +++
2 files changed, 81 insertions(+), 22 deletions(-)
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 0/2] ASoC: ti: j721e-evm: Support for j7200 variant
@ 2020-09-10 12:41 ` Peter Ujfalusi
0 siblings, 0 replies; 8+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 12:41 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: devicetree, alsa-devel, linux-kernel
Hi,
Changes since v1:
- Suffix the 2359296000 constant with 'u' to silence C90 warning
When j7200 SOM is connected to the CPB, the audio setup is a bit different:
Only 48KHz family have clock path, 44.1KHz is not supported.
Update the binding documentation and add support for the j7200 version of CPB
to the driver.
Regards,
Peter
---
Peter Ujfalusi (2):
ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb
ASoC: ti: j721e-evm: Add support for j7200-cpb audio
.../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++-----
sound/soc/ti/j721e-evm.c | 11 +++
2 files changed, 81 insertions(+), 22 deletions(-)
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/2] ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb
2020-09-10 12:41 ` Peter Ujfalusi
@ 2020-09-10 12:41 ` Peter Ujfalusi
-1 siblings, 0 replies; 8+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 12:41 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: alsa-devel, devicetree, linux-kernel
j721e or j7200 SOM can be attached to the same Common Processor Board (CPB)
With the j7200 SOM only the 48KHz family parent clock is available and
McASP0 is used for the audio.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
.../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++-----
1 file changed, 70 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
index d52cfbeb2d07..805da4d6a88e 100644
--- a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
+++ b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
@@ -18,18 +18,25 @@ description: |
PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
different HSDIVIDER.
- Clocking setup for 48KHz family:
- PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
- |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+ Clocking setup for j721e:
+ 48KHz family:
+ PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
+ |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
- Clocking setup for 44.1KHz family:
- PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
- |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+ 44.1KHz family:
+ PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
+ |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+
+ Clocking setup for j7200:
+ 48KHz family:
+ PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk
+ |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
properties:
compatible:
- items:
- - const: ti,j721e-cpb-audio
+ enum:
+ - ti,j721e-cpb-audio
+ - ti,j7200-cpb-audio
model:
$ref: /schemas/types.yaml#/definitions/string
@@ -44,22 +51,12 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
clocks:
- items:
- - description: AUXCLK clock for McASP used by CPB audio
- - description: Parent for CPB_McASP auxclk (for 48KHz)
- - description: Parent for CPB_McASP auxclk (for 44.1KHz)
- - description: SCKI clock for the pcm3168a codec on CPB
- - description: Parent for CPB_SCKI clock (for 48KHz)
- - description: Parent for CPB_SCKI clock (for 44.1KHz)
+ minItems: 4
+ maxItems: 6
clock-names:
- items:
- - const: cpb-mcasp-auxclk
- - const: cpb-mcasp-auxclk-48000
- - const: cpb-mcasp-auxclk-44100
- - const: cpb-codec-scki
- - const: cpb-codec-scki-48000
- - const: cpb-codec-scki-44100
+ minItems: 4
+ maxItems: 6
required:
- compatible
@@ -71,6 +68,57 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,j721e-cpb-audio
+
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ items:
+ - description: AUXCLK clock for McASP used by CPB audio
+ - description: Parent for CPB_McASP auxclk (for 48KHz)
+ - description: Parent for CPB_McASP auxclk (for 44.1KHz)
+ - description: SCKI clock for the pcm3168a codec on CPB
+ - description: Parent for CPB_SCKI clock (for 48KHz)
+ - description: Parent for CPB_SCKI clock (for 44.1KHz)
+
+ clock-names:
+ items:
+ - const: cpb-mcasp-auxclk
+ - const: cpb-mcasp-auxclk-48000
+ - const: cpb-mcasp-auxclk-44100
+ - const: cpb-codec-scki
+ - const: cpb-codec-scki-48000
+ - const: cpb-codec-scki-44100
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,j7200-cpb-audio
+
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ items:
+ - description: AUXCLK clock for McASP used by CPB audio
+ - description: Parent for CPB_McASP auxclk (for 48KHz)
+ - description: SCKI clock for the pcm3168a codec on CPB
+ - description: Parent for CPB_SCKI clock (for 48KHz)
+
+ clock-names:
+ items:
+ - const: cpb-mcasp-auxclk
+ - const: cpb-mcasp-auxclk-48000
+ - const: cpb-codec-scki
+ - const: cpb-codec-scki-48000
+
examples:
- |+
sound {
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 1/2] ASoC: dt-bindings: ti, j721e-cpb-audio: Document support for j7200-cpb
@ 2020-09-10 12:41 ` Peter Ujfalusi
0 siblings, 0 replies; 8+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 12:41 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: devicetree, alsa-devel, linux-kernel
j721e or j7200 SOM can be attached to the same Common Processor Board (CPB)
With the j7200 SOM only the 48KHz family parent clock is available and
McASP0 is used for the audio.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
.../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++-----
1 file changed, 70 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
index d52cfbeb2d07..805da4d6a88e 100644
--- a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
+++ b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml
@@ -18,18 +18,25 @@ description: |
PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
different HSDIVIDER.
- Clocking setup for 48KHz family:
- PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
- |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+ Clocking setup for j721e:
+ 48KHz family:
+ PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
+ |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
- Clocking setup for 44.1KHz family:
- PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
- |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+ 44.1KHz family:
+ PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
+ |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
+
+ Clocking setup for j7200:
+ 48KHz family:
+ PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk
+ |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
properties:
compatible:
- items:
- - const: ti,j721e-cpb-audio
+ enum:
+ - ti,j721e-cpb-audio
+ - ti,j7200-cpb-audio
model:
$ref: /schemas/types.yaml#/definitions/string
@@ -44,22 +51,12 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
clocks:
- items:
- - description: AUXCLK clock for McASP used by CPB audio
- - description: Parent for CPB_McASP auxclk (for 48KHz)
- - description: Parent for CPB_McASP auxclk (for 44.1KHz)
- - description: SCKI clock for the pcm3168a codec on CPB
- - description: Parent for CPB_SCKI clock (for 48KHz)
- - description: Parent for CPB_SCKI clock (for 44.1KHz)
+ minItems: 4
+ maxItems: 6
clock-names:
- items:
- - const: cpb-mcasp-auxclk
- - const: cpb-mcasp-auxclk-48000
- - const: cpb-mcasp-auxclk-44100
- - const: cpb-codec-scki
- - const: cpb-codec-scki-48000
- - const: cpb-codec-scki-44100
+ minItems: 4
+ maxItems: 6
required:
- compatible
@@ -71,6 +68,57 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,j721e-cpb-audio
+
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ items:
+ - description: AUXCLK clock for McASP used by CPB audio
+ - description: Parent for CPB_McASP auxclk (for 48KHz)
+ - description: Parent for CPB_McASP auxclk (for 44.1KHz)
+ - description: SCKI clock for the pcm3168a codec on CPB
+ - description: Parent for CPB_SCKI clock (for 48KHz)
+ - description: Parent for CPB_SCKI clock (for 44.1KHz)
+
+ clock-names:
+ items:
+ - const: cpb-mcasp-auxclk
+ - const: cpb-mcasp-auxclk-48000
+ - const: cpb-mcasp-auxclk-44100
+ - const: cpb-codec-scki
+ - const: cpb-codec-scki-48000
+ - const: cpb-codec-scki-44100
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,j7200-cpb-audio
+
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ items:
+ - description: AUXCLK clock for McASP used by CPB audio
+ - description: Parent for CPB_McASP auxclk (for 48KHz)
+ - description: SCKI clock for the pcm3168a codec on CPB
+ - description: Parent for CPB_SCKI clock (for 48KHz)
+
+ clock-names:
+ items:
+ - const: cpb-mcasp-auxclk
+ - const: cpb-mcasp-auxclk-48000
+ - const: cpb-codec-scki
+ - const: cpb-codec-scki-48000
+
examples:
- |+
sound {
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio
2020-09-10 12:41 ` Peter Ujfalusi
@ 2020-09-10 12:41 ` Peter Ujfalusi
-1 siblings, 0 replies; 8+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 12:41 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: alsa-devel, devicetree, linux-kernel
When j7200 SOM is attached to the CPB we only have parent clock for 48KHz
family and the rate of the parent clock is 2359296000Hz.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
sound/soc/ti/j721e-evm.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c
index cb074af47a7d..29b73303f3fc 100644
--- a/sound/soc/ti/j721e-evm.c
+++ b/sound/soc/ti/j721e-evm.c
@@ -525,6 +525,14 @@ static const struct j721e_audio_match_data j721e_cpb_ivi_data = {
},
};
+static const struct j721e_audio_match_data j7200_cpb_data = {
+ .board_type = J721E_BOARD_CPB,
+ .num_links = 2, /* CPB pcm3168a */
+ .pll_rates = {
+ [J721E_CLK_PARENT_48000] = 2359296000u, /* PLL4 */
+ },
+};
+
static const struct of_device_id j721e_audio_of_match[] = {
{
.compatible = "ti,j721e-cpb-audio",
@@ -532,6 +540,9 @@ static const struct of_device_id j721e_audio_of_match[] = {
}, {
.compatible = "ti,j721e-cpb-ivi-audio",
.data = &j721e_cpb_ivi_data,
+ }, {
+ .compatible = "ti,j7200-cpb-audio",
+ .data = &j7200_cpb_data,
},
{ },
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio
@ 2020-09-10 12:41 ` Peter Ujfalusi
0 siblings, 0 replies; 8+ messages in thread
From: Peter Ujfalusi @ 2020-09-10 12:41 UTC (permalink / raw)
To: broonie, lgirdwood, robh+dt; +Cc: devicetree, alsa-devel, linux-kernel
When j7200 SOM is attached to the CPB we only have parent clock for 48KHz
family and the rate of the parent clock is 2359296000Hz.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
sound/soc/ti/j721e-evm.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c
index cb074af47a7d..29b73303f3fc 100644
--- a/sound/soc/ti/j721e-evm.c
+++ b/sound/soc/ti/j721e-evm.c
@@ -525,6 +525,14 @@ static const struct j721e_audio_match_data j721e_cpb_ivi_data = {
},
};
+static const struct j721e_audio_match_data j7200_cpb_data = {
+ .board_type = J721E_BOARD_CPB,
+ .num_links = 2, /* CPB pcm3168a */
+ .pll_rates = {
+ [J721E_CLK_PARENT_48000] = 2359296000u, /* PLL4 */
+ },
+};
+
static const struct of_device_id j721e_audio_of_match[] = {
{
.compatible = "ti,j721e-cpb-audio",
@@ -532,6 +540,9 @@ static const struct of_device_id j721e_audio_of_match[] = {
}, {
.compatible = "ti,j721e-cpb-ivi-audio",
.data = &j721e_cpb_ivi_data,
+ }, {
+ .compatible = "ti,j7200-cpb-audio",
+ .data = &j7200_cpb_data,
},
{ },
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/2] ASoC: ti: j721e-evm: Support for j7200 variant
2020-09-10 12:41 ` Peter Ujfalusi
@ 2020-09-14 14:51 ` Mark Brown
-1 siblings, 0 replies; 8+ messages in thread
From: Mark Brown @ 2020-09-14 14:51 UTC (permalink / raw)
To: robh+dt, Peter Ujfalusi, lgirdwood; +Cc: devicetree, linux-kernel, alsa-devel
On Thu, 10 Sep 2020 15:41:08 +0300, Peter Ujfalusi wrote:
> Changes since v1:
> - Suffix the 2359296000 constant with 'u' to silence C90 warning
>
> When j7200 SOM is connected to the CPB, the audio setup is a bit different:
> Only 48KHz family have clock path, 44.1KHz is not supported.
>
> Update the binding documentation and add support for the j7200 version of CPB
> to the driver.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/2] ASoC: dt-bindings: ti, j721e-cpb-audio: Document support for j7200-cpb
commit: 18790b1b514a202bae2863a4206b731d95302c85
[2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio
commit: 18c140f4a2de8fa674d52fe522a47133bc124f81
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/2] ASoC: ti: j721e-evm: Support for j7200 variant
@ 2020-09-14 14:51 ` Mark Brown
0 siblings, 0 replies; 8+ messages in thread
From: Mark Brown @ 2020-09-14 14:51 UTC (permalink / raw)
To: robh+dt, Peter Ujfalusi, lgirdwood; +Cc: devicetree, alsa-devel, linux-kernel
On Thu, 10 Sep 2020 15:41:08 +0300, Peter Ujfalusi wrote:
> Changes since v1:
> - Suffix the 2359296000 constant with 'u' to silence C90 warning
>
> When j7200 SOM is connected to the CPB, the audio setup is a bit different:
> Only 48KHz family have clock path, 44.1KHz is not supported.
>
> Update the binding documentation and add support for the j7200 version of CPB
> to the driver.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/2] ASoC: dt-bindings: ti, j721e-cpb-audio: Document support for j7200-cpb
commit: 18790b1b514a202bae2863a4206b731d95302c85
[2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio
commit: 18c140f4a2de8fa674d52fe522a47133bc124f81
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-09-14 14:57 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-10 12:41 [PATCH v2 0/2] ASoC: ti: j721e-evm: Support for j7200 variant Peter Ujfalusi
2020-09-10 12:41 ` Peter Ujfalusi
2020-09-10 12:41 ` [PATCH v2 1/2] ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb Peter Ujfalusi
2020-09-10 12:41 ` [PATCH v2 1/2] ASoC: dt-bindings: ti, j721e-cpb-audio: " Peter Ujfalusi
2020-09-10 12:41 ` [PATCH v2 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio Peter Ujfalusi
2020-09-10 12:41 ` Peter Ujfalusi
2020-09-14 14:51 ` [PATCH v2 0/2] ASoC: ti: j721e-evm: Support for j7200 variant Mark Brown
2020-09-14 14:51 ` Mark Brown
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