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* [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B
@ 2020-09-02 10:28 Atte Tommiska
  2020-09-02 10:28 ` [PATCH v3 1/3] dt-bindings: vendor-prefixes: Add Xiphera vendor prefix Atte Tommiska
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Atte Tommiska @ 2020-09-02 10:28 UTC (permalink / raw)
  To: Matt Mackall, Herbert Xu, Rob Herring, Arnd Bergmann,
	Greg Kroah-Hartman, linux-crypto, devicetree, linux-kernel
  Cc: Atte Tommiska

This patchset introduces a linux driver for Xiphera's XIP8001B IP.
The IP is an FPGA-based TRNG which can be used in various FPGA families.
The IP is in use in multiple customer projects and in Xiphera's own products.

changes in v2: 
  - fixed the 'make dt_binding_check' errors in the devicetree schema.

changes in v3: 
  - added Rob's tags to the first and second patch
  - fixed a typo in the subject line of the second patch
  - removed a redundant line of code from the driver in the third patch

Atte Tommiska (3):
  dt-bindings: vendor-prefixes: Add Xiphera vendor prefix
  dt-bindings: rng: add bindings for Xiphera XIP8001B hwrng
  hwrng: xiphera-trng: add support for XIP8001B hwrng

 .../bindings/rng/xiphera,xip8001b-trng.yaml   |  33 ++++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 drivers/char/hw_random/Kconfig                |  10 ++
 drivers/char/hw_random/Makefile               |   1 +
 drivers/char/hw_random/xiphera-trng.c         | 150 ++++++++++++++++++
 5 files changed, 196 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml
 create mode 100644 drivers/char/hw_random/xiphera-trng.c


base-commit: 4c6491a343e91a5a2a699b0b545f8ba1ec1e8c65
-- 
2.28.0


^ permalink raw reply	[flat|nested] 6+ messages in thread
* [PATCH v3 1/3] dt-bindings: vendor-prefixes: Add Xiphera vendor prefix
  2020-09-02 10:28 [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B Atte Tommiska
@ 2020-09-02 10:28 ` Atte Tommiska
  2020-09-02 10:28 ` [PATCH v3 2/3] dt-bindings: rng: add bindings for Xiphera XIP8001B hwrng Atte Tommiska
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Atte Tommiska @ 2020-09-02 10:28 UTC (permalink / raw)
  To: Matt Mackall, Herbert Xu, Rob Herring, Arnd Bergmann,
	Greg Kroah-Hartman, linux-crypto, devicetree, linux-kernel
  Cc: Atte Tommiska

Xiphera is an FPGA-based cryptographic solutions provider based in
Finland.
Website of the company: https://xiphera.com/

Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 2baee2c817c1..28ae913682b5 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1174,6 +1174,8 @@ patternProperties:
     description: Shenzhen Xingbangda Display Technology Co., Ltd
   "^xinpeng,.*":
     description: Shenzhen Xinpeng Technology Co., Ltd
+  "^xiphera,.*":
+    description: Xiphera Ltd.
   "^xlnx,.*":
     description: Xilinx
   "^xnano,.*":
-- 
2.28.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH v3 2/3] dt-bindings: rng: add bindings for Xiphera XIP8001B hwrng
  2020-09-02 10:28 [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B Atte Tommiska
  2020-09-02 10:28 ` [PATCH v3 1/3] dt-bindings: vendor-prefixes: Add Xiphera vendor prefix Atte Tommiska
@ 2020-09-02 10:28 ` Atte Tommiska
  2020-09-02 10:28 ` [PATCH v3 3/3] hwrng: xiphera-trng: add support for " Atte Tommiska
  2020-09-11  6:58 ` [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B Herbert Xu
  3 siblings, 0 replies; 6+ messages in thread
From: Atte Tommiska @ 2020-09-02 10:28 UTC (permalink / raw)
  To: Matt Mackall, Herbert Xu, Rob Herring, Arnd Bergmann,
	Greg Kroah-Hartman, linux-crypto, devicetree, linux-kernel
  Cc: Atte Tommiska

Document the device tree bindings of Xiphera's XIP8001B-trng IP.

Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 .../bindings/rng/xiphera,xip8001b-trng.yaml   | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml

diff --git a/Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml b/Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml
new file mode 100644
index 000000000000..1e17e55762f1
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rng/xiphera,xip8001b-trng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xiphera XIP8001B-trng bindings
+
+maintainers:
+  - Atte Tommiska <atte.tommiska@xiphera.com>
+
+description: |
+  Xiphera FPGA-based true random number generator intellectual property core.
+
+properties:
+  compatible:
+    const: xiphera,xip8001b-trng
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    rng@43c00000 {
+        compatible = "xiphera,xip8001b-trng";
+        reg = <0x43c00000 0x10000>;
+    };
-- 
2.28.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH v3 3/3] hwrng: xiphera-trng: add support for XIP8001B hwrng
  2020-09-02 10:28 [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B Atte Tommiska
  2020-09-02 10:28 ` [PATCH v3 1/3] dt-bindings: vendor-prefixes: Add Xiphera vendor prefix Atte Tommiska
  2020-09-02 10:28 ` [PATCH v3 2/3] dt-bindings: rng: add bindings for Xiphera XIP8001B hwrng Atte Tommiska
@ 2020-09-02 10:28 ` Atte Tommiska
  2020-09-11  4:37   ` Herbert Xu
  2020-09-11  6:58 ` [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B Herbert Xu
  3 siblings, 1 reply; 6+ messages in thread
From: Atte Tommiska @ 2020-09-02 10:28 UTC (permalink / raw)
  To: Matt Mackall, Herbert Xu, Rob Herring, Arnd Bergmann,
	Greg Kroah-Hartman, linux-crypto, devicetree, linux-kernel
  Cc: Atte Tommiska

Xiphera XIP8001B is an FPGA-based True Random Number Generator
Intellectual Property (IP) Core which can be instantiated in
multiple FPGA families. This driver adds Linux support for it through
the hwrng interface.

Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com>
Reported-by: kernel test robot <lkp@intel.com>
---
 drivers/char/hw_random/Kconfig        |  10 ++
 drivers/char/hw_random/Makefile       |   1 +
 drivers/char/hw_random/xiphera-trng.c | 150 ++++++++++++++++++++++++++
 3 files changed, 161 insertions(+)
 create mode 100644 drivers/char/hw_random/xiphera-trng.c

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index f976a49e1fb5..007d765a9253 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -512,6 +512,16 @@ config HW_RANDOM_CCTRNG
 	  will be called cctrng.
 	  If unsure, say 'N'.
 
+config HW_RANDOM_XIPHERA
+	tristate "Xiphera FPGA based True Random Number Generator support"
+	depends on HAS_IOMEM
+	help
+	  This driver provides kernel-side support for Xiphera True Random
+	  Number Generator Intellectual Property Core.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called xiphera-trng.
+
 endif # HW_RANDOM
 
 config UML_RANDOM
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 26ae06844f09..dfdcac81e384 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -44,3 +44,4 @@ obj-$(CONFIG_HW_RANDOM_KEYSTONE) += ks-sa-rng.o
 obj-$(CONFIG_HW_RANDOM_OPTEE) += optee-rng.o
 obj-$(CONFIG_HW_RANDOM_NPCM) += npcm-rng.o
 obj-$(CONFIG_HW_RANDOM_CCTRNG) += cctrng.o
+obj-$(CONFIG_HW_RANDOM_XIPHERA) += xiphera-trng.o
diff --git a/drivers/char/hw_random/xiphera-trng.c b/drivers/char/hw_random/xiphera-trng.c
new file mode 100644
index 000000000000..7bdab8c8a6a8
--- /dev/null
+++ b/drivers/char/hw_random/xiphera-trng.c
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright (C) 2020 Xiphera Ltd. */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mod_devicetable.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/hw_random.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+
+#define CONTROL_REG			0x00000000
+#define STATUS_REG			0x00000004
+#define RAND_REG			0x00000000
+
+#define HOST_TO_TRNG_RESET		0x00000001
+#define HOST_TO_TRNG_RELEASE_RESET	0x00000002
+#define HOST_TO_TRNG_ENABLE		0x80000000
+#define HOST_TO_TRNG_ZEROIZE		0x80000004
+#define HOST_TO_TRNG_ACK_ZEROIZE	0x80000008
+#define HOST_TO_TRNG_READ		0x8000000F
+
+/* trng statuses */
+#define TRNG_ACK_RESET			0x000000AC
+#define TRNG_SUCCESSFUL_STARTUP		0x00000057
+#define TRNG_FAILED_STARTUP		0x000000FA
+#define TRNG_NEW_RAND_AVAILABLE		0x000000ED
+
+struct xiphera_trng {
+	void __iomem *mem;
+	struct hwrng rng;
+};
+
+static int xiphera_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
+{
+	struct xiphera_trng *trng = container_of(rng, struct xiphera_trng, rng);
+	int ret = 0;
+
+	while (max >= sizeof(u32)) {
+		/* check for data */
+		if (readl(trng->mem + STATUS_REG) == TRNG_NEW_RAND_AVAILABLE) {
+			*(u32 *)buf = readl(trng->mem + RAND_REG);
+			/*
+			 * Inform the trng of the read
+			 * and re-enable it to produce a new random number
+			 */
+			writel(HOST_TO_TRNG_READ, trng->mem + CONTROL_REG);
+			writel(HOST_TO_TRNG_ENABLE, trng->mem + CONTROL_REG);
+			ret += sizeof(u32);
+			buf += sizeof(u32);
+			max -= sizeof(u32);
+		} else {
+			break;
+		}
+	}
+	return ret;
+}
+
+static int xiphera_trng_probe(struct platform_device *pdev)
+{
+	int ret;
+	struct xiphera_trng *trng;
+	struct device *dev = &pdev->dev;
+	struct resource *res;
+
+	trng = devm_kzalloc(dev, sizeof(*trng), GFP_KERNEL);
+	if (!trng)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	trng->mem = devm_ioremap_resource(dev, res);
+	if (IS_ERR(trng->mem))
+		return PTR_ERR(trng->mem);
+
+	/*
+	 * the trng needs to be reset first which might not happen in time,
+	 * hence we incorporate a small delay to ensure proper behaviour
+	 */
+	writel(HOST_TO_TRNG_RESET, trng->mem + CONTROL_REG);
+	usleep_range(100, 200);
+
+	if (readl(trng->mem + STATUS_REG) != TRNG_ACK_RESET) {
+		/*
+		 * there is a small chance the trng is just not ready yet,
+		 * so we try one more time. If the second time fails, we give up
+		 */
+		usleep_range(100, 200);
+		if (readl(trng->mem + STATUS_REG) != TRNG_ACK_RESET) {
+			dev_err(dev, "failed to reset the trng ip\n");
+			return -ENODEV;
+		}
+	}
+
+	/*
+	 * once again, to ensure proper behaviour we sleep
+	 * for a while after zeroizing the trng
+	 */
+	writel(HOST_TO_TRNG_RELEASE_RESET, trng->mem + CONTROL_REG);
+	writel(HOST_TO_TRNG_ENABLE, trng->mem + CONTROL_REG);
+	writel(HOST_TO_TRNG_ZEROIZE, trng->mem + CONTROL_REG);
+	msleep(20);
+
+	if (readl(trng->mem + STATUS_REG) != TRNG_SUCCESSFUL_STARTUP) {
+		/* diagnose the reason for the failure */
+		if (readl(trng->mem + STATUS_REG) == TRNG_FAILED_STARTUP) {
+			dev_err(dev, "trng ip startup-tests failed\n");
+			return -ENODEV;
+		}
+		dev_err(dev, "startup-tests yielded no response\n");
+		return -ENODEV;
+	}
+
+	writel(HOST_TO_TRNG_ACK_ZEROIZE, trng->mem + CONTROL_REG);
+
+	trng->rng.name = pdev->name;
+	trng->rng.read = xiphera_trng_read;
+	trng->rng.quality = 900;
+
+	ret = devm_hwrng_register(dev, &trng->rng);
+	if (ret) {
+		dev_err(dev, "failed to register rng device: %d\n", ret);
+		return ret;
+	}
+
+	platform_set_drvdata(pdev, trng);
+
+	return 0;
+}
+
+static const struct of_device_id xiphera_trng_of_match[] = {
+	{ .compatible = "xiphera,xip8001b-trng", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, xiphera_trng_of_match);
+
+static struct platform_driver xiphera_trng_driver = {
+	.driver = {
+		.name = "xiphera-trng",
+		.of_match_table	= xiphera_trng_of_match,
+	},
+	.probe = xiphera_trng_probe,
+};
+
+module_platform_driver(xiphera_trng_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Atte Tommiska");
+MODULE_DESCRIPTION("Xiphera FPGA-based true random number generator driver");
-- 
2.28.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH v3 3/3] hwrng: xiphera-trng: add support for XIP8001B hwrng
  2020-09-02 10:28 ` [PATCH v3 3/3] hwrng: xiphera-trng: add support for " Atte Tommiska
@ 2020-09-11  4:37   ` Herbert Xu
  0 siblings, 0 replies; 6+ messages in thread
From: Herbert Xu @ 2020-09-11  4:37 UTC (permalink / raw)
  To: Atte Tommiska
  Cc: Matt Mackall, Rob Herring, Arnd Bergmann, Greg Kroah-Hartman,
	linux-crypto, devicetree, linux-kernel

On Wed, Sep 02, 2020 at 01:28:17PM +0300, Atte Tommiska wrote:
> Xiphera XIP8001B is an FPGA-based True Random Number Generator
> Intellectual Property (IP) Core which can be instantiated in
> multiple FPGA families. This driver adds Linux support for it through
> the hwrng interface.
> 
> Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com>
> Reported-by: kernel test robot <lkp@intel.com>

This Reported-by appears to be superfluous and I'll remove it
when applying.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B
  2020-09-02 10:28 [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B Atte Tommiska
                   ` (2 preceding siblings ...)
  2020-09-02 10:28 ` [PATCH v3 3/3] hwrng: xiphera-trng: add support for " Atte Tommiska
@ 2020-09-11  6:58 ` Herbert Xu
  3 siblings, 0 replies; 6+ messages in thread
From: Herbert Xu @ 2020-09-11  6:58 UTC (permalink / raw)
  To: Atte Tommiska
  Cc: Matt Mackall, Rob Herring, Arnd Bergmann, Greg Kroah-Hartman,
	linux-crypto, devicetree, linux-kernel

On Wed, Sep 02, 2020 at 01:28:14PM +0300, Atte Tommiska wrote:
> This patchset introduces a linux driver for Xiphera's XIP8001B IP.
> The IP is an FPGA-based TRNG which can be used in various FPGA families.
> The IP is in use in multiple customer projects and in Xiphera's own products.
> 
> changes in v2: 
>   - fixed the 'make dt_binding_check' errors in the devicetree schema.
> 
> changes in v3: 
>   - added Rob's tags to the first and second patch
>   - fixed a typo in the subject line of the second patch
>   - removed a redundant line of code from the driver in the third patch
> 
> Atte Tommiska (3):
>   dt-bindings: vendor-prefixes: Add Xiphera vendor prefix
>   dt-bindings: rng: add bindings for Xiphera XIP8001B hwrng
>   hwrng: xiphera-trng: add support for XIP8001B hwrng
> 
>  .../bindings/rng/xiphera,xip8001b-trng.yaml   |  33 ++++
>  .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
>  drivers/char/hw_random/Kconfig                |  10 ++
>  drivers/char/hw_random/Makefile               |   1 +
>  drivers/char/hw_random/xiphera-trng.c         | 150 ++++++++++++++++++
>  5 files changed, 196 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml
>  create mode 100644 drivers/char/hw_random/xiphera-trng.c

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-09-11  6:58 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-02 10:28 [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B Atte Tommiska
2020-09-02 10:28 ` [PATCH v3 1/3] dt-bindings: vendor-prefixes: Add Xiphera vendor prefix Atte Tommiska
2020-09-02 10:28 ` [PATCH v3 2/3] dt-bindings: rng: add bindings for Xiphera XIP8001B hwrng Atte Tommiska
2020-09-02 10:28 ` [PATCH v3 3/3] hwrng: xiphera-trng: add support for " Atte Tommiska
2020-09-11  4:37   ` Herbert Xu
2020-09-11  6:58 ` [PATCH v3 0/3] hwrng: add support for Xiphera XIP8001B Herbert Xu

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