From: Michael Walle <michael@walle.cc> To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: "Linus Walleij" <linus.walleij@linaro.org>, "Bartosz Golaszewski" <bgolaszewski@baylibre.com>, "Rob Herring" <robh+dt@kernel.org>, "Jean Delvare" <jdelvare@suse.com>, "Guenter Roeck" <linux@roeck-us.net>, "Lee Jones" <lee.jones@linaro.org>, "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Wim Van Sebroeck" <wim@linux-watchdog.org>, "Shawn Guo" <shawnguo@kernel.org>, "Li Yang" <leoyang.li@nxp.com>, "Thomas Gleixner" <tglx@linutronix.de>, "Jason Cooper" <jason@lakedaemon.net>, "Marc Zyngier" <maz@kernel.org>, "Mark Brown" <broonie@kernel.org>, "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>, "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>, "Catalin Marinas" <catalin.marinas@arm.com>, "Will Deacon" <will@kernel.org>, "Pavel Machek" <pavel@ucw.cz>, "Michael Walle" <michael@walle.cc> Subject: [PATCH v10 04/13] irqchip: add sl28cpld interrupt controller support Date: Mon, 14 Sep 2020 23:43:32 +0200 [thread overview] Message-ID: <20200914214341.14268-5-michael@walle.cc> (raw) In-Reply-To: <20200914214341.14268-1-michael@walle.cc> Add support for the interrupt controller inside the sl28 CPLD management controller. The interrupt controller can handle at most 8 interrupts and is really simplistic and consists only of an interrupt mask and an interrupt pending register. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Marc Zyngier <maz@kernel.org> --- Changes since v9: - none Changes since v8: - none Changes since v7: - added "depends on MFD_SL28CPLD=y || COMPILE_TEST" Changes since v6: - none Changes since v5: - none Changes since v4: - update copyright year - don't use "int irq" instead of "unsigne int irq", because platform_get_irq() might return a negative error code. Found by "kernel test robot <lkp@intel.com> - remove comma in terminator line of the compatible strings list, suggested by Andy - use newer devm_regmap_add_irq_chip_fwnode() - don't use KBUID_MODNAME, suggested by Andy - remove the platform device table Changes since v3: - see cover letter drivers/irqchip/Kconfig | 8 +++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sl28cpld.c | 96 ++++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) create mode 100644 drivers/irqchip/irq-sl28cpld.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index cdb769383a50..ca7630543a8a 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -246,6 +246,14 @@ config RENESAS_RZA1_IRQC Enable support for the Renesas RZ/A1 Interrupt Controller, to use up to 8 external interrupts with configurable sense select. +config SL28CPLD_INTC + bool "Kontron sl28cpld IRQ controller" + depends on MFD_SL28CPLD=y || COMPILE_TEST + select REGMAP_IRQ + help + Interrupt controller driver for the board management controller + found on the Kontron sl28 CPLD. + config ST_IRQCHIP bool select REGMAP diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 8c983ad774f6..db5e37d2db11 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -110,3 +110,4 @@ obj-$(CONFIG_LOONGSON_HTPIC) += irq-loongson-htpic.o obj-$(CONFIG_LOONGSON_HTVEC) += irq-loongson-htvec.o obj-$(CONFIG_LOONGSON_PCH_PIC) += irq-loongson-pch-pic.o obj-$(CONFIG_LOONGSON_PCH_MSI) += irq-loongson-pch-msi.o +obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o diff --git a/drivers/irqchip/irq-sl28cpld.c b/drivers/irqchip/irq-sl28cpld.c new file mode 100644 index 000000000000..0aa50d025ef6 --- /dev/null +++ b/drivers/irqchip/irq-sl28cpld.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld interrupt controller driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/property.h> +#include <linux/regmap.h> + +#define INTC_IE 0x00 +#define INTC_IP 0x01 + +static const struct regmap_irq sl28cpld_irqs[] = { + REGMAP_IRQ_REG_LINE(0, 8), + REGMAP_IRQ_REG_LINE(1, 8), + REGMAP_IRQ_REG_LINE(2, 8), + REGMAP_IRQ_REG_LINE(3, 8), + REGMAP_IRQ_REG_LINE(4, 8), + REGMAP_IRQ_REG_LINE(5, 8), + REGMAP_IRQ_REG_LINE(6, 8), + REGMAP_IRQ_REG_LINE(7, 8), +}; + +struct sl28cpld_intc { + struct regmap *regmap; + struct regmap_irq_chip chip; + struct regmap_irq_chip_data *irq_data; +}; + +static int sl28cpld_intc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct sl28cpld_intc *irqchip; + int irq; + u32 base; + int ret; + + if (!dev->parent) + return -ENODEV; + + irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL); + if (!irqchip) + return -ENOMEM; + + irqchip->regmap = dev_get_regmap(dev->parent, NULL); + if (!irqchip->regmap) + return -ENODEV; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return -EINVAL; + + irqchip->chip.name = "sl28cpld-intc"; + irqchip->chip.irqs = sl28cpld_irqs; + irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs); + irqchip->chip.num_regs = 1; + irqchip->chip.status_base = base + INTC_IP; + irqchip->chip.mask_base = base + INTC_IE; + irqchip->chip.mask_invert = true, + irqchip->chip.ack_base = base + INTC_IP; + + return devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev), + irqchip->regmap, irq, + IRQF_SHARED | IRQF_ONESHOT, 0, + &irqchip->chip, + &irqchip->irq_data); +} + +static const struct of_device_id sl28cpld_intc_of_match[] = { + { .compatible = "kontron,sl28cpld-intc" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_intc_of_match); + +static struct platform_driver sl28cpld_intc_driver = { + .probe = sl28cpld_intc_probe, + .driver = { + .name = "sl28cpld-intc", + .of_match_table = sl28cpld_intc_of_match, + } +}; +module_platform_driver(sl28cpld_intc_driver); + +MODULE_DESCRIPTION("sl28cpld Interrupt Controller Driver"); +MODULE_AUTHOR("Michael Walle <michael@walle.cc>"); +MODULE_LICENSE("GPL"); -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Michael Walle <michael@walle.cc> To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: "Marc Zyngier" <maz@kernel.org>, "Jean Delvare" <jdelvare@suse.com>, "Catalin Marinas" <catalin.marinas@arm.com>, "Jason Cooper" <jason@lakedaemon.net>, "Will Deacon" <will@kernel.org>, "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>, "Shawn Guo" <shawnguo@kernel.org>, "Linus Walleij" <linus.walleij@linaro.org>, "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>, "Li Yang" <leoyang.li@nxp.com>, "Bartosz Golaszewski" <bgolaszewski@baylibre.com>, "Michael Walle" <michael@walle.cc>, "Rob Herring" <robh+dt@kernel.org>, "Thierry Reding" <thierry.reding@gmail.com>, "Mark Brown" <broonie@kernel.org>, "Pavel Machek" <pavel@ucw.cz>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Thomas Gleixner" <tglx@linutronix.de>, "Wim Van Sebroeck" <wim@linux-watchdog.org>, "Lee Jones" <lee.jones@linaro.org>, "Guenter Roeck" <linux@roeck-us.net> Subject: [PATCH v10 04/13] irqchip: add sl28cpld interrupt controller support Date: Mon, 14 Sep 2020 23:43:32 +0200 [thread overview] Message-ID: <20200914214341.14268-5-michael@walle.cc> (raw) In-Reply-To: <20200914214341.14268-1-michael@walle.cc> Add support for the interrupt controller inside the sl28 CPLD management controller. The interrupt controller can handle at most 8 interrupts and is really simplistic and consists only of an interrupt mask and an interrupt pending register. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Marc Zyngier <maz@kernel.org> --- Changes since v9: - none Changes since v8: - none Changes since v7: - added "depends on MFD_SL28CPLD=y || COMPILE_TEST" Changes since v6: - none Changes since v5: - none Changes since v4: - update copyright year - don't use "int irq" instead of "unsigne int irq", because platform_get_irq() might return a negative error code. Found by "kernel test robot <lkp@intel.com> - remove comma in terminator line of the compatible strings list, suggested by Andy - use newer devm_regmap_add_irq_chip_fwnode() - don't use KBUID_MODNAME, suggested by Andy - remove the platform device table Changes since v3: - see cover letter drivers/irqchip/Kconfig | 8 +++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sl28cpld.c | 96 ++++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) create mode 100644 drivers/irqchip/irq-sl28cpld.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index cdb769383a50..ca7630543a8a 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -246,6 +246,14 @@ config RENESAS_RZA1_IRQC Enable support for the Renesas RZ/A1 Interrupt Controller, to use up to 8 external interrupts with configurable sense select. +config SL28CPLD_INTC + bool "Kontron sl28cpld IRQ controller" + depends on MFD_SL28CPLD=y || COMPILE_TEST + select REGMAP_IRQ + help + Interrupt controller driver for the board management controller + found on the Kontron sl28 CPLD. + config ST_IRQCHIP bool select REGMAP diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 8c983ad774f6..db5e37d2db11 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -110,3 +110,4 @@ obj-$(CONFIG_LOONGSON_HTPIC) += irq-loongson-htpic.o obj-$(CONFIG_LOONGSON_HTVEC) += irq-loongson-htvec.o obj-$(CONFIG_LOONGSON_PCH_PIC) += irq-loongson-pch-pic.o obj-$(CONFIG_LOONGSON_PCH_MSI) += irq-loongson-pch-msi.o +obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o diff --git a/drivers/irqchip/irq-sl28cpld.c b/drivers/irqchip/irq-sl28cpld.c new file mode 100644 index 000000000000..0aa50d025ef6 --- /dev/null +++ b/drivers/irqchip/irq-sl28cpld.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld interrupt controller driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/property.h> +#include <linux/regmap.h> + +#define INTC_IE 0x00 +#define INTC_IP 0x01 + +static const struct regmap_irq sl28cpld_irqs[] = { + REGMAP_IRQ_REG_LINE(0, 8), + REGMAP_IRQ_REG_LINE(1, 8), + REGMAP_IRQ_REG_LINE(2, 8), + REGMAP_IRQ_REG_LINE(3, 8), + REGMAP_IRQ_REG_LINE(4, 8), + REGMAP_IRQ_REG_LINE(5, 8), + REGMAP_IRQ_REG_LINE(6, 8), + REGMAP_IRQ_REG_LINE(7, 8), +}; + +struct sl28cpld_intc { + struct regmap *regmap; + struct regmap_irq_chip chip; + struct regmap_irq_chip_data *irq_data; +}; + +static int sl28cpld_intc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct sl28cpld_intc *irqchip; + int irq; + u32 base; + int ret; + + if (!dev->parent) + return -ENODEV; + + irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL); + if (!irqchip) + return -ENOMEM; + + irqchip->regmap = dev_get_regmap(dev->parent, NULL); + if (!irqchip->regmap) + return -ENODEV; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return -EINVAL; + + irqchip->chip.name = "sl28cpld-intc"; + irqchip->chip.irqs = sl28cpld_irqs; + irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs); + irqchip->chip.num_regs = 1; + irqchip->chip.status_base = base + INTC_IP; + irqchip->chip.mask_base = base + INTC_IE; + irqchip->chip.mask_invert = true, + irqchip->chip.ack_base = base + INTC_IP; + + return devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev), + irqchip->regmap, irq, + IRQF_SHARED | IRQF_ONESHOT, 0, + &irqchip->chip, + &irqchip->irq_data); +} + +static const struct of_device_id sl28cpld_intc_of_match[] = { + { .compatible = "kontron,sl28cpld-intc" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_intc_of_match); + +static struct platform_driver sl28cpld_intc_driver = { + .probe = sl28cpld_intc_probe, + .driver = { + .name = "sl28cpld-intc", + .of_match_table = sl28cpld_intc_of_match, + } +}; +module_platform_driver(sl28cpld_intc_driver); + +MODULE_DESCRIPTION("sl28cpld Interrupt Controller Driver"); +MODULE_AUTHOR("Michael Walle <michael@walle.cc>"); +MODULE_LICENSE("GPL"); -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-14 21:46 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-14 21:43 [PATCH v10 00/13] Add support for Kontron sl28cpld Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 01/13] mfd: add simple regmap based I2C driver Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 02/13] dt-bindings: mfd: Add bindings for sl28cpld Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 03/13] mfd: simple-mfd-i2c: add sl28cpld support Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` Michael Walle [this message] 2020-09-14 21:43 ` [PATCH v10 04/13] irqchip: add sl28cpld interrupt controller support Michael Walle 2020-09-14 21:43 ` [PATCH v10 05/13] watchdog: add support for sl28cpld watchdog Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 06/13] pwm: add support for sl28cpld PWM controller Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-15 9:06 ` Lee Jones 2020-09-15 9:06 ` Lee Jones 2020-09-15 21:03 ` Uwe Kleine-König 2020-09-15 21:03 ` Uwe Kleine-König 2020-09-14 21:43 ` [PATCH v10 07/13] gpio: add support for the sl28cpld GPIO controller Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 08/13] hwmon: add support for the sl28cpld hardware monitoring controller Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 09/13] arm64: dts: freescale: sl28: enable sl28cpld Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 10/13] arm64: dts: freescale: sl28: map GPIOs to input events Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 11/13] arm64: dts: freescale: sl28: enable LED support Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-22 2:59 ` Shawn Guo 2020-09-22 2:59 ` Shawn Guo 2020-09-14 21:43 ` [PATCH v10 12/13] arm64: dts: freescale: sl28: enable fan support Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:43 ` [PATCH v10 13/13] arm64: defconfig: enable the sl28cpld board management controller Michael Walle 2020-09-14 21:43 ` Michael Walle 2020-09-14 21:50 ` [PATCH v10 00/13] Add support for Kontron sl28cpld Michael Walle 2020-09-14 21:50 ` Michael Walle 2020-09-17 19:25 ` [GIT PULL] Immutable branch between MFD, HWMON, GPIO, IRQChip, PWM and Watchdog due for the v5.10 merge window Lee Jones 2020-09-17 19:25 ` Lee Jones
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