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* Re: [PATCH net-next v4 1/2] net: phy: dp83869: support Wake on LAN
@ 2020-09-25 12:17 kernel test robot
  0 siblings, 0 replies; 3+ messages in thread
From: kernel test robot @ 2020-09-25 12:17 UTC (permalink / raw)
  To: kbuild

[-- Attachment #1: Type: text/plain, Size: 12800 bytes --]

CC: kbuild-all(a)lists.01.org
In-Reply-To: <20200924162707.14093-2-dmurphy@ti.com>
References: <20200924162707.14093-2-dmurphy@ti.com>
TO: Dan Murphy <dmurphy@ti.com>
TO: davem(a)davemloft.net
TO: andrew(a)lunn.ch
TO: f.fainelli(a)gmail.com
TO: hkallweit1(a)gmail.com
CC: mkubecek(a)suse.cz
CC: netdev(a)vger.kernel.org
CC: linux-kernel(a)vger.kernel.org
CC: Dan Murphy <dmurphy@ti.com>

Hi Dan,

I love your patch! Perhaps something to improve:

[auto build test WARNING on net-next/master]

url:    https://github.com/0day-ci/linux/commits/Dan-Murphy/DP83869-WoL-and-Speed-optimization/20200925-002844
base:   https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 3fc826f121d89c5aa4afd7b3408b07e0ff59466b
:::::: branch date: 20 hours ago
:::::: commit date: 20 hours ago
config: x86_64-randconfig-m001-20200925 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>

New smatch warnings:
drivers/net/phy/dp83869.c:205 dp83869_set_wol() warn: impossible condition '(val_rxcfg < 0) => (0-u16max < 0)'
drivers/net/phy/dp83869.c:209 dp83869_set_wol() warn: impossible condition '(val_micr < 0) => (0-u16max < 0)'
drivers/net/phy/dp83869.c:301 dp83869_get_wol() warn: impossible condition '(value < 0) => (0-u16max < 0)'
drivers/net/phy/dp83869.c:318 dp83869_get_wol() warn: impossible condition '(sopass_val < 0) => (0-u16max < 0)'

Old smatch warnings:
drivers/net/phy/dp83869.c:328 dp83869_get_wol() warn: impossible condition '(sopass_val < 0) => (0-u16max < 0)'
drivers/net/phy/dp83869.c:338 dp83869_get_wol() warn: impossible condition '(sopass_val < 0) => (0-u16max < 0)'

vim +205 drivers/net/phy/dp83869.c

01db923e83779bf Dan Murphy 2019-11-13  195  
cfd39675171ca5b Dan Murphy 2020-09-24  196  static int dp83869_set_wol(struct phy_device *phydev,
cfd39675171ca5b Dan Murphy 2020-09-24  197  			   struct ethtool_wolinfo *wol)
cfd39675171ca5b Dan Murphy 2020-09-24  198  {
cfd39675171ca5b Dan Murphy 2020-09-24  199  	struct net_device *ndev = phydev->attached_dev;
cfd39675171ca5b Dan Murphy 2020-09-24  200  	u16 val_rxcfg, val_micr;
cfd39675171ca5b Dan Murphy 2020-09-24  201  	u8 *mac;
cfd39675171ca5b Dan Murphy 2020-09-24  202  	int ret;
cfd39675171ca5b Dan Murphy 2020-09-24  203  
cfd39675171ca5b Dan Murphy 2020-09-24  204  	val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
cfd39675171ca5b Dan Murphy 2020-09-24 @205  	if (val_rxcfg < 0)
cfd39675171ca5b Dan Murphy 2020-09-24  206  		return val_rxcfg;
cfd39675171ca5b Dan Murphy 2020-09-24  207  
cfd39675171ca5b Dan Murphy 2020-09-24  208  	val_micr = phy_read(phydev, MII_DP83869_MICR);
cfd39675171ca5b Dan Murphy 2020-09-24 @209  	if (val_micr < 0)
cfd39675171ca5b Dan Murphy 2020-09-24  210  		return val_micr;
cfd39675171ca5b Dan Murphy 2020-09-24  211  
cfd39675171ca5b Dan Murphy 2020-09-24  212  	if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST |
cfd39675171ca5b Dan Murphy 2020-09-24  213  			    WAKE_BCAST)) {
cfd39675171ca5b Dan Murphy 2020-09-24  214  		val_rxcfg |= DP83869_WOL_ENH_MAC;
cfd39675171ca5b Dan Murphy 2020-09-24  215  		val_micr |= MII_DP83869_MICR_WOL_INT_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  216  
cfd39675171ca5b Dan Murphy 2020-09-24  217  		if (wol->wolopts & WAKE_MAGIC ||
cfd39675171ca5b Dan Murphy 2020-09-24  218  		    wol->wolopts & WAKE_MAGICSECURE) {
cfd39675171ca5b Dan Murphy 2020-09-24  219  			mac = (u8 *)ndev->dev_addr;
cfd39675171ca5b Dan Murphy 2020-09-24  220  
cfd39675171ca5b Dan Murphy 2020-09-24  221  			if (!is_valid_ether_addr(mac))
cfd39675171ca5b Dan Murphy 2020-09-24  222  				return -EINVAL;
cfd39675171ca5b Dan Murphy 2020-09-24  223  
cfd39675171ca5b Dan Murphy 2020-09-24  224  			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  225  					    DP83869_RXFPMD1,
cfd39675171ca5b Dan Murphy 2020-09-24  226  					    mac[1] << 8 | mac[0]);
cfd39675171ca5b Dan Murphy 2020-09-24  227  			if (ret)
cfd39675171ca5b Dan Murphy 2020-09-24  228  				return ret;
cfd39675171ca5b Dan Murphy 2020-09-24  229  
cfd39675171ca5b Dan Murphy 2020-09-24  230  			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  231  					    DP83869_RXFPMD2,
cfd39675171ca5b Dan Murphy 2020-09-24  232  					    mac[3] << 8 | mac[2]);
cfd39675171ca5b Dan Murphy 2020-09-24  233  			if (ret)
cfd39675171ca5b Dan Murphy 2020-09-24  234  				return ret;
cfd39675171ca5b Dan Murphy 2020-09-24  235  
cfd39675171ca5b Dan Murphy 2020-09-24  236  			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  237  					    DP83869_RXFPMD3,
cfd39675171ca5b Dan Murphy 2020-09-24  238  					    mac[5] << 8 | mac[4]);
cfd39675171ca5b Dan Murphy 2020-09-24  239  			if (ret)
cfd39675171ca5b Dan Murphy 2020-09-24  240  				return ret;
cfd39675171ca5b Dan Murphy 2020-09-24  241  
cfd39675171ca5b Dan Murphy 2020-09-24  242  			val_rxcfg |= DP83869_WOL_MAGIC_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  243  		} else {
cfd39675171ca5b Dan Murphy 2020-09-24  244  			val_rxcfg &= ~DP83869_WOL_MAGIC_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  245  		}
cfd39675171ca5b Dan Murphy 2020-09-24  246  
cfd39675171ca5b Dan Murphy 2020-09-24  247  		if (wol->wolopts & WAKE_MAGICSECURE) {
cfd39675171ca5b Dan Murphy 2020-09-24  248  			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  249  					    DP83869_RXFSOP1,
cfd39675171ca5b Dan Murphy 2020-09-24  250  					    (wol->sopass[1] << 8) | wol->sopass[0]);
cfd39675171ca5b Dan Murphy 2020-09-24  251  			if (ret)
cfd39675171ca5b Dan Murphy 2020-09-24  252  				return ret;
cfd39675171ca5b Dan Murphy 2020-09-24  253  
cfd39675171ca5b Dan Murphy 2020-09-24  254  			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  255  					    DP83869_RXFSOP2,
cfd39675171ca5b Dan Murphy 2020-09-24  256  					    (wol->sopass[3] << 8) | wol->sopass[2]);
cfd39675171ca5b Dan Murphy 2020-09-24  257  			if (ret)
cfd39675171ca5b Dan Murphy 2020-09-24  258  				return ret;
cfd39675171ca5b Dan Murphy 2020-09-24  259  			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  260  					    DP83869_RXFSOP3,
cfd39675171ca5b Dan Murphy 2020-09-24  261  					    (wol->sopass[5] << 8) | wol->sopass[4]);
cfd39675171ca5b Dan Murphy 2020-09-24  262  			if (ret)
cfd39675171ca5b Dan Murphy 2020-09-24  263  				return ret;
cfd39675171ca5b Dan Murphy 2020-09-24  264  
cfd39675171ca5b Dan Murphy 2020-09-24  265  			val_rxcfg |= DP83869_WOL_SEC_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  266  		} else {
cfd39675171ca5b Dan Murphy 2020-09-24  267  			val_rxcfg &= ~DP83869_WOL_SEC_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  268  		}
cfd39675171ca5b Dan Murphy 2020-09-24  269  
cfd39675171ca5b Dan Murphy 2020-09-24  270  		if (wol->wolopts & WAKE_UCAST)
cfd39675171ca5b Dan Murphy 2020-09-24  271  			val_rxcfg |= DP83869_WOL_UCAST_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  272  		else
cfd39675171ca5b Dan Murphy 2020-09-24  273  			val_rxcfg &= ~DP83869_WOL_UCAST_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  274  
cfd39675171ca5b Dan Murphy 2020-09-24  275  		if (wol->wolopts & WAKE_BCAST)
cfd39675171ca5b Dan Murphy 2020-09-24  276  			val_rxcfg |= DP83869_WOL_BCAST_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  277  		else
cfd39675171ca5b Dan Murphy 2020-09-24  278  			val_rxcfg &= ~DP83869_WOL_BCAST_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  279  	} else {
cfd39675171ca5b Dan Murphy 2020-09-24  280  		val_rxcfg &= ~DP83869_WOL_ENH_MAC;
cfd39675171ca5b Dan Murphy 2020-09-24  281  		val_micr &= ~MII_DP83869_MICR_WOL_INT_EN;
cfd39675171ca5b Dan Murphy 2020-09-24  282  	}
cfd39675171ca5b Dan Murphy 2020-09-24  283  
cfd39675171ca5b Dan Murphy 2020-09-24  284  	ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg);
cfd39675171ca5b Dan Murphy 2020-09-24  285  	if (ret)
cfd39675171ca5b Dan Murphy 2020-09-24  286  		return ret;
cfd39675171ca5b Dan Murphy 2020-09-24  287  
cfd39675171ca5b Dan Murphy 2020-09-24  288  	return phy_write(phydev, MII_DP83869_MICR, val_micr);
cfd39675171ca5b Dan Murphy 2020-09-24  289  }
cfd39675171ca5b Dan Murphy 2020-09-24  290  
cfd39675171ca5b Dan Murphy 2020-09-24  291  static void dp83869_get_wol(struct phy_device *phydev,
cfd39675171ca5b Dan Murphy 2020-09-24  292  			    struct ethtool_wolinfo *wol)
cfd39675171ca5b Dan Murphy 2020-09-24  293  {
cfd39675171ca5b Dan Murphy 2020-09-24  294  	u16 value, sopass_val;
cfd39675171ca5b Dan Murphy 2020-09-24  295  
cfd39675171ca5b Dan Murphy 2020-09-24  296  	wol->supported = (WAKE_UCAST | WAKE_BCAST | WAKE_MAGIC |
cfd39675171ca5b Dan Murphy 2020-09-24  297  			WAKE_MAGICSECURE);
cfd39675171ca5b Dan Murphy 2020-09-24  298  	wol->wolopts = 0;
cfd39675171ca5b Dan Murphy 2020-09-24  299  
cfd39675171ca5b Dan Murphy 2020-09-24  300  	value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
cfd39675171ca5b Dan Murphy 2020-09-24 @301  	if (value < 0) {
cfd39675171ca5b Dan Murphy 2020-09-24  302  		phydev_err(phydev, "Failed to read RX CFG\n");
cfd39675171ca5b Dan Murphy 2020-09-24  303  		return;
cfd39675171ca5b Dan Murphy 2020-09-24  304  	}
cfd39675171ca5b Dan Murphy 2020-09-24  305  
cfd39675171ca5b Dan Murphy 2020-09-24  306  	if (value & DP83869_WOL_UCAST_EN)
cfd39675171ca5b Dan Murphy 2020-09-24  307  		wol->wolopts |= WAKE_UCAST;
cfd39675171ca5b Dan Murphy 2020-09-24  308  
cfd39675171ca5b Dan Murphy 2020-09-24  309  	if (value & DP83869_WOL_BCAST_EN)
cfd39675171ca5b Dan Murphy 2020-09-24  310  		wol->wolopts |= WAKE_BCAST;
cfd39675171ca5b Dan Murphy 2020-09-24  311  
cfd39675171ca5b Dan Murphy 2020-09-24  312  	if (value & DP83869_WOL_MAGIC_EN)
cfd39675171ca5b Dan Murphy 2020-09-24  313  		wol->wolopts |= WAKE_MAGIC;
cfd39675171ca5b Dan Murphy 2020-09-24  314  
cfd39675171ca5b Dan Murphy 2020-09-24  315  	if (value & DP83869_WOL_SEC_EN) {
cfd39675171ca5b Dan Murphy 2020-09-24  316  		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  317  					  DP83869_RXFSOP1);
cfd39675171ca5b Dan Murphy 2020-09-24 @318  		if (sopass_val < 0) {
cfd39675171ca5b Dan Murphy 2020-09-24  319  			phydev_err(phydev, "Failed to read RX SOP 1\n");
cfd39675171ca5b Dan Murphy 2020-09-24  320  			return;
cfd39675171ca5b Dan Murphy 2020-09-24  321  		}
cfd39675171ca5b Dan Murphy 2020-09-24  322  
cfd39675171ca5b Dan Murphy 2020-09-24  323  		wol->sopass[0] = (sopass_val & 0xff);
cfd39675171ca5b Dan Murphy 2020-09-24  324  		wol->sopass[1] = (sopass_val >> 8);
cfd39675171ca5b Dan Murphy 2020-09-24  325  
cfd39675171ca5b Dan Murphy 2020-09-24  326  		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  327  					  DP83869_RXFSOP2);
cfd39675171ca5b Dan Murphy 2020-09-24  328  		if (sopass_val < 0) {
cfd39675171ca5b Dan Murphy 2020-09-24  329  			phydev_err(phydev, "Failed to read RX SOP 2\n");
cfd39675171ca5b Dan Murphy 2020-09-24  330  			return;
cfd39675171ca5b Dan Murphy 2020-09-24  331  		}
cfd39675171ca5b Dan Murphy 2020-09-24  332  
cfd39675171ca5b Dan Murphy 2020-09-24  333  		wol->sopass[2] = (sopass_val & 0xff);
cfd39675171ca5b Dan Murphy 2020-09-24  334  		wol->sopass[3] = (sopass_val >> 8);
cfd39675171ca5b Dan Murphy 2020-09-24  335  
cfd39675171ca5b Dan Murphy 2020-09-24  336  		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
cfd39675171ca5b Dan Murphy 2020-09-24  337  					  DP83869_RXFSOP3);
cfd39675171ca5b Dan Murphy 2020-09-24  338  		if (sopass_val < 0) {
cfd39675171ca5b Dan Murphy 2020-09-24  339  			phydev_err(phydev, "Failed to read RX SOP 3\n");
cfd39675171ca5b Dan Murphy 2020-09-24  340  			return;
cfd39675171ca5b Dan Murphy 2020-09-24  341  		}
cfd39675171ca5b Dan Murphy 2020-09-24  342  
cfd39675171ca5b Dan Murphy 2020-09-24  343  		wol->sopass[4] = (sopass_val & 0xff);
cfd39675171ca5b Dan Murphy 2020-09-24  344  		wol->sopass[5] = (sopass_val >> 8);
cfd39675171ca5b Dan Murphy 2020-09-24  345  
cfd39675171ca5b Dan Murphy 2020-09-24  346  		wol->wolopts |= WAKE_MAGICSECURE;
cfd39675171ca5b Dan Murphy 2020-09-24  347  	}
cfd39675171ca5b Dan Murphy 2020-09-24  348  
cfd39675171ca5b Dan Murphy 2020-09-24  349  	if (!(value & DP83869_WOL_ENH_MAC))
cfd39675171ca5b Dan Murphy 2020-09-24  350  		wol->wolopts = 0;
cfd39675171ca5b Dan Murphy 2020-09-24  351  }
cfd39675171ca5b Dan Murphy 2020-09-24  352  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH net-next v4 1/2] net: phy: dp83869: support Wake on LAN
  2020-09-24 16:27 ` [PATCH net-next v4 1/2] net: phy: dp83869: support Wake on LAN Dan Murphy
@ 2020-09-25 12:38   ` Dan Carpenter
  0 siblings, 0 replies; 3+ messages in thread
From: Dan Carpenter @ 2020-09-25 12:38 UTC (permalink / raw)
  To: kbuild

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Hi Dan,

url:    https://github.com/0day-ci/linux/commits/Dan-Murphy/DP83869-WoL-and-Speed-optimization/20200925-002844 
base:   https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git  3fc826f121d89c5aa4afd7b3408b07e0ff59466b
config: x86_64-randconfig-m001-20200925 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>

New smatch warnings:
drivers/net/phy/dp83869.c:205 dp83869_set_wol() warn: impossible condition '(val_rxcfg < 0) => (0-u16max < 0)'
drivers/net/phy/dp83869.c:209 dp83869_set_wol() warn: impossible condition '(val_micr < 0) => (0-u16max < 0)'
drivers/net/phy/dp83869.c:301 dp83869_get_wol() warn: impossible condition '(value < 0) => (0-u16max < 0)'
drivers/net/phy/dp83869.c:318 dp83869_get_wol() warn: impossible condition '(sopass_val < 0) => (0-u16max < 0)'

Old smatch warnings:
drivers/net/phy/dp83869.c:328 dp83869_get_wol() warn: impossible condition '(sopass_val < 0) => (0-u16max < 0)'
drivers/net/phy/dp83869.c:338 dp83869_get_wol() warn: impossible condition '(sopass_val < 0) => (0-u16max < 0)'

vim +205 drivers/net/phy/dp83869.c

cfd39675171ca5b Dan Murphy 2020-09-24  196  static int dp83869_set_wol(struct phy_device *phydev,
cfd39675171ca5b Dan Murphy 2020-09-24  197  			   struct ethtool_wolinfo *wol)
cfd39675171ca5b Dan Murphy 2020-09-24  198  {
cfd39675171ca5b Dan Murphy 2020-09-24  199  	struct net_device *ndev = phydev->attached_dev;
cfd39675171ca5b Dan Murphy 2020-09-24  200  	u16 val_rxcfg, val_micr;
cfd39675171ca5b Dan Murphy 2020-09-24  201  	u8 *mac;
cfd39675171ca5b Dan Murphy 2020-09-24  202  	int ret;
cfd39675171ca5b Dan Murphy 2020-09-24  203  
cfd39675171ca5b Dan Murphy 2020-09-24  204  	val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
cfd39675171ca5b Dan Murphy 2020-09-24 @205  	if (val_rxcfg < 0)
                                                    ^^^^^^^^^^^^^
This needs to be int instead of u16.

cfd39675171ca5b Dan Murphy 2020-09-24  206  		return val_rxcfg;
cfd39675171ca5b Dan Murphy 2020-09-24  207  
cfd39675171ca5b Dan Murphy 2020-09-24  208  	val_micr = phy_read(phydev, MII_DP83869_MICR);
cfd39675171ca5b Dan Murphy 2020-09-24 @209  	if (val_micr < 0)
cfd39675171ca5b Dan Murphy 2020-09-24  210  		return val_micr;
cfd39675171ca5b Dan Murphy 2020-09-24  211  
cfd39675171ca5b Dan Murphy 2020-09-24  212  	if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST |
cfd39675171ca5b Dan Murphy 2020-09-24  213  			    WAKE_BCAST)) {

---
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^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH net-next v4 1/2] net: phy: dp83869: support Wake on LAN
  2020-09-24 16:27 [PATCH net-next v4 0/2] DP83869 WoL and Speed optimization Dan Murphy
@ 2020-09-24 16:27 ` Dan Murphy
  2020-09-25 12:38   ` Dan Carpenter
  0 siblings, 1 reply; 3+ messages in thread
From: Dan Murphy @ 2020-09-24 16:27 UTC (permalink / raw)
  To: davem, andrew, f.fainelli, hkallweit1
  Cc: mkubecek, netdev, linux-kernel, Dan Murphy

This adds WoL support on TI DP83869 for magic, magic secure, unicast and
broadcast.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
---

v4 - Added checking error on phy_read

 drivers/net/phy/dp83869.c | 176 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 176 insertions(+)

diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c
index 81899bc99add..975b64b4b6c4 100644
--- a/drivers/net/phy/dp83869.c
+++ b/drivers/net/phy/dp83869.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/ethtool.h>
+#include <linux/etherdevice.h>
 #include <linux/kernel.h>
 #include <linux/mii.h>
 #include <linux/module.h>
@@ -27,6 +28,13 @@
 #define DP83869_RGMIICTL	0x0032
 #define DP83869_STRAP_STS1	0x006e
 #define DP83869_RGMIIDCTL	0x0086
+#define DP83869_RXFCFG		0x0134
+#define DP83869_RXFPMD1		0x0136
+#define DP83869_RXFPMD2		0x0137
+#define DP83869_RXFPMD3		0x0138
+#define DP83869_RXFSOP1		0x0139
+#define DP83869_RXFSOP2		0x013A
+#define DP83869_RXFSOP3		0x013B
 #define DP83869_IO_MUX_CFG	0x0170
 #define DP83869_OP_MODE		0x01df
 #define DP83869_FX_CTRL		0x0c00
@@ -104,6 +112,14 @@
 #define DP83869_OP_MODE_MII			BIT(5)
 #define DP83869_SGMII_RGMII_BRIDGE		BIT(6)
 
+/* RXFCFG bits*/
+#define DP83869_WOL_MAGIC_EN		BIT(0)
+#define DP83869_WOL_PATTERN_EN		BIT(1)
+#define DP83869_WOL_BCAST_EN		BIT(2)
+#define DP83869_WOL_UCAST_EN		BIT(4)
+#define DP83869_WOL_SEC_EN		BIT(5)
+#define DP83869_WOL_ENH_MAC		BIT(7)
+
 enum {
 	DP83869_PORT_MIRRORING_KEEP,
 	DP83869_PORT_MIRRORING_EN,
@@ -177,6 +193,163 @@ static int dp83869_config_intr(struct phy_device *phydev)
 	return phy_write(phydev, MII_DP83869_MICR, micr_status);
 }
 
+static int dp83869_set_wol(struct phy_device *phydev,
+			   struct ethtool_wolinfo *wol)
+{
+	struct net_device *ndev = phydev->attached_dev;
+	u16 val_rxcfg, val_micr;
+	u8 *mac;
+	int ret;
+
+	val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
+	if (val_rxcfg < 0)
+		return val_rxcfg;
+
+	val_micr = phy_read(phydev, MII_DP83869_MICR);
+	if (val_micr < 0)
+		return val_micr;
+
+	if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST |
+			    WAKE_BCAST)) {
+		val_rxcfg |= DP83869_WOL_ENH_MAC;
+		val_micr |= MII_DP83869_MICR_WOL_INT_EN;
+
+		if (wol->wolopts & WAKE_MAGIC ||
+		    wol->wolopts & WAKE_MAGICSECURE) {
+			mac = (u8 *)ndev->dev_addr;
+
+			if (!is_valid_ether_addr(mac))
+				return -EINVAL;
+
+			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
+					    DP83869_RXFPMD1,
+					    mac[1] << 8 | mac[0]);
+			if (ret)
+				return ret;
+
+			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
+					    DP83869_RXFPMD2,
+					    mac[3] << 8 | mac[2]);
+			if (ret)
+				return ret;
+
+			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
+					    DP83869_RXFPMD3,
+					    mac[5] << 8 | mac[4]);
+			if (ret)
+				return ret;
+
+			val_rxcfg |= DP83869_WOL_MAGIC_EN;
+		} else {
+			val_rxcfg &= ~DP83869_WOL_MAGIC_EN;
+		}
+
+		if (wol->wolopts & WAKE_MAGICSECURE) {
+			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
+					    DP83869_RXFSOP1,
+					    (wol->sopass[1] << 8) | wol->sopass[0]);
+			if (ret)
+				return ret;
+
+			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
+					    DP83869_RXFSOP2,
+					    (wol->sopass[3] << 8) | wol->sopass[2]);
+			if (ret)
+				return ret;
+			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
+					    DP83869_RXFSOP3,
+					    (wol->sopass[5] << 8) | wol->sopass[4]);
+			if (ret)
+				return ret;
+
+			val_rxcfg |= DP83869_WOL_SEC_EN;
+		} else {
+			val_rxcfg &= ~DP83869_WOL_SEC_EN;
+		}
+
+		if (wol->wolopts & WAKE_UCAST)
+			val_rxcfg |= DP83869_WOL_UCAST_EN;
+		else
+			val_rxcfg &= ~DP83869_WOL_UCAST_EN;
+
+		if (wol->wolopts & WAKE_BCAST)
+			val_rxcfg |= DP83869_WOL_BCAST_EN;
+		else
+			val_rxcfg &= ~DP83869_WOL_BCAST_EN;
+	} else {
+		val_rxcfg &= ~DP83869_WOL_ENH_MAC;
+		val_micr &= ~MII_DP83869_MICR_WOL_INT_EN;
+	}
+
+	ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg);
+	if (ret)
+		return ret;
+
+	return phy_write(phydev, MII_DP83869_MICR, val_micr);
+}
+
+static void dp83869_get_wol(struct phy_device *phydev,
+			    struct ethtool_wolinfo *wol)
+{
+	u16 value, sopass_val;
+
+	wol->supported = (WAKE_UCAST | WAKE_BCAST | WAKE_MAGIC |
+			WAKE_MAGICSECURE);
+	wol->wolopts = 0;
+
+	value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
+	if (value < 0) {
+		phydev_err(phydev, "Failed to read RX CFG\n");
+		return;
+	}
+
+	if (value & DP83869_WOL_UCAST_EN)
+		wol->wolopts |= WAKE_UCAST;
+
+	if (value & DP83869_WOL_BCAST_EN)
+		wol->wolopts |= WAKE_BCAST;
+
+	if (value & DP83869_WOL_MAGIC_EN)
+		wol->wolopts |= WAKE_MAGIC;
+
+	if (value & DP83869_WOL_SEC_EN) {
+		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
+					  DP83869_RXFSOP1);
+		if (sopass_val < 0) {
+			phydev_err(phydev, "Failed to read RX SOP 1\n");
+			return;
+		}
+
+		wol->sopass[0] = (sopass_val & 0xff);
+		wol->sopass[1] = (sopass_val >> 8);
+
+		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
+					  DP83869_RXFSOP2);
+		if (sopass_val < 0) {
+			phydev_err(phydev, "Failed to read RX SOP 2\n");
+			return;
+		}
+
+		wol->sopass[2] = (sopass_val & 0xff);
+		wol->sopass[3] = (sopass_val >> 8);
+
+		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
+					  DP83869_RXFSOP3);
+		if (sopass_val < 0) {
+			phydev_err(phydev, "Failed to read RX SOP 3\n");
+			return;
+		}
+
+		wol->sopass[4] = (sopass_val & 0xff);
+		wol->sopass[5] = (sopass_val >> 8);
+
+		wol->wolopts |= WAKE_MAGICSECURE;
+	}
+
+	if (!(value & DP83869_WOL_ENH_MAC))
+		wol->wolopts = 0;
+}
+
 static int dp83869_config_port_mirroring(struct phy_device *phydev)
 {
 	struct dp83869_private *dp83869 = phydev->priv;
@@ -568,6 +741,9 @@ static struct phy_driver dp83869_driver[] = {
 		.config_intr	= dp83869_config_intr,
 		.read_status	= dp83869_read_status,
 
+		.get_wol	= dp83869_get_wol,
+		.set_wol	= dp83869_set_wol,
+
 		.suspend	= genphy_suspend,
 		.resume		= genphy_resume,
 	},
-- 
2.28.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-09-25 12:38 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-25 12:17 [PATCH net-next v4 1/2] net: phy: dp83869: support Wake on LAN kernel test robot
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2020-09-24 16:27 [PATCH net-next v4 0/2] DP83869 WoL and Speed optimization Dan Murphy
2020-09-24 16:27 ` [PATCH net-next v4 1/2] net: phy: dp83869: support Wake on LAN Dan Murphy
2020-09-25 12:38   ` Dan Carpenter

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