* [PATCH 1/2] arm64: dts: freescale: Add pmu support on imx8mp
@ 2020-09-27 9:47 Jacky Bai
2020-09-27 9:47 ` [PATCH 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
2020-09-29 8:00 ` [PATCH 1/2] arm64: dts: freescale: Add pmu support on imx8mp Krzysztof Kozlowski
0 siblings, 2 replies; 5+ messages in thread
From: Jacky Bai @ 2020-09-27 9:47 UTC (permalink / raw)
To: shawnguo, robh+dt, s.hauer; +Cc: festevam, linux-imx, devicetree
Add PMU node to enable pmu support on imx8mp.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 6038f66aefc1..8b07a70545f6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -133,6 +133,13 @@ clk_ext4: clock-ext4 {
clock-output-names = "clk_ext4";
};
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_PPI 7
+ (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.26.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] arm64: dts: freescale: Add pmu support on imx8mn
2020-09-27 9:47 [PATCH 1/2] arm64: dts: freescale: Add pmu support on imx8mp Jacky Bai
@ 2020-09-27 9:47 ` Jacky Bai
2020-09-29 8:02 ` Krzysztof Kozlowski
2020-09-29 8:00 ` [PATCH 1/2] arm64: dts: freescale: Add pmu support on imx8mp Krzysztof Kozlowski
1 sibling, 1 reply; 5+ messages in thread
From: Jacky Bai @ 2020-09-27 9:47 UTC (permalink / raw)
To: shawnguo, robh+dt, s.hauer; +Cc: festevam, linux-imx, devicetree
Add PMU node to enable pmu support on imx8mn.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 746faf1cf2fb..589835d78727 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -186,6 +186,14 @@ clk_ext4: clock-ext4 {
clock-output-names = "clk_ext4";
};
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_PPI 7
+ (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
+ };
+
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.26.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] arm64: dts: freescale: Add pmu support on imx8mp
2020-09-27 9:47 [PATCH 1/2] arm64: dts: freescale: Add pmu support on imx8mp Jacky Bai
2020-09-27 9:47 ` [PATCH 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
@ 2020-09-29 8:00 ` Krzysztof Kozlowski
1 sibling, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2020-09-29 8:00 UTC (permalink / raw)
To: Jacky Bai; +Cc: shawnguo, robh+dt, s.hauer, festevam, linux-imx, devicetree
On Sun, Sep 27, 2020 at 05:47:41PM +0800, Jacky Bai wrote:
> Add PMU node to enable pmu support on imx8mp.
>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 6038f66aefc1..8b07a70545f6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -133,6 +133,13 @@ clk_ext4: clock-ext4 {
> clock-output-names = "clk_ext4";
> };
>
> + pmu {
> + compatible = "arm,armv8-pmuv3";
> + interrupts = <GIC_PPI 7
> + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
How many cores do you have there? 4 or 6?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] arm64: dts: freescale: Add pmu support on imx8mn
2020-09-27 9:47 ` [PATCH 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
@ 2020-09-29 8:02 ` Krzysztof Kozlowski
2020-09-29 8:22 ` Jacky Bai
0 siblings, 1 reply; 5+ messages in thread
From: Krzysztof Kozlowski @ 2020-09-29 8:02 UTC (permalink / raw)
To: Jacky Bai; +Cc: shawnguo, robh+dt, s.hauer, festevam, linux-imx, devicetree
On Sun, Sep 27, 2020 at 05:47:42PM +0800, Jacky Bai wrote:
> Add PMU node to enable pmu support on imx8mn.
>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 746faf1cf2fb..589835d78727 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -186,6 +186,14 @@ clk_ext4: clock-ext4 {
> clock-output-names = "clk_ext4";
> };
>
> + pmu {
> + compatible = "arm,armv8-pmuv3";
> + interrupts = <GIC_PPI 7
> + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
The same as in 1/2 - unusual value for GIC_CPU_MASK_SIMPLE. There are
four cores on Nano.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH 2/2] arm64: dts: freescale: Add pmu support on imx8mn
2020-09-29 8:02 ` Krzysztof Kozlowski
@ 2020-09-29 8:22 ` Jacky Bai
0 siblings, 0 replies; 5+ messages in thread
From: Jacky Bai @ 2020-09-29 8:22 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: shawnguo, robh+dt, s.hauer, festevam, dl-linux-imx, devicetree
> -----Original Message-----
> From: Krzysztof Kozlowski [mailto:krzk@kernel.org]
> Sent: Tuesday, September 29, 2020 4:02 PM
> To: Jacky Bai <ping.bai@nxp.com>
> Cc: shawnguo@kernel.org; robh+dt@kernel.org; s.hauer@pengutronix.de;
> festevam@gmail.com; dl-linux-imx <linux-imx@nxp.com>;
> devicetree@vger.kernel.org
> Subject: Re: [PATCH 2/2] arm64: dts: freescale: Add pmu support on imx8mn
>
> On Sun, Sep 27, 2020 at 05:47:42PM +0800, Jacky Bai wrote:
> > Add PMU node to enable pmu support on imx8mn.
> >
> > Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 746faf1cf2fb..589835d78727 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -186,6 +186,14 @@ clk_ext4: clock-ext4 {
> > clock-output-names = "clk_ext4";
> > };
> >
> > + pmu {
> > + compatible = "arm,armv8-pmuv3";
> > + interrupts = <GIC_PPI 7
> > + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
>
> The same as in 1/2 - unusual value for GIC_CPU_MASK_SIMPLE. There are
> four cores on Nano.
>
Thanks for review, will fix in v2.
BR
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-09-29 8:22 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-27 9:47 [PATCH 1/2] arm64: dts: freescale: Add pmu support on imx8mp Jacky Bai
2020-09-27 9:47 ` [PATCH 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
2020-09-29 8:02 ` Krzysztof Kozlowski
2020-09-29 8:22 ` Jacky Bai
2020-09-29 8:00 ` [PATCH 1/2] arm64: dts: freescale: Add pmu support on imx8mp Krzysztof Kozlowski
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