[igt-dev] [PATCH i-g-t 0/3] benchmarks: Remove libdrm dependency

[igt-dev] [PATCH i-g-t 0/3] benchmarks: Remove libdrm dependency

[Dominik Grzegorzek]

I decided to split previous series into smaller chunks.
(https://patchwork.freedesktop.org/series/81782/)
There are some common patches inlcuded in more than one smaller series.
This one removes libdrm usage from intel_upload_blit benchmarks.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>

Dominik Grzegorzek (1):
  benchmarks: Remove libdrm dependency

Zbigniew Kempczyński (2):
  lib/intel_bufops: Avoid overallocate x-tiling and linear surfaces
  lib/intel_bufops: Add simple object cache

 benchmarks/intel_upload_blit_large.c     |  79 ++++++-------
 benchmarks/intel_upload_blit_large_gtt.c |  84 +++++++-------
 benchmarks/intel_upload_blit_large_map.c |  84 +++++++-------
 benchmarks/intel_upload_blit_small.c     |  78 ++++++-------
 lib/intel_bufops.c                       | 139 ++++++++++++++++++++++-
 lib/intel_bufops.h                       |   2 +
 6 files changed, 300 insertions(+), 166 deletions(-)

-- 
2.20.1

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[igt-dev] [PATCH i-g-t 1/3] lib/intel_bufops: Avoid overallocate x-tiling and linear surfaces

[Dominik Grzegorzek]

From: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

Height alignment was not properly set to 32 which was to big for
x-tiling and linear surfaces and leads to overallocation.
Linear surfaces currently don't require any height alignment (just 1),
for x-tiling we use 8.

Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/intel_bufops.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index 57aa2a40..a1e9ba55 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -712,6 +712,7 @@ static void __intel_buf_init(struct buf_ops *bops,
 	uint32_t size;
 	uint32_t devid;
 	int tile_width;
+	int align_h = 1;
 
 	igt_assert(bops);
 	igt_assert(buf);
@@ -761,6 +762,7 @@ static void __intel_buf_init(struct buf_ops *bops,
 			devid =  intel_get_drm_devid(bops->fd);
 			tile_width = get_stride(devid, tiling);
 			buf->surface[0].stride = ALIGN(width * (bpp / 8), tile_width);
+			align_h = tiling == I915_TILING_X ? 8 : 32;
 		} else {
 			buf->surface[0].stride = ALIGN(width * (bpp / 8), alignment ?: 1);
 		}
@@ -769,7 +771,7 @@ static void __intel_buf_init(struct buf_ops *bops,
 		buf->tiling = tiling;
 		buf->bpp = bpp;
 
-		size = buf->surface[0].stride * ALIGN(height, 32);
+		size = buf->surface[0].stride * ALIGN(height, align_h);
 	}
 
 	if (handle)
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 2/3] lib/intel_bufops: Add simple object cache

[Dominik Grzegorzek]

From: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

For simplify writing of benchmarks when we want to keep GPU busy
all the time we should reuse buffers whenever possible. Simply
reusing the buffer is not enough because to schedule new execbuf
we have to wait until previous rendering will complete on those
buffers. Creating new ones should occur only if there're no spare
buffers, for other cases we can verify does a potential buffer
is still busy. If it is not busy we can reuse it and use its
previous address to avoid relocation.

Change in intel_buf adds some caching layer which will create
new buffer if there's no free buffer or reuse buffer which size
is maching and buffer is not busy.

Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/intel_bufops.c | 135 +++++++++++++++++++++++++++++++++++++++++++--
 lib/intel_bufops.h |   2 +
 2 files changed, 133 insertions(+), 4 deletions(-)

diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index a1e9ba55..0fd4ce4e 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -24,7 +24,9 @@
 
 #include <sys/ioctl.h>
 #include <cairo.h>
+#include <pthread.h>
 #include "igt.h"
+#include "igt_list.h"
 #include "igt_x86.h"
 #include "intel_bufops.h"
 
@@ -115,6 +117,94 @@ struct buf_ops {
 	bo_copy ys_to_linear;
 };
 
+struct cache_entry {
+	int fd;
+	uint32_t size;
+	uint32_t handle;
+	uint64_t prev_offset;
+	bool reserved;
+	bool busy;
+	struct igt_list_head link;
+};
+
+#define CACHE_BUCKETS 253
+struct {
+	pthread_mutex_t mutex;
+	struct igt_list_head head[CACHE_BUCKETS];
+	uint32_t entries;
+} cache;
+
+static bool use_caching;
+
+static inline int cache_bucket(int fd, uint32_t size) {
+	return (size >> 12) * fd % CACHE_BUCKETS;
+}
+
+static uint32_t cache_find_or_create(int fd, uint32_t size, uint64_t *poffset)
+{
+	struct cache_entry *pos;
+	uint32_t handle;
+	bool alloc = true;
+	int bucket = cache_bucket(fd, size);
+
+	pthread_mutex_lock(&cache.mutex);
+	if (!igt_list_empty(&cache.head[bucket])) {
+		igt_list_for_each_entry(pos, &cache.head[bucket], link) {
+			if (fd == pos->fd && size == pos->size) {
+				/* Update busy state */
+				if (!pos->reserved && pos->busy)
+					pos->busy = gem_bo_busy(fd, pos->handle);
+
+				if (!pos->busy && !pos->reserved) {
+					handle = pos->handle;
+					pos->busy = true;
+					pos->reserved = true;
+					if (poffset)
+						*poffset = pos->prev_offset;
+					alloc = false;
+					break;
+				}
+			}
+		}
+	}
+
+	if (alloc) {
+		handle = gem_create(fd, size);
+		pos = calloc(sizeof(*pos), 1);
+		igt_assert(pos);
+
+		pos->fd = fd;
+		pos->size = size;
+		pos->handle = handle;
+		pos->busy = true;
+		pos->reserved = true;
+		pos->prev_offset = INTEL_BUF_INVALID_ADDRESS;
+		if (poffset)
+			*poffset = pos->prev_offset;
+		igt_list_add(&pos->link, &cache.head[bucket]);
+	}
+	pthread_mutex_unlock(&cache.mutex);
+
+	return handle;
+}
+
+static void cache_remove(int fd, uint32_t handle, uint32_t size, uint64_t offset)
+{
+	struct cache_entry *pos;
+	int bucket = cache_bucket(fd, size);
+
+	pthread_mutex_lock(&cache.mutex);
+	if (!igt_list_empty(&cache.head[bucket])) {
+		igt_list_for_each_entry(pos, &cache.head[bucket], link) {
+			if (fd == pos->fd && size == pos->size && handle == pos->handle) {
+				pos->prev_offset = offset;
+				pos->reserved = false;
+			}
+		}
+	}
+	pthread_mutex_unlock(&cache.mutex);
+}
+
 static const char *tiling_str(uint32_t tiling)
 {
 	switch (tiling) {
@@ -702,6 +792,39 @@ void linear_to_intel_buf(struct buf_ops *bops, struct intel_buf *buf,
 		__copy_ccs(bops, buf, linear, CCS_LINEAR_TO_BUF);
 }
 
+void intel_buf_use_caching(bool caching)
+{
+	if (caching == use_caching)
+		return;
+
+	use_caching = caching;
+	pthread_mutex_init(&cache.mutex, NULL);
+	for (int i = 0; i < CACHE_BUCKETS; i++)
+		IGT_INIT_LIST_HEAD(&cache.head[i]);
+}
+
+static uint32_t get_gem(struct intel_buf *buf, uint32_t size,
+			  uint64_t *poffset)
+{
+	if (!use_caching) {
+		*poffset = INTEL_BUF_INVALID_ADDRESS;
+		return gem_create(buf->fd, size);
+	}
+
+	return cache_find_or_create(buf->fd, size, poffset);
+}
+
+static void put_gem(struct intel_buf *buf)
+{
+	if (!use_caching) {
+		gem_close(buf->fd, buf->handle);
+		return;
+	}
+
+	cache_remove(buf->fd, buf->handle,
+		     intel_buf_bo_size(buf), buf->addr.offset);
+}
+
 static void __intel_buf_init(struct buf_ops *bops,
 			     uint32_t handle,
 			     struct intel_buf *buf,
@@ -723,6 +846,7 @@ static void __intel_buf_init(struct buf_ops *bops,
 	memset(buf, 0, sizeof(*buf));
 
 	buf->bops = bops;
+	buf->fd = buf_ops_get_fd(bops);
 	buf->addr.offset = INTEL_BUF_INVALID_ADDRESS;
 
 	if (compression) {
@@ -774,10 +898,13 @@ static void __intel_buf_init(struct buf_ops *bops,
 		size = buf->surface[0].stride * ALIGN(height, align_h);
 	}
 
-	if (handle)
+	if (handle) {
 		buf->handle = handle;
-	else
-		buf->handle = gem_create(bops->fd, size);
+	} else {
+		uint64_t offset;
+		buf->handle = get_gem(buf, size, &offset);
+		buf->addr.offset = offset;
+	}
 
 	set_hw_tiled(bops, buf);
 }
@@ -824,7 +951,7 @@ void intel_buf_close(struct buf_ops *bops, struct intel_buf *buf)
 	igt_assert(buf);
 
 	if (buf->is_owner)
-		gem_close(bops->fd, buf->handle);
+		put_gem(buf);
 }
 
 /**
diff --git a/lib/intel_bufops.h b/lib/intel_bufops.h
index 8debe7f2..74162213 100644
--- a/lib/intel_bufops.h
+++ b/lib/intel_bufops.h
@@ -11,6 +11,7 @@ struct buf_ops;
 #define INTEL_BUF_NAME_MAXSIZE 32
 struct intel_buf {
 	struct buf_ops *bops;
+	int fd;
 	bool is_owner;
 	uint32_t handle;
 	uint32_t tiling;
@@ -113,6 +114,7 @@ static inline void intel_buf_set_ownership(struct intel_buf *buf, bool is_owner)
 	buf->is_owner = is_owner;
 }
 
+void intel_buf_use_caching(bool caching);
 void intel_buf_init(struct buf_ops *bops, struct intel_buf *buf,
 		    int width, int height, int bpp, int alignment,
 		    uint32_t tiling, uint32_t compression);
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 3/3] benchmarks: Remove libdrm dependency

[Dominik Grzegorzek]

Thanks to intel_bb / intel_buf we could get rid of libdrm.
With intel_buf caching mechanism we are able to keep results similar.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 benchmarks/intel_upload_blit_large.c     | 79 +++++++++++-----------
 benchmarks/intel_upload_blit_large_gtt.c | 84 ++++++++++++------------
 benchmarks/intel_upload_blit_large_map.c | 84 ++++++++++++------------
 benchmarks/intel_upload_blit_small.c     | 78 +++++++++++-----------
 4 files changed, 164 insertions(+), 161 deletions(-)

diff --git a/benchmarks/intel_upload_blit_large.c b/benchmarks/intel_upload_blit_large.c
index 12bbae3d..ec34dd11 100644
--- a/benchmarks/intel_upload_blit_large.c
+++ b/benchmarks/intel_upload_blit_large.c
@@ -72,74 +72,74 @@ get_time_in_secs(void)
 }
 
 static void
-do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
-	  drm_intel_bo *dst_bo, int width, int height)
+do_render(struct buf_ops *bops, struct intel_bb *ibb,
+	  struct intel_buf *dst_buf, int width, int height)
 {
 	uint32_t data[width * height];
-	drm_intel_bo *src_bo;
-	int i;
+	struct intel_buf *src_buf;
+	int i, fd;
 	static uint32_t seed = 1;
 
+	fd = buf_ops_get_fd(bops);
 	/* Generate some junk.  Real workloads would be doing a lot more
 	 * work to generate the junk.
 	 */
-	for (i = 0; i < width * height; i++) {
+	for (i = 0; i < width * height; i++)
 		data[i] = seed++;
-	}
 
 	/* Upload the junk. */
-	src_bo = drm_intel_bo_alloc(bufmgr, "src", sizeof(data), 4096);
-	drm_intel_bo_subdata(src_bo, 0, sizeof(data), data);
+	src_buf = intel_buf_create(bops, width, height, 32, 0, I915_TILING_NONE,
+				   I915_COMPRESSION_NONE);
+	gem_write(fd, src_buf->handle, 0, data, sizeof(data));
 
+	intel_bb_add_intel_buf(ibb, dst_buf, true);
 	/* Render the junk to the dst. */
-	BLIT_COPY_BATCH_START(0);
-	OUT_BATCH((3 << 24) | /* 32 bits */
+	intel_bb_blit_start(ibb, 0);
+	intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 		  (0xcc << 16) | /* copy ROP */
 		  (width * 4) /* dst pitch */);
-	OUT_BATCH(0); /* dst x1,y1 */
-	OUT_BATCH((height << 16) | width); /* dst x2,y2 */
-	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0); /* src x1,y1 */
-	OUT_BATCH(width * 4); /* src pitch */
-	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-
-	intel_batchbuffer_flush(batch);
-
-	drm_intel_bo_unreference(src_bo);
+	intel_bb_out(ibb, 0); /* dst x1,y1 */
+	intel_bb_out(ibb, (height << 16) | width); /* dst x2,y2 */
+	intel_bb_emit_reloc(ibb, dst_buf->handle, I915_GEM_DOMAIN_RENDER,
+			    I915_GEM_DOMAIN_RENDER, 0, dst_buf->addr.offset);
+	intel_bb_out(ibb, 0); /* src x1,y1 */
+	intel_bb_out(ibb, width * 4); /* src pitch */
+	intel_bb_emit_reloc(ibb, src_buf->handle, I915_GEM_DOMAIN_RENDER, 0, 0,
+			    src_buf->addr.offset);
+
+	intel_bb_flush_blit(ibb);
+	intel_buf_destroy(src_buf);
 }
 
 int main(int argc, char **argv)
 {
 	int fd;
-	int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4;
 	double start_time, end_time;
-	drm_intel_bo *dst_bo;
-	drm_intel_bufmgr *bufmgr;
-	struct intel_batchbuffer *batch;
+	struct intel_buf *dst_buf;
+	struct buf_ops *bops;
+	struct intel_bb *ibb;
 	int i;
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+	intel_buf_use_caching(true);
+	bops = buf_ops_create(fd);
 
-	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+	ibb = intel_bb_create(fd, 4096);
 
-	dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
+	dst_buf = intel_buf_create(bops, OBJECT_WIDTH, OBJECT_HEIGHT, 32, 0,
+				   I915_TILING_NONE, I915_COMPRESSION_NONE);
 
 	/* Prep loop to get us warmed up. */
-	for (i = 0; i < 60; i++) {
-		do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
-	}
-	drm_intel_bo_wait_rendering(dst_bo);
+	for (i = 0; i < 60; i++)
+		do_render(bops, ibb, dst_buf, OBJECT_WIDTH, OBJECT_HEIGHT);
+	intel_bb_sync(ibb);
 
 	/* Do the actual timing. */
 	start_time = get_time_in_secs();
-	for (i = 0; i < 200; i++) {
-		do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
-	}
-	drm_intel_bo_wait_rendering(dst_bo);
+	for (i = 0; i < 200; i++)
+		do_render(bops, ibb, dst_buf, OBJECT_WIDTH, OBJECT_HEIGHT);
+	intel_bb_sync(ibb);
 	end_time = get_time_in_secs();
 
 	printf("%d iterations in %.03f secs: %.01f MB/sec\n", i,
@@ -147,8 +147,9 @@ int main(int argc, char **argv)
 	       (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 /
 	       (end_time - start_time));
 
-	intel_batchbuffer_free(batch);
-	drm_intel_bufmgr_destroy(bufmgr);
+	intel_buf_destroy(dst_buf);
+	intel_bb_destroy(ibb);
+	buf_ops_destroy(bops);
 
 	close(fd);
 
diff --git a/benchmarks/intel_upload_blit_large_gtt.c b/benchmarks/intel_upload_blit_large_gtt.c
index 0b704b57..f48260b0 100644
--- a/benchmarks/intel_upload_blit_large_gtt.c
+++ b/benchmarks/intel_upload_blit_large_gtt.c
@@ -69,74 +69,73 @@ get_time_in_secs(void)
 }
 
 static void
-do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
-	  drm_intel_bo *dst_bo, int width, int height)
+do_render(struct buf_ops *bops, struct intel_bb *ibb,
+	  struct intel_buf *dst_buf, int width, int height)
 {
 	uint32_t *data;
-	drm_intel_bo *src_bo;
-	int i;
+	struct intel_buf *src_buf;
+	int i, fd;
 	static uint32_t seed = 1;
 
-	src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096);
-
-	drm_intel_gem_bo_map_gtt(src_bo);
+	fd = buf_ops_get_fd(bops);
+	src_buf = intel_buf_create(bops, width, height, 32, 0, I915_TILING_NONE,
+				   I915_COMPRESSION_NONE);
+	data = gem_mmap__gtt(fd, src_buf->handle,
+			     src_buf->surface[0].size, PROT_WRITE);
 
-	data = src_bo->virtual;
-	for (i = 0; i < width * height; i++) {
+	for (i = 0; i < width * height; i++)
 		data[i] = seed++;
-	}
 
-	drm_intel_gem_bo_unmap_gtt(src_bo);
+	gem_munmap(data, src_buf->surface[0].size);
 
+	intel_bb_add_intel_buf(ibb, dst_buf, true);
 	/* Render the junk to the dst. */
-	BLIT_COPY_BATCH_START(0);
-	OUT_BATCH((3 << 24) | /* 32 bits */
+	intel_bb_blit_start(ibb, 0);
+	intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 		  (0xcc << 16) | /* copy ROP */
 		  (width * 4) /* dst pitch */);
-	OUT_BATCH(0); /* dst x1,y1 */
-	OUT_BATCH((height << 16) | width); /* dst x2,y2 */
-	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0); /* src x1,y1 */
-	OUT_BATCH(width * 4); /* src pitch */
-	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-
-	intel_batchbuffer_flush(batch);
-
-	drm_intel_bo_unreference(src_bo);
+	intel_bb_out(ibb, 0); /* dst x1,y1 */
+	intel_bb_out(ibb, (height << 16) | width); /* dst x2,y2 */
+	intel_bb_emit_reloc(ibb, dst_buf->handle, I915_GEM_DOMAIN_RENDER,
+			    I915_GEM_DOMAIN_RENDER, 0, dst_buf->addr.offset);
+	intel_bb_out(ibb, 0); /* src x1,y1 */
+	intel_bb_out(ibb, width * 4); /* src pitch */
+	intel_bb_emit_reloc(ibb, src_buf->handle, I915_GEM_DOMAIN_RENDER, 0, 0,
+			    src_buf->addr.offset);
+
+	intel_bb_flush_blit(ibb);
+	intel_buf_destroy(src_buf);
 }
 
 int main(int argc, char **argv)
 {
 	int fd;
-	int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4;
 	double start_time, end_time;
-	drm_intel_bo *dst_bo;
-	drm_intel_bufmgr *bufmgr;
-	struct intel_batchbuffer *batch;
+	struct intel_buf *dst_buf;
+	struct buf_ops *bops;
+	struct intel_bb *ibb;
 	int i;
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+	intel_buf_use_caching(true);
+	bops = buf_ops_create(fd);
 
-	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+	ibb = intel_bb_create(fd, 4096);
 
-	dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
+	dst_buf = intel_buf_create(bops, OBJECT_WIDTH, OBJECT_HEIGHT, 32, 0,
+				   I915_TILING_NONE, I915_COMPRESSION_NONE);
 
 	/* Prep loop to get us warmed up. */
-	for (i = 0; i < 60; i++) {
-		do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
-	}
-	drm_intel_bo_wait_rendering(dst_bo);
+	for (i = 0; i < 60; i++)
+		do_render(bops, ibb, dst_buf, OBJECT_WIDTH, OBJECT_HEIGHT);
+	intel_bb_sync(ibb);
 
 	/* Do the actual timing. */
 	start_time = get_time_in_secs();
-	for (i = 0; i < 200; i++) {
-		do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
-	}
-	drm_intel_bo_wait_rendering(dst_bo);
+	for (i = 0; i < 200; i++)
+		do_render(bops, ibb, dst_buf, OBJECT_WIDTH, OBJECT_HEIGHT);
+	intel_bb_sync(ibb);
 	end_time = get_time_in_secs();
 
 	printf("%d iterations in %.03f secs: %.01f MB/sec\n", i,
@@ -144,8 +143,9 @@ int main(int argc, char **argv)
 	       (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 /
 	       (end_time - start_time));
 
-	intel_batchbuffer_free(batch);
-	drm_intel_bufmgr_destroy(bufmgr);
+	intel_buf_destroy(dst_buf);
+	intel_bb_destroy(ibb);
+	buf_ops_destroy(bops);
 
 	close(fd);
 
diff --git a/benchmarks/intel_upload_blit_large_map.c b/benchmarks/intel_upload_blit_large_map.c
index ae05434f..3b2f8b41 100644
--- a/benchmarks/intel_upload_blit_large_map.c
+++ b/benchmarks/intel_upload_blit_large_map.c
@@ -72,74 +72,73 @@ get_time_in_secs(void)
 }
 
 static void
-do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
-	  drm_intel_bo *dst_bo, int width, int height)
+do_render(struct buf_ops *bops, struct intel_bb *ibb,
+	  struct intel_buf *dst_buf, int width, int height)
 {
 	uint32_t *data;
-	drm_intel_bo *src_bo;
-	int i;
+	struct intel_buf *src_buf;
+	int i, fd;
 	static uint32_t seed = 1;
 
-	src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096);
-
-	drm_intel_bo_map(src_bo, 1);
+	fd = buf_ops_get_fd(bops);
+	src_buf = intel_buf_create(bops, width, height, 32, 0, I915_TILING_NONE,
+				   I915_COMPRESSION_NONE);
+	data = gem_mmap__cpu_coherent(fd, src_buf->handle, 0,
+				      src_buf->surface[0].size, PROT_WRITE);
 
-	data = src_bo->virtual;
-	for (i = 0; i < width * height; i++) {
+	for (i = 0; i < width * height; i++)
 		data[i] = seed++;
-	}
 
-	drm_intel_bo_unmap(src_bo);
+	gem_munmap(data, src_buf->surface[0].size);
 
+	intel_bb_add_intel_buf(ibb, dst_buf, true);
 	/* Render the junk to the dst. */
-	BLIT_COPY_BATCH_START(0);
-	OUT_BATCH((3 << 24) | /* 32 bits */
+	intel_bb_blit_start(ibb, 0);
+	intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 		  (0xcc << 16) | /* copy ROP */
 		  (width * 4) /* dst pitch */);
-	OUT_BATCH(0); /* dst x1,y1 */
-	OUT_BATCH((height << 16) | width); /* dst x2,y2 */
-	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0); /* src x1,y1 */
-	OUT_BATCH(width * 4); /* src pitch */
-	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-
-	intel_batchbuffer_flush(batch);
-
-	drm_intel_bo_unreference(src_bo);
+	intel_bb_out(ibb, 0); /* dst x1,y1 */
+	intel_bb_out(ibb, (height << 16) | width); /* dst x2,y2 */
+	intel_bb_emit_reloc(ibb, dst_buf->handle, I915_GEM_DOMAIN_RENDER,
+			    I915_GEM_DOMAIN_RENDER, 0, dst_buf->addr.offset);
+	intel_bb_out(ibb, 0); /* src x1,y1 */
+	intel_bb_out(ibb, width * 4); /* src pitch */
+	intel_bb_emit_reloc(ibb, src_buf->handle, I915_GEM_DOMAIN_RENDER, 0, 0,
+			    src_buf->addr.offset);
+
+	intel_bb_flush_blit(ibb);
+	intel_buf_destroy(src_buf);
 }
 
 int main(int argc, char **argv)
 {
 	int fd;
-	int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4;
 	double start_time, end_time;
-	drm_intel_bo *dst_bo;
-	drm_intel_bufmgr *bufmgr;
-	struct intel_batchbuffer *batch;
+	struct intel_buf *dst_buf;
+	struct buf_ops *bops;
+	struct intel_bb *ibb;
 	int i;
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+	intel_buf_use_caching(true);
+	bops = buf_ops_create(fd);
 
-	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+	ibb = intel_bb_create(fd, 4096);
 
-	dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
+	dst_buf = intel_buf_create(bops, OBJECT_WIDTH, OBJECT_HEIGHT, 32, 0,
+				   I915_TILING_NONE, I915_COMPRESSION_NONE);
 
 	/* Prep loop to get us warmed up. */
-	for (i = 0; i < 60; i++) {
-		do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
-	}
-	drm_intel_bo_wait_rendering(dst_bo);
+	for (i = 0; i < 60; i++)
+		do_render(bops, ibb, dst_buf, OBJECT_WIDTH, OBJECT_HEIGHT);
+	intel_bb_sync(ibb);
 
 	/* Do the actual timing. */
 	start_time = get_time_in_secs();
-	for (i = 0; i < 200; i++) {
-		do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
-	}
-	drm_intel_bo_wait_rendering(dst_bo);
+	for (i = 0; i < 200; i++)
+		do_render(bops, ibb, dst_buf, OBJECT_WIDTH, OBJECT_HEIGHT);
+	intel_bb_sync(ibb);
 	end_time = get_time_in_secs();
 
 	printf("%d iterations in %.03f secs: %.01f MB/sec\n", i,
@@ -147,8 +146,9 @@ int main(int argc, char **argv)
 	       (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 /
 	       (end_time - start_time));
 
-	intel_batchbuffer_free(batch);
-	drm_intel_bufmgr_destroy(bufmgr);
+	intel_buf_destroy(dst_buf);
+	intel_bb_destroy(ibb);
+	buf_ops_destroy(bops);
 
 	close(fd);
 
diff --git a/benchmarks/intel_upload_blit_small.c b/benchmarks/intel_upload_blit_small.c
index 7e3346eb..7d976075 100644
--- a/benchmarks/intel_upload_blit_small.c
+++ b/benchmarks/intel_upload_blit_small.c
@@ -66,19 +66,20 @@ get_time_in_secs(void)
 }
 
 static void
-do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
-	  drm_intel_bo *dst_bo, int width, int height)
+do_render(struct buf_ops *bops, struct intel_bb *ibb,
+	  struct intel_buf *dst_buf, int width, int height)
 {
 	uint32_t data[64];
-	drm_intel_bo *src_bo;
-	int i;
+	struct intel_buf *src_buf;
+	int i, fd;
 	static uint32_t seed = 1;
 
-	src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096);
-
+	fd = buf_ops_get_fd(bops);
 	/* Upload some junk.  Real workloads would be doing a lot more
 	 * work to generate the junk.
 	 */
+	src_buf = intel_buf_create(bops, width, height, 32, 0, I915_TILING_NONE,
+				   I915_COMPRESSION_NONE);
 	for (i = 0; i < width * height;) {
 		int size, j;
 
@@ -96,60 +97,60 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
 			data[j] = seed++;
 
 		/* Upload the junk. */
-		drm_intel_bo_subdata(src_bo, i * 4, size * 4, data);
+		gem_write(fd, src_buf->handle, i * 4, data,
+			  size * 4);
 
 		i += size;
 	}
 
+	intel_bb_add_intel_buf(ibb, dst_buf, true);
 	/* Render the junk to the dst. */
-	BLIT_COPY_BATCH_START(0);
-	OUT_BATCH((3 << 24) | /* 32 bits */
+	intel_bb_blit_start(ibb, 0);
+	intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 		  (0xcc << 16) | /* copy ROP */
 		  (width * 4) /* dst pitch */);
-	OUT_BATCH(0); /* dst x1,y1 */
-	OUT_BATCH((height << 16) | width); /* dst x2,y2 */
-	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0); /* src x1,y1 */
-	OUT_BATCH(width * 4); /* src pitch */
-	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-
-	intel_batchbuffer_flush(batch);
-
-	drm_intel_bo_unreference(src_bo);
+	intel_bb_out(ibb, 0); /* dst x1,y1 */
+	intel_bb_out(ibb, (height << 16) | width); /* dst x2,y2 */
+	intel_bb_emit_reloc(ibb, dst_buf->handle, I915_GEM_DOMAIN_RENDER,
+			    I915_GEM_DOMAIN_RENDER, 0, dst_buf->addr.offset);
+	intel_bb_out(ibb, 0); /* src x1,y1 */
+	intel_bb_out(ibb, width * 4); /* src pitch */
+	intel_bb_emit_reloc(ibb, src_buf->handle, I915_GEM_DOMAIN_RENDER, 0, 0,
+			    src_buf->addr.offset);
+
+	intel_bb_flush_blit(ibb);
+	intel_buf_use_caching(true);
 }
 
 int main(int argc, char **argv)
 {
 	int fd;
-	int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4;
 	double start_time, end_time;
-	drm_intel_bo *dst_bo;
-	drm_intel_bufmgr *bufmgr;
-	struct intel_batchbuffer *batch;
+	struct intel_buf *dst_buf;
+	struct buf_ops *bops;
+	struct intel_bb *ibb;
 	int i;
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+	intel_buf_use_caching(true);
+	bops = buf_ops_create(fd);
 
-	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+	ibb = intel_bb_create(fd, 4096);
 
-	dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
+	dst_buf = intel_buf_create(bops, OBJECT_WIDTH, OBJECT_HEIGHT, 32, 0,
+				   I915_TILING_NONE, I915_COMPRESSION_NONE);
 
 	/* Prep loop to get us warmed up. */
-	for (i = 0; i < 20; i++) {
-		do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
-	}
-	drm_intel_bo_wait_rendering(dst_bo);
+	for (i = 0; i < 20; i++)
+		do_render(bops, ibb, dst_buf, OBJECT_WIDTH, OBJECT_HEIGHT);
+	intel_bb_sync(ibb);
 
 	/* Do the actual timing. */
 	start_time = get_time_in_secs();
-	for (i = 0; i < 1000; i++) {
-		do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
-	}
-	drm_intel_bo_wait_rendering(dst_bo);
+	for (i = 0; i < 1000; i++)
+		do_render(bops, ibb, dst_buf, OBJECT_WIDTH, OBJECT_HEIGHT);
+	intel_bb_sync(ibb);
 	end_time = get_time_in_secs();
 
 	printf("%d iterations in %.03f secs: %.01f MB/sec\n", i,
@@ -157,8 +158,9 @@ int main(int argc, char **argv)
 	       (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 /
 	       (end_time - start_time));
 
-	intel_batchbuffer_free(batch);
-	drm_intel_bufmgr_destroy(bufmgr);
+	intel_buf_destroy(dst_buf);
+	intel_bb_destroy(ibb);
+	buf_ops_destroy(bops);
 
 	close(fd);
 
-- 
2.20.1

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Re: [igt-dev] [PATCH i-g-t 2/3] lib/intel_bufops: Add simple object cache

[Chris Wilson]

Quoting Dominik Grzegorzek (2020-09-29 11:48:17)
> +struct cache_entry {
> +       int fd;

So we assume that we are not lazy and completely clean up the cache
between subtests in case we reopen the device with the same fd?

For forking, if the parent opened with CLOEXEC, the child could open
the device with the same fd and not know about the parent's poison in
the cache. (This happens with the libdrm_intel cache, can be quite a
nuisance.)

Or not a concern?

> +       uint32_t size;
> +       uint32_t handle;
> +       uint64_t prev_offset;
> +       bool reserved;
> +       bool busy;
> +       struct igt_list_head link;

Consider member layout to reduce holes.
-Chris
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[igt-dev] ✓ Fi.CI.BAT: success for benchmarks: Remove libdrm dependency

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 6242 bytes --]

== Series Details ==

Series: benchmarks: Remove libdrm dependency
URL   : https://patchwork.freedesktop.org/series/82195/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9072 -> IGTPW_5020
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/index.html

Known issues
------------

  Here are the changes found in IGTPW_5020 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@reload:
    - fi-apl-guc:         [PASS][1] -> [DMESG-WARN][2] ([i915#1635] / [i915#1982])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-apl-guc/igt@i915_module_load@reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-apl-guc/igt@i915_module_load@reload.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - fi-icl-u2:          [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@vgem_basic@unload:
    - fi-kbl-x1275:       [PASS][5] -> [DMESG-WARN][6] ([i915#62] / [i915#92])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-kbl-x1275/igt@vgem_basic@unload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-kbl-x1275/igt@vgem_basic@unload.html

  
#### Possible fixes ####

  * {igt@core_hotunplug@unbind-rebind}:
    - fi-kbl-x1275:       [DMESG-WARN][7] ([i915#62] / [i915#92]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-kbl-x1275/igt@core_hotunplug@unbind-rebind.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-kbl-x1275/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-bsw-kefka:       [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@kms_busy@basic@flip:
    - {fi-tgl-dsi}:       [DMESG-WARN][11] ([i915#1982]) -> [PASS][12] +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-tgl-dsi/igt@kms_busy@basic@flip.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-tgl-dsi/igt@kms_busy@basic@flip.html
    - fi-kbl-x1275:       [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-kbl-x1275/igt@kms_busy@basic@flip.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-kbl-x1275/igt@kms_busy@basic@flip.html

  * igt@vgem_basic@unload:
    - fi-skl-guc:         [DMESG-WARN][15] ([i915#2203]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-skl-guc/igt@vgem_basic@unload.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-skl-guc/igt@vgem_basic@unload.html

  
#### Warnings ####

  * igt@debugfs_test@read_all_entries:
    - fi-kbl-x1275:       [DMESG-WARN][17] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][18] ([i915#62] / [i915#92]) +4 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-kbl-x1275/igt@debugfs_test@read_all_entries.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-kbl-x1275/igt@debugfs_test@read_all_entries.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-kbl-x1275:       [DMESG-WARN][19] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][20] ([i915#1982] / [i915#62] / [i915#92] / [i915#95])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-kbl-x1275/igt@gem_exec_suspend@basic-s3.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-kbl-x1275/igt@gem_exec_suspend@basic-s3.html

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-guc:         [SKIP][21] ([fdo#109271]) -> [DMESG-WARN][22] ([i915#2203])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-kbl-x1275:       [DMESG-WARN][23] ([i915#62] / [i915#92]) -> [DMESG-WARN][24] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [i915#289]: https://gitlab.freedesktop.org/drm/intel/issues/289
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (46 -> 39)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5790 -> IGTPW_5020

  CI-20190529: 20190529
  CI_DRM_9072: cbd61a1eb61b1919ff10dd826525b4352c10da47 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_5020: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/index.html
  IGT_5790: 722a3eb9734f04030508d244df9dff55c5ab686c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/index.html

[-- Attachment #1.2: Type: text/html, Size: 8611 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

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[igt-dev] ✗ Fi.CI.IGT: failure for benchmarks: Remove libdrm dependency

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 16204 bytes --]

== Series Details ==

Series: benchmarks: Remove libdrm dependency
URL   : https://patchwork.freedesktop.org/series/82195/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9072_full -> IGTPW_5020_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_5020_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_5020_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_5020_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_render_copy_redux@flink:
    - shard-hsw:          [PASS][1] -> [FAIL][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-hsw6/igt@gem_render_copy_redux@flink.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-hsw1/igt@gem_render_copy_redux@flink.html
    - shard-kbl:          [PASS][3] -> [FAIL][4] +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-kbl1/igt@gem_render_copy_redux@flink.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-kbl7/igt@gem_render_copy_redux@flink.html
    - shard-iclb:         [PASS][5] -> [FAIL][6] +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb2/igt@gem_render_copy_redux@flink.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb8/igt@gem_render_copy_redux@flink.html

  * igt@gem_render_copy_redux@flink-interruptible:
    - shard-glk:          [PASS][7] -> [FAIL][8] +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-glk9/igt@gem_render_copy_redux@flink-interruptible.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-glk7/igt@gem_render_copy_redux@flink-interruptible.html
    - shard-tglb:         [PASS][9] -> [FAIL][10] +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-tglb1/igt@gem_render_copy_redux@flink-interruptible.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-tglb1/igt@gem_render_copy_redux@flink-interruptible.html
    - shard-snb:          [PASS][11] -> [FAIL][12] +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-snb2/igt@gem_render_copy_redux@flink-interruptible.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-snb5/igt@gem_render_copy_redux@flink-interruptible.html

  * igt@kms_vblank@pipe-b-ts-continuation-modeset-hang:
    - shard-hsw:          [PASS][13] -> [INCOMPLETE][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-hsw7/igt@kms_vblank@pipe-b-ts-continuation-modeset-hang.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-hsw7/igt@kms_vblank@pipe-b-ts-continuation-modeset-hang.html

  
Known issues
------------

  Here are the changes found in IGTPW_5020_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_whisper@basic-contexts-forked-all:
    - shard-glk:          [PASS][15] -> [DMESG-WARN][16] ([i915#118] / [i915#95]) +2 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-glk5/igt@gem_exec_whisper@basic-contexts-forked-all.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-glk3/igt@gem_exec_whisper@basic-contexts-forked-all.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         [PASS][17] -> [SKIP][18] ([i915#2190])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-tglb3/igt@gem_huc_copy@huc-copy.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-tglb6/igt@gem_huc_copy@huc-copy.html

  * igt@gem_render_copy_redux@flink-interruptible:
    - shard-apl:          [PASS][19] -> [FAIL][20] ([i915#1635]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-apl8/igt@gem_render_copy_redux@flink-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-apl6/igt@gem_render_copy_redux@flink-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-kbl:          [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +4 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
    - shard-glk:          [PASS][23] -> [FAIL][24] ([i915#49])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-glk4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-glk2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-tglb:         [PASS][25] -> [DMESG-WARN][26] ([i915#1982]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-tglb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-tglb8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-tglb:         [PASS][27] -> [SKIP][28] ([i915#433])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-tglb2/igt@kms_hdmi_inject@inject-audio.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-tglb6/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_prop_blob@invalid-get-prop-any:
    - shard-hsw:          [PASS][29] -> [DMESG-WARN][30] ([i915#1982])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-hsw1/igt@kms_prop_blob@invalid-get-prop-any.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-hsw6/igt@kms_prop_blob@invalid-get-prop-any.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][31] -> [SKIP][32] ([fdo#109642] / [fdo#111068])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb7/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-iclb:         [PASS][33] -> [SKIP][34] ([fdo#109441]) +2 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb6/igt@kms_psr@psr2_cursor_plane_onoff.html

  * igt@kms_vblank@pipe-b-wait-idle:
    - shard-kbl:          [PASS][35] -> [DMESG-WARN][36] ([i915#1982])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-kbl3/igt@kms_vblank@pipe-b-wait-idle.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-kbl1/igt@kms_vblank@pipe-b-wait-idle.html
    - shard-glk:          [PASS][37] -> [DMESG-WARN][38] ([i915#1982])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-glk2/igt@kms_vblank@pipe-b-wait-idle.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-glk7/igt@kms_vblank@pipe-b-wait-idle.html
    - shard-apl:          [PASS][39] -> [DMESG-WARN][40] ([i915#1635] / [i915#1982])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-apl1/igt@kms_vblank@pipe-b-wait-idle.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-apl4/igt@kms_vblank@pipe-b-wait-idle.html

  
#### Possible fixes ####

  * igt@feature_discovery@psr2:
    - shard-iclb:         [SKIP][41] ([i915#658]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb3/igt@feature_discovery@psr2.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb2/igt@feature_discovery@psr2.html

  * {igt@gem_ctx_persistence@heartbeat-close}:
    - shard-tglb:         [FAIL][43] ([i915#2519]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-tglb3/igt@gem_ctx_persistence@heartbeat-close.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-tglb5/igt@gem_ctx_persistence@heartbeat-close.html

  * {igt@gem_ctx_persistence@heartbeat-stop}:
    - shard-iclb:         [FAIL][45] ([i915#2520]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb1/igt@gem_ctx_persistence@heartbeat-stop.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb3/igt@gem_ctx_persistence@heartbeat-stop.html

  * igt@gem_exec_whisper@basic-contexts-priority:
    - shard-glk:          [DMESG-WARN][47] ([i915#118] / [i915#95]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-glk6/igt@gem_exec_whisper@basic-contexts-priority.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-glk5/igt@gem_exec_whisper@basic-contexts-priority.html

  * igt@i915_pm_dc@dc5-psr:
    - shard-iclb:         [FAIL][49] ([i915#1899]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb3/igt@i915_pm_dc@dc5-psr.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb7/igt@i915_pm_dc@dc5-psr.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-0:
    - shard-apl:          [DMESG-WARN][51] ([i915#1635] / [i915#1982]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-apl6/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-apl8/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +5 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_legacy@cursor-vs-flip-toggle:
    - shard-hsw:          [FAIL][55] ([i915#2370]) -> [PASS][56] +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1:
    - shard-iclb:         [DMESG-WARN][57] ([i915#1982]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb8/igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb6/igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2:
    - shard-glk:          [FAIL][59] ([i915#79]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-glk6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
    - shard-tglb:         [DMESG-WARN][61] ([i915#1982]) -> [PASS][62] +2 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][63] ([fdo#109441]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb3/igt@kms_psr@psr2_sprite_plane_move.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_vblank@pipe-a-query-busy:
    - shard-hsw:          [DMESG-WARN][65] ([i915#1982]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-hsw6/igt@kms_vblank@pipe-a-query-busy.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-hsw1/igt@kms_vblank@pipe-a-query-busy.html

  
#### Warnings ####

  * igt@i915_pm_dc@dc5-psr:
    - shard-tglb:         [FAIL][67] ([i915#1899]) -> [DMESG-WARN][68] ([i915#2411])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-tglb2/igt@i915_pm_dc@dc5-psr.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-tglb6/igt@i915_pm_dc@dc5-psr.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [DMESG-WARN][69] ([i915#1226]) -> [SKIP][70] ([fdo#109349])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-iclb7/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-apl:          [FAIL][71] ([fdo#108145] / [i915#1635] / [i915#265]) -> [DMESG-FAIL][72] ([fdo#108145] / [i915#1635] / [i915#1982])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9072/shard-apl4/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1899]: https://gitlab.freedesktop.org/drm/intel/issues/1899
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2370]: https://gitlab.freedesktop.org/drm/intel/issues/2370
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [i915#2519]: https://gitlab.freedesktop.org/drm/intel/issues/2519
  [i915#2520]: https://gitlab.freedesktop.org/drm/intel/issues/2520
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (11 -> 8)
------------------------------

  Missing    (3): pig-skl-6260u pig-glk-j5005 pig-icl-1065g7 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5790 -> IGTPW_5020
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_9072: cbd61a1eb61b1919ff10dd826525b4352c10da47 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_5020: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/index.html
  IGT_5790: 722a3eb9734f04030508d244df9dff55c5ab686c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5020/index.html

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