From: Vladimir Oltean <vladimir.oltean@nxp.com> To: robh+dt@kernel.org, shawnguo@kernel.org, mpe@ellerman.id.au, devicetree@vger.kernel.org Cc: benh@kernel.crashing.org, paulus@samba.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, madalin.bucur@oss.nxp.com, radu-andrei.bulie@nxp.com, fido_max@inbox.ru, Vladimir Oltean <olteanv@gmail.com> Subject: [PATCH v2 devicetree 2/2] powerpc: dts: t1040rdb: add ports for Seville Ethernet switch Date: Tue, 29 Sep 2020 14:32:09 +0300 [thread overview] Message-ID: <20200929113209.3767787-3-vladimir.oltean@nxp.com> (raw) In-Reply-To: <20200929113209.3767787-1-vladimir.oltean@nxp.com> From: Vladimir Oltean <olteanv@gmail.com> Define the network interface names for the switch ports and hook them up to the 2 QSGMII PHYs that are onboard. A conscious decision was taken to go along with the numbers that are written on the front panel of the board and not with the hardware numbers of the switch chip ports. The 2 numbering schemes are shifted by 8. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- Changes in v2: Use the existing way of accessing the mdio bus and not labels. arch/powerpc/boot/dts/fsl/t1040rdb.dts | 115 +++++++++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb.dts b/arch/powerpc/boot/dts/fsl/t1040rdb.dts index 65ff34c49025..3fd08a2b6dcb 100644 --- a/arch/powerpc/boot/dts/fsl/t1040rdb.dts +++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts @@ -64,6 +64,40 @@ mdio@fc000 { phy_sgmii_2: ethernet-phy@3 { reg = <0x03>; }; + + /* VSC8514 QSGMII PHY */ + phy_qsgmii_0: ethernet-phy@4 { + reg = <0x4>; + }; + + phy_qsgmii_1: ethernet-phy@5 { + reg = <0x5>; + }; + + phy_qsgmii_2: ethernet-phy@6 { + reg = <0x6>; + }; + + phy_qsgmii_3: ethernet-phy@7 { + reg = <0x7>; + }; + + /* VSC8514 QSGMII PHY */ + phy_qsgmii_4: ethernet-phy@8 { + reg = <0x8>; + }; + + phy_qsgmii_5: ethernet-phy@9 { + reg = <0x9>; + }; + + phy_qsgmii_6: ethernet-phy@a { + reg = <0xa>; + }; + + phy_qsgmii_7: ethernet-phy@b { + reg = <0xb>; + }; }; }; }; @@ -76,3 +110,84 @@ cpld@3,0 { }; #include "t1040si-post.dtsi" + +&seville_switch { + status = "okay"; +}; + +&seville_port0 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_0>; + phy-mode = "qsgmii"; + /* ETH4 written on chassis */ + label = "swp4"; + status = "okay"; +}; + +&seville_port1 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_1>; + phy-mode = "qsgmii"; + /* ETH5 written on chassis */ + label = "swp5"; + status = "okay"; +}; + +&seville_port2 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_2>; + phy-mode = "qsgmii"; + /* ETH6 written on chassis */ + label = "swp6"; + status = "okay"; +}; + +&seville_port3 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_3>; + phy-mode = "qsgmii"; + /* ETH7 written on chassis */ + label = "swp7"; + status = "okay"; +}; + +&seville_port4 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_4>; + phy-mode = "qsgmii"; + /* ETH8 written on chassis */ + label = "swp8"; + status = "okay"; +}; + +&seville_port5 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_5>; + phy-mode = "qsgmii"; + /* ETH9 written on chassis */ + label = "swp9"; + status = "okay"; +}; + +&seville_port6 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_6>; + phy-mode = "qsgmii"; + /* ETH10 written on chassis */ + label = "swp10"; + status = "okay"; +}; + +&seville_port7 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_7>; + phy-mode = "qsgmii"; + /* ETH11 written on chassis */ + label = "swp11"; + status = "okay"; +}; + +&seville_port8 { + ethernet = <&enet0>; + status = "okay"; +}; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Vladimir Oltean <vladimir.oltean@nxp.com> To: robh+dt@kernel.org, shawnguo@kernel.org, mpe@ellerman.id.au, devicetree@vger.kernel.org Cc: madalin.bucur@oss.nxp.com, linux-kernel@vger.kernel.org, radu-andrei.bulie@nxp.com, fido_max@inbox.ru, paulus@samba.org, netdev@vger.kernel.org, Vladimir Oltean <olteanv@gmail.com>, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 devicetree 2/2] powerpc: dts: t1040rdb: add ports for Seville Ethernet switch Date: Tue, 29 Sep 2020 14:32:09 +0300 [thread overview] Message-ID: <20200929113209.3767787-3-vladimir.oltean@nxp.com> (raw) In-Reply-To: <20200929113209.3767787-1-vladimir.oltean@nxp.com> From: Vladimir Oltean <olteanv@gmail.com> Define the network interface names for the switch ports and hook them up to the 2 QSGMII PHYs that are onboard. A conscious decision was taken to go along with the numbers that are written on the front panel of the board and not with the hardware numbers of the switch chip ports. The 2 numbering schemes are shifted by 8. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- Changes in v2: Use the existing way of accessing the mdio bus and not labels. arch/powerpc/boot/dts/fsl/t1040rdb.dts | 115 +++++++++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb.dts b/arch/powerpc/boot/dts/fsl/t1040rdb.dts index 65ff34c49025..3fd08a2b6dcb 100644 --- a/arch/powerpc/boot/dts/fsl/t1040rdb.dts +++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts @@ -64,6 +64,40 @@ mdio@fc000 { phy_sgmii_2: ethernet-phy@3 { reg = <0x03>; }; + + /* VSC8514 QSGMII PHY */ + phy_qsgmii_0: ethernet-phy@4 { + reg = <0x4>; + }; + + phy_qsgmii_1: ethernet-phy@5 { + reg = <0x5>; + }; + + phy_qsgmii_2: ethernet-phy@6 { + reg = <0x6>; + }; + + phy_qsgmii_3: ethernet-phy@7 { + reg = <0x7>; + }; + + /* VSC8514 QSGMII PHY */ + phy_qsgmii_4: ethernet-phy@8 { + reg = <0x8>; + }; + + phy_qsgmii_5: ethernet-phy@9 { + reg = <0x9>; + }; + + phy_qsgmii_6: ethernet-phy@a { + reg = <0xa>; + }; + + phy_qsgmii_7: ethernet-phy@b { + reg = <0xb>; + }; }; }; }; @@ -76,3 +110,84 @@ cpld@3,0 { }; #include "t1040si-post.dtsi" + +&seville_switch { + status = "okay"; +}; + +&seville_port0 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_0>; + phy-mode = "qsgmii"; + /* ETH4 written on chassis */ + label = "swp4"; + status = "okay"; +}; + +&seville_port1 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_1>; + phy-mode = "qsgmii"; + /* ETH5 written on chassis */ + label = "swp5"; + status = "okay"; +}; + +&seville_port2 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_2>; + phy-mode = "qsgmii"; + /* ETH6 written on chassis */ + label = "swp6"; + status = "okay"; +}; + +&seville_port3 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_3>; + phy-mode = "qsgmii"; + /* ETH7 written on chassis */ + label = "swp7"; + status = "okay"; +}; + +&seville_port4 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_4>; + phy-mode = "qsgmii"; + /* ETH8 written on chassis */ + label = "swp8"; + status = "okay"; +}; + +&seville_port5 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_5>; + phy-mode = "qsgmii"; + /* ETH9 written on chassis */ + label = "swp9"; + status = "okay"; +}; + +&seville_port6 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_6>; + phy-mode = "qsgmii"; + /* ETH10 written on chassis */ + label = "swp10"; + status = "okay"; +}; + +&seville_port7 { + managed = "in-band-status"; + phy-handle = <&phy_qsgmii_7>; + phy-mode = "qsgmii"; + /* ETH11 written on chassis */ + label = "swp11"; + status = "okay"; +}; + +&seville_port8 { + ethernet = <&enet0>; + status = "okay"; +}; -- 2.25.1
next prev parent reply other threads:[~2020-09-29 11:34 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-29 11:32 [PATCH v2 devicetree 0/2] Add Seville Ethernet switch to T1040RDB Vladimir Oltean 2020-09-29 11:32 ` Vladimir Oltean 2020-09-29 11:32 ` [PATCH v2 devicetree 1/2] powerpc: dts: t1040: add bindings for Seville Ethernet switch Vladimir Oltean 2020-09-29 11:32 ` Vladimir Oltean 2020-09-29 13:12 ` Maxim Kochetkov 2020-09-29 13:12 ` Maxim Kochetkov 2020-09-29 11:32 ` Vladimir Oltean [this message] 2020-09-29 11:32 ` [PATCH v2 devicetree 2/2] powerpc: dts: t1040rdb: add ports " Vladimir Oltean 2020-09-29 13:12 ` Maxim Kochetkov 2020-09-29 13:12 ` Maxim Kochetkov 2020-09-29 19:11 ` Andrew Lunn 2020-09-29 19:11 ` Andrew Lunn 2020-09-29 19:39 ` Vladimir Oltean 2020-09-29 19:39 ` Vladimir Oltean 2020-09-29 20:10 ` Andrew Lunn 2020-09-29 20:10 ` Andrew Lunn 2020-09-29 20:33 ` Vladimir Oltean 2020-09-29 20:33 ` Vladimir Oltean 2020-09-29 13:11 ` [PATCH v2 devicetree 0/2] Add Seville Ethernet switch to T1040RDB Maxim Kochetkov 2020-09-29 13:11 ` Maxim Kochetkov
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