[igt-dev] [PATCH i-g-t v3 00/15] tests: Remove libdrm dependency

[igt-dev] [PATCH i-g-t v3 00/15] tests: Remove libdrm dependency

[Dominik Grzegorzek]

I decided to split previous series into smaller chunks.
(https://patchwork.freedesktop.org/series/81782/)
There are some common patches inlcuded in more than one smaller series.
This one removes libdrm usage from tests except prime_* group.

v2: fix mistake introduced in gem_ppgtt
    in gem_pipe_control_store_loop submit Sandy Bridge
    workaround flush in separate batch. Run changed tests in BAT.

v3: rebase onto master
    drop gem_pipe_control_store_loop
    replace busy_buf workload by spinner in \
	unfence_active_buffers and set_tiling_vs_blt

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>

Dominik Grzegorzek (15):
  lib/intel_batchbuffer: add intel_bb_blit_copy wrapper
  Remove unused intel_bufmgr.h headers
  i915/gem_pwrite_snooped: Remove libdrm dependency
  i915/gem_pread_after_blit.c: Remove libdrm dependency
  i915/gem_threaded_access_tiled.c: Remove libdrm dependency
  i915/gem_tiled_blits: Remove libdrm dependency
  i915/gem_unfence_active_buffers.c: Remove librdm dependency
  i915/gem_unref_active_buffers.c: Remove libdrm dependency
  i915/gem_tiled_partial_pwrite_pread: Remove libdrm dependency
  i915/gem_set_tiling_vs_blit.c: Remove libdrm dependency
  tests/kms_fence_pin_leak.c: Remove libdrm dependency
  tests/kms_flip.c: Remove libdrm dependency
  tests/kms_psr2_su.c: Get rid of unused bufmgr
  tests/i915/gem_ppgtt: make copying more readable
  HAX: don't run failing test in BAT

 benchmarks/gem_userptr_benchmark.c          |   1 -
 lib/intel_batchbuffer.c                     |  23 +++
 lib/intel_batchbuffer.h                     |   3 +
 lib/media_fill.c                            |   1 -
 tests/i915/gem_create.c                     |   1 -
 tests/i915/gem_flink_race.c                 |   2 -
 tests/i915/gem_ppgtt.c                      |  16 +-
 tests/i915/gem_pread_after_blit.c           | 135 ++++++------
 tests/i915/gem_pwrite_snooped.c             |  66 +++---
 tests/i915/gem_request_retire.c             |   1 -
 tests/i915/gem_set_tiling_vs_blt.c          | 217 ++++++++++----------
 tests/i915/gem_threaded_access_tiled.c      |  38 ++--
 tests/i915/gem_tiled_blits.c                |  75 +++----
 tests/i915/gem_tiled_partial_pwrite_pread.c | 124 ++++++-----
 tests/i915/gem_unfence_active_buffers.c     | 125 +++++------
 tests/i915/gem_unref_active_buffers.c       |  60 +++---
 tests/i915/gem_userptr_blits.c              |   1 -
 tests/i915/i915_getparams_basic.c           |   1 -
 tests/intel-ci/fast-feedback.testlist       |   1 -
 tests/kms_fence_pin_leak.c                  |  89 ++++----
 tests/kms_flip.c                            |  22 +-
 tests/kms_psr2_su.c                         |   7 -
 tests/kms_sequence.c                        |   2 -
 tests/kms_setmode.c                         |   1 -
 tests/kms_vblank.c                          |   2 -
 25 files changed, 485 insertions(+), 529 deletions(-)

-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 01/15] lib/intel_batchbuffer: add intel_bb_blit_copy wrapper

[Dominik Grzegorzek]

This patch adds intel_bb_copy_intel_buf to make copying a whole
intel_buf easier and more readable.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/intel_batchbuffer.c | 23 +++++++++++++++++++++++
 lib/intel_batchbuffer.h |  3 +++
 2 files changed, 26 insertions(+)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 60dbfe26..d810e10e 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -2521,6 +2521,29 @@ void intel_bb_blt_copy(struct intel_bb *ibb,
 	intel_bb_flush_blit(ibb);
 }
 
+/**
+ * intel_bb_copy_intel_buf:
+ * @batch: batchbuffer object
+ * @src: source buffer (intel_buf)
+ * @dst: destination libdrm buffer object
+ * @size: size of the copy range in bytes
+ *
+ * Emits a copy operation using blitter commands into the supplied batch.
+ * A total of @size bytes from the start of @src is copied
+ * over to @dst. Note that @size must be page-aligned.
+ */
+void intel_bb_copy_intel_buf(struct intel_bb *ibb,
+			     struct intel_buf *src, struct intel_buf *dst,
+			     long int size)
+{
+	igt_assert(size % 4096 == 0);
+
+	intel_bb_blt_copy(ibb,
+			  src, 0, 0, 4096,
+			  dst, 0, 0, 4096,
+			  4096/4, size/4096, 32);
+}
+
 /**
  * igt_get_huc_copyfunc:
  * @devid: pci device id
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index d20b4e66..dd401d89 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -646,6 +646,9 @@ void intel_bb_blt_copy(struct intel_bb *ibb,
 		       struct intel_buf *dst,
 		       int dst_x1, int dst_y1, int dst_pitch,
 		       int width, int height, int bpp);
+void intel_bb_copy_intel_buf(struct intel_bb *ibb,
+			     struct intel_buf *dst, struct intel_buf *src,
+			     long int size);
 
 /**
  * igt_huc_copyfunc_t:
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 02/15] Remove unused intel_bufmgr.h headers

[Dominik Grzegorzek]

Delete intel_bufmgr include where it is not necessary.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 benchmarks/gem_userptr_benchmark.c | 1 -
 lib/media_fill.c                   | 1 -
 tests/i915/gem_create.c            | 1 -
 tests/i915/gem_flink_race.c        | 2 --
 tests/i915/gem_request_retire.c    | 1 -
 tests/i915/gem_userptr_blits.c     | 1 -
 tests/i915/i915_getparams_basic.c  | 1 -
 tests/kms_sequence.c               | 2 --
 tests/kms_setmode.c                | 1 -
 tests/kms_vblank.c                 | 2 --
 10 files changed, 13 deletions(-)

diff --git a/benchmarks/gem_userptr_benchmark.c b/benchmarks/gem_userptr_benchmark.c
index eccc65be..d7a49520 100644
--- a/benchmarks/gem_userptr_benchmark.c
+++ b/benchmarks/gem_userptr_benchmark.c
@@ -48,7 +48,6 @@
 #include "i915_drm.h"
 
 #include "drmtest.h"
-#include "intel_bufmgr.h"
 #include "intel_batchbuffer.h"
 #include "intel_chipset.h"
 #include "ioctl_wrappers.h"
diff --git a/lib/media_fill.c b/lib/media_fill.c
index 8e4da4ec..d758f1f5 100644
--- a/lib/media_fill.c
+++ b/lib/media_fill.c
@@ -22,7 +22,6 @@
  *
  */
 
-#include <intel_bufmgr.h>
 #include <i915_drm.h>
 
 #include "media_fill.h"
diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index c7444d55..dc945ab6 100644
--- a/tests/i915/gem_create.c
+++ b/tests/i915/gem_create.c
@@ -47,7 +47,6 @@
 #include "drm.h"
 #include "drmtest.h"
 #include "ioctl_wrappers.h"
-#include "intel_bufmgr.h"
 #include "intel_batchbuffer.h"
 #include "intel_io.h"
 #include "intel_chipset.h"
diff --git a/tests/i915/gem_flink_race.c b/tests/i915/gem_flink_race.c
index c1f5d5d5..de64443d 100644
--- a/tests/i915/gem_flink_race.c
+++ b/tests/i915/gem_flink_race.c
@@ -33,8 +33,6 @@
 #include <pthread.h>
 #include <errno.h>
 
-#include "intel_bufmgr.h"
-
 IGT_TEST_DESCRIPTION("Check for flink/open vs. gem close races.");
 
 /* Testcase: check for flink/open vs. gem close races
diff --git a/tests/i915/gem_request_retire.c b/tests/i915/gem_request_retire.c
index 4a1ec115..31fb4198 100644
--- a/tests/i915/gem_request_retire.c
+++ b/tests/i915/gem_request_retire.c
@@ -48,7 +48,6 @@
 
 #include "i915/gem.h"
 #include "igt.h"
-#include "intel_bufmgr.h"
 
 IGT_TEST_DESCRIPTION("Collection of tests targeting request retirement code"
 		     " paths.");
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 268423dc..65272c1b 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -62,7 +62,6 @@
 
 #include "i915/gem.h"
 #include "igt.h"
-#include "intel_bufmgr.h"
 #include "sw_sync.h"
 
 #include "eviction_common.c"
diff --git a/tests/i915/i915_getparams_basic.c b/tests/i915/i915_getparams_basic.c
index 7cb210df..e1b4634f 100644
--- a/tests/i915/i915_getparams_basic.c
+++ b/tests/i915/i915_getparams_basic.c
@@ -30,7 +30,6 @@
 #include <errno.h>
 #include <xf86drm.h>
 #include <i915_drm.h>
-#include "intel_bufmgr.h"
 
 IGT_TEST_DESCRIPTION("Tests the export of parameters via DRM_IOCTL_I915_GETPARAM\n");
 
diff --git a/tests/kms_sequence.c b/tests/kms_sequence.c
index a21ab55c..081bd9d7 100644
--- a/tests/kms_sequence.c
+++ b/tests/kms_sequence.c
@@ -42,8 +42,6 @@
 
 #include <drm.h>
 
-#include "intel_bufmgr.h"
-
 IGT_TEST_DESCRIPTION("Test CrtcGetSequence and CrtcQueueSequence.");
 
 typedef struct {
diff --git a/tests/kms_setmode.c b/tests/kms_setmode.c
index 92f3ead2..00dfedd5 100644
--- a/tests/kms_setmode.c
+++ b/tests/kms_setmode.c
@@ -30,7 +30,6 @@
 #include <string.h>
 #include <sys/time.h>
 #include <math.h>
-#include "intel_bufmgr.h"
 
 #define MAX_CONNECTORS  10
 #define MAX_CRTCS       6
diff --git a/tests/kms_vblank.c b/tests/kms_vblank.c
index be001312..b00ebec5 100644
--- a/tests/kms_vblank.c
+++ b/tests/kms_vblank.c
@@ -41,8 +41,6 @@
 
 #include <drm.h>
 
-#include "intel_bufmgr.h"
-
 IGT_TEST_DESCRIPTION("Test speed of WaitVblank.");
 
 typedef struct {
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 03/15] i915/gem_pwrite_snooped: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_pwrite_snooped.c | 66 ++++++++++++++++-----------------
 1 file changed, 33 insertions(+), 33 deletions(-)

diff --git a/tests/i915/gem_pwrite_snooped.c b/tests/i915/gem_pwrite_snooped.c
index 4a339524..52ebaec2 100644
--- a/tests/i915/gem_pwrite_snooped.c
+++ b/tests/i915/gem_pwrite_snooped.c
@@ -42,40 +42,38 @@ IGT_TEST_DESCRIPTION(
    "pwrite to a snooped bo then make it uncached and check that the GPU sees the data.");
 
 static int fd;
-static uint32_t devid;
-static drm_intel_bufmgr *bufmgr;
+static struct buf_ops *bops;
 
-static void blit(drm_intel_bo *dst, drm_intel_bo *src,
+static void blit(struct intel_buf *dst, struct intel_buf *src,
 		 unsigned int width, unsigned int height,
 		 unsigned int dst_pitch, unsigned int src_pitch)
 {
-	struct intel_batchbuffer *batch;
+	struct intel_bb *ibb;
 
-	batch = intel_batchbuffer_alloc(bufmgr, devid);
-	igt_assert(batch);
-
-	BLIT_COPY_BATCH_START(0);
-	OUT_BATCH((3 << 24) | /* 32 bits */
+	ibb = intel_bb_create(fd, 4096);
+	intel_bb_add_intel_buf(ibb, dst, true);
+	intel_bb_add_intel_buf(ibb, src, false);
+	intel_bb_blit_start(ibb, 0);
+	intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 		  (0xcc << 16) | /* copy ROP */
 		  dst_pitch);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH(height << 16 | width);
-	OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH(src_pitch);
-	OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-
-	if (batch->gen >= 6) {
-		BEGIN_BATCH(3, 0);
-		OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
-		OUT_BATCH(0);
-		OUT_BATCH(0);
-		ADVANCE_BATCH();
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, height << 16 | width);
+	intel_bb_emit_reloc_fenced(ibb, dst->handle, I915_GEM_DOMAIN_RENDER,
+				   I915_GEM_DOMAIN_RENDER, 0, dst->addr.offset);
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, src_pitch);
+	intel_bb_emit_reloc_fenced(ibb, src->handle, I915_GEM_DOMAIN_RENDER,
+				   0, 0, src->addr.offset);
+
+	if (ibb->gen >= 6) {
+		intel_bb_out(ibb, XY_SETUP_CLIP_BLT_CMD);
+		intel_bb_out(ibb, 0);
+		intel_bb_out(ibb, 0);
 	}
 
-	intel_batchbuffer_flush(batch);
-	intel_batchbuffer_free(batch);
+	intel_bb_flush_blit(ibb);
+	intel_bb_destroy(ibb);
 }
 
 static void *memchr_inv(const void *s, int c, size_t n)
@@ -98,13 +96,13 @@ static void *memchr_inv(const void *s, int c, size_t n)
 static void test(int w, int h)
 {
 	int object_size = w * h * 4;
-	drm_intel_bo *src, *dst;
+	struct intel_buf *src, *dst;
 	void *buf;
 
-	src = drm_intel_bo_alloc(bufmgr, "src", object_size, 4096);
-	igt_assert(src);
-	dst = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
-	igt_assert(dst);
+	src = intel_buf_create(bops, w, h, 32, 0, I915_TILING_NONE,
+			       I915_COMPRESSION_NONE);
+	dst = intel_buf_create(bops, w, h, 32, 0, I915_TILING_NONE,
+			       I915_COMPRESSION_NONE);
 
 	buf = malloc(object_size);
 	igt_assert(buf);
@@ -125,6 +123,9 @@ static void test(int w, int h)
 	gem_read(fd, dst->handle, 0, buf, object_size);
 
 	igt_assert(memchr_inv(buf, 0xff, object_size) == NULL);
+
+	intel_buf_destroy(src);
+	intel_buf_destroy(dst);
 }
 
 igt_simple_main
@@ -133,11 +134,10 @@ igt_simple_main
 	igt_require_gem(fd);
 	gem_require_blitter(fd);
 
-	devid = intel_get_drm_devid(fd);
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
+	bops = buf_ops_create(fd);
 
 	test(256, 256);
 
-	drm_intel_bufmgr_destroy(bufmgr);
+	buf_ops_destroy(bops);
 	close(fd);
 }
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 04/15] i915/gem_pread_after_blit.c: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_pread_after_blit.c | 135 +++++++++++++++---------------
 1 file changed, 68 insertions(+), 67 deletions(-)

diff --git a/tests/i915/gem_pread_after_blit.c b/tests/i915/gem_pread_after_blit.c
index 81454c93..2086aab0 100644
--- a/tests/i915/gem_pread_after_blit.c
+++ b/tests/i915/gem_pread_after_blit.c
@@ -50,70 +50,69 @@
 
 IGT_TEST_DESCRIPTION("Test pread behavior when getting values out of"
 		     " just-drawn-to buffers.");
-
-static drm_intel_bufmgr *bufmgr;
-struct intel_batchbuffer *batch;
+static struct intel_bb *ibb;
 static const int width = 512, height = 512;
 static const int size = 1024 * 1024;
 
 #define PAGE_SIZE 4096
 
-static drm_intel_bo *
-create_bo(uint32_t val)
+static struct intel_buf *
+create_bo(struct buf_ops *bops, uint32_t val)
 {
-	drm_intel_bo *bo;
+	struct intel_buf *buf;
 	uint32_t *vaddr;
 	int i;
 
-	bo = drm_intel_bo_alloc(bufmgr, "src bo", size, 4096);
+	buf = intel_buf_create(bops, width, height, 32, 0, I915_TILING_NONE,
+			       I915_COMPRESSION_NONE);
 
 	/* Fill the BO with dwords starting at start_val */
-	drm_intel_bo_map(bo, 1);
-	vaddr = bo->virtual;
+	intel_buf_cpu_map(buf, 1);
+	vaddr = buf->ptr;
 
 	for (i = 0; i < 1024 * 1024 / 4; i++)
 		vaddr[i] = val++;
 
-	drm_intel_bo_unmap(bo);
+	intel_buf_unmap(buf);
 
-	return bo;
+	return buf;
 }
 
 static void
-verify_large_read(drm_intel_bo *bo, uint32_t val)
+verify_large_read(int fd, struct intel_buf *buf, uint32_t val)
 {
-	uint32_t buf[size / 4];
+	uint32_t tmp[size / 4];
 	int i;
 
-	drm_intel_bo_get_subdata(bo, 0, size, buf);
+	gem_read(fd, buf->handle, 0, tmp, size);
 
 	for (i = 0; i < size / 4; i++) {
-		igt_assert_f(buf[i] == val,
+		igt_assert_f(tmp[i] == val,
 			     "Unexpected value 0x%08x instead of "
 			     "0x%08x at offset 0x%08x (%p)\n",
-			     buf[i], val, i * 4, buf);
+			     tmp[i], val, i * 4, tmp);
 		val++;
 	}
 }
 
 /** This reads at the size that Mesa usees for software fallbacks. */
 static void
-verify_small_read(drm_intel_bo *bo, uint32_t val)
+verify_small_read(int fd, struct intel_buf *buf, uint32_t val)
 {
-	uint32_t buf[4096 / 4];
+	uint32_t tmp[4096 / 4];
 	int offset, i;
 
 	for (i = 0; i < 4096 / 4; i++)
-		buf[i] = 0x00c0ffee;
+		tmp[i] = 0x00c0ffee;
 
 	for (offset = 0; offset < size; offset += PAGE_SIZE) {
-		drm_intel_bo_get_subdata(bo, offset, PAGE_SIZE, buf);
+		gem_read(fd, buf->handle, offset, tmp, PAGE_SIZE);
 
 		for (i = 0; i < PAGE_SIZE; i += 4) {
-			igt_assert_f(buf[i / 4] == val,
+			igt_assert_f(tmp[i / 4] == val,
 				     "Unexpected value 0x%08x instead of "
 				     "0x%08x at offset 0x%08x\n",
-				     buf[i / 4], val, i * 4);
+				     tmp[i / 4], val, i * 4);
 			val++;
 		}
 	}
@@ -128,16 +127,17 @@ static igt_hang_t no_hang(int fd)
 
 static igt_hang_t bcs_hang(int fd)
 {
-	return igt_hang_ring(fd, batch->gen >= 6 ? I915_EXEC_BLT : I915_EXEC_DEFAULT);
+	return igt_hang_ring(fd, ibb->gen >= 6 ? I915_EXEC_BLT : I915_EXEC_DEFAULT);
 }
 
-static void do_test(int fd, int cache_level,
-		    drm_intel_bo *src[2],
+static void do_test(struct buf_ops *bops, int cache_level,
+		    struct intel_buf *src[2],
 		    const uint32_t start[2],
-		    drm_intel_bo *tmp[2],
+		    struct intel_buf *tmp[2],
 		    int loop, do_hang do_hang_func)
 {
 	igt_hang_t hang;
+	int fd = buf_ops_get_fd(bops);
 
 	if (cache_level != -1) {
 		gem_set_caching(fd, tmp[0]->handle, cache_level);
@@ -146,55 +146,52 @@ static void do_test(int fd, int cache_level,
 
 	do {
 		/* First, do a full-buffer read after blitting */
-		intel_copy_bo(batch, tmp[0], src[0], width*height*4);
+		intel_bb_copy_intel_buf(ibb, src[0], tmp[0], size);
 		hang = do_hang_func(fd);
-		verify_large_read(tmp[0], start[0]);
+		verify_large_read(fd, tmp[0], start[0]);
 		igt_post_hang_ring(fd, hang);
-		intel_copy_bo(batch, tmp[0], src[1], width*height*4);
+		intel_bb_copy_intel_buf(ibb, src[1], tmp[0], size);
 		hang = do_hang_func(fd);
-		verify_large_read(tmp[0], start[1]);
+		verify_large_read(fd, tmp[0], start[1]);
 		igt_post_hang_ring(fd, hang);
 
-		intel_copy_bo(batch, tmp[0], src[0], width*height*4);
+		intel_bb_copy_intel_buf(ibb, src[0], tmp[0], size);
 		hang = do_hang_func(fd);
-		verify_small_read(tmp[0], start[0]);
+		verify_small_read(fd, tmp[0], start[0]);
 		igt_post_hang_ring(fd, hang);
-		intel_copy_bo(batch, tmp[0], src[1], width*height*4);
+		intel_bb_copy_intel_buf(ibb, src[1], tmp[0], size);
 		hang = do_hang_func(fd);
-		verify_small_read(tmp[0], start[1]);
+		verify_small_read(fd, tmp[0], start[1]);
 		igt_post_hang_ring(fd, hang);
 
-		intel_copy_bo(batch, tmp[0], src[0], width*height*4);
+		intel_bb_copy_intel_buf(ibb, src[0], tmp[0], size);
 		hang = do_hang_func(fd);
-		verify_large_read(tmp[0], start[0]);
+		verify_large_read(fd, tmp[0], start[0]);
 		igt_post_hang_ring(fd, hang);
 
-		intel_copy_bo(batch, tmp[0], src[0], width*height*4);
-		intel_copy_bo(batch, tmp[1], src[1], width*height*4);
+		intel_bb_copy_intel_buf(ibb, src[0], tmp[0], size);
+		intel_bb_copy_intel_buf(ibb, src[1], tmp[1], size);
 		hang = do_hang_func(fd);
-		verify_large_read(tmp[0], start[0]);
-		verify_large_read(tmp[1], start[1]);
+		verify_large_read(fd, tmp[0], start[0]);
+		verify_large_read(fd, tmp[1], start[1]);
 		igt_post_hang_ring(fd, hang);
 
-		intel_copy_bo(batch, tmp[0], src[0], width*height*4);
-		intel_copy_bo(batch, tmp[1], src[1], width*height*4);
+		intel_bb_copy_intel_buf(ibb, src[0], tmp[0], size);
+		intel_bb_copy_intel_buf(ibb, src[1], tmp[1], size);
 		hang = do_hang_func(fd);
-		verify_large_read(tmp[1], start[1]);
-		verify_large_read(tmp[0], start[0]);
+		verify_large_read(fd, tmp[1], start[1]);
+		verify_large_read(fd, tmp[0], start[0]);
 		igt_post_hang_ring(fd, hang);
 
-		intel_copy_bo(batch, tmp[1], src[0], width*height*4);
-		intel_copy_bo(batch, tmp[0], src[1], width*height*4);
+		intel_bb_copy_intel_buf(ibb, src[0], tmp[1], size);
+		intel_bb_copy_intel_buf(ibb, src[1], tmp[0], size);
 		hang = do_hang_func(fd);
-		verify_large_read(tmp[0], start[1]);
-		verify_large_read(tmp[1], start[0]);
+		verify_large_read(fd, tmp[0], start[1]);
+		verify_large_read(fd, tmp[1], start[0]);
 		igt_post_hang_ring(fd, hang);
 	} while (--loop);
 }
 
-drm_intel_bo *src[2], *dst[2];
-int fd;
-
 igt_main
 {
 	const uint32_t start[2] = {0, 1024 * 1024 / 4};
@@ -208,43 +205,47 @@ igt_main
 		{ "display", 2 },
 		{ NULL, -1 },
 	}, *t;
+	struct intel_buf *src[2], *dst[2];
+	struct buf_ops *bops;
+	int fd;
 
 	igt_fixture {
 		fd = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(fd);
 
-		bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-		drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-		batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+		bops = buf_ops_create(fd);
+		ibb = intel_bb_create(fd, 4096);
 
-		src[0] = create_bo(start[0]);
-		src[1] = create_bo(start[1]);
+		src[0] = create_bo(bops, start[0]);
+		src[1] = create_bo(bops, start[1]);
 
-		dst[0] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096);
-		dst[1] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096);
+		dst[0] = intel_buf_create(bops, width, height, 32, 4096,
+					  I915_TILING_NONE, I915_COMPRESSION_NONE);
+		dst[1] = intel_buf_create(bops, width, height, 32, 4096,
+					  I915_TILING_NONE, I915_COMPRESSION_NONE);
 	}
 
 	for (t = tests; t->name; t++) {
 		igt_subtest_f("%s-normal", t->name)
-			do_test(fd, t->cache, src, start, dst, 1, no_hang);
+			do_test(bops, t->cache, src, start, dst, 1, no_hang);
 
 		igt_fork_signal_helper();
 		igt_subtest_f("%s-interruptible", t->name)
-			do_test(fd, t->cache, src, start, dst, 100, no_hang);
+			do_test(bops, t->cache, src, start, dst, 100, no_hang);
 		igt_stop_signal_helper();
 
 		igt_subtest_f("%s-hang", t->name)
-			do_test(fd, t->cache, src, start, dst, 1, bcs_hang);
+			do_test(bops, t->cache, src, start, dst, 1, bcs_hang);
 	}
 
 	igt_fixture {
-		drm_intel_bo_unreference(src[0]);
-		drm_intel_bo_unreference(src[1]);
-		drm_intel_bo_unreference(dst[0]);
-		drm_intel_bo_unreference(dst[1]);
+		intel_buf_destroy(src[0]);
+		intel_buf_destroy(src[1]);
+		intel_buf_destroy(dst[0]);
+		intel_buf_destroy(dst[1]);
 
-		intel_batchbuffer_free(batch);
-		drm_intel_bufmgr_destroy(bufmgr);
+		intel_bb_destroy(ibb);
+		buf_ops_destroy(bops);
 	}
 
 	igt_fixture
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 05/15] i915/gem_threaded_access_tiled.c: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_threaded_access_tiled.c | 38 ++++++++++++--------------
 1 file changed, 18 insertions(+), 20 deletions(-)

diff --git a/tests/i915/gem_threaded_access_tiled.c b/tests/i915/gem_threaded_access_tiled.c
index 6442d589..47b2962e 100644
--- a/tests/i915/gem_threaded_access_tiled.c
+++ b/tests/i915/gem_threaded_access_tiled.c
@@ -31,8 +31,6 @@
 #include <unistd.h>
 #include <pthread.h>
 
-#include "intel_bufmgr.h"
-
 IGT_TEST_DESCRIPTION("Check parallel access to tiled memory.");
 
 /* Testcase: check parallel access to tiled memory
@@ -45,10 +43,10 @@ IGT_TEST_DESCRIPTION("Check parallel access to tiled memory.");
 #define HEIGHT 4096
 
 struct thread_ctx {
-	drm_intel_bo *bo;
+	struct intel_buf *buf;
 };
 
-static drm_intel_bufmgr *bufmgr;
+static struct buf_ops *bops;
 static struct thread_ctx tctx[NUM_THREADS];
 
 static void *copy_fn(void *p)
@@ -60,13 +58,13 @@ static void *copy_fn(void *p)
 	if (buf == NULL)
 		return (void *)1;
 
-	memcpy(buf, c->bo->virtual, WIDTH * HEIGHT);
+	memcpy(buf, c->buf->ptr, WIDTH * HEIGHT);
 
 	free(buf);
 	return (void *)0;
 }
 
-static int copy_tile_threaded(drm_intel_bo *bo)
+static int copy_tile_threaded(struct intel_buf *buf)
 {
 	int i;
 	int r;
@@ -74,7 +72,7 @@ static int copy_tile_threaded(drm_intel_bo *bo)
 	void *status;
 
 	for (i = 0; i < NUM_THREADS; i++) {
-		tctx[i].bo = bo;
+		tctx[i].buf = buf;
 		r = pthread_create(&thr[i], NULL, copy_fn, (void *)&tctx[i]);
 		igt_assert_eq(r, 0);
 	}
@@ -90,9 +88,8 @@ static int copy_tile_threaded(drm_intel_bo *bo)
 igt_simple_main
 {
 	int fd;
-	drm_intel_bo *bo;
+	struct intel_buf *buf;
 	uint32_t tiling_mode = I915_TILING_Y;
-	unsigned long pitch = 0;
 	int r;
 
 	fd = drm_open_driver(DRIVER_INTEL);
@@ -100,24 +97,25 @@ igt_simple_main
 
 	igt_require(gem_available_fences(fd) > 0);
 
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	igt_assert(bufmgr);
+	bops = buf_ops_create(fd);
 
-	bo = drm_intel_bo_alloc_tiled(bufmgr, "mmap bo", WIDTH, HEIGHT, 1,
-				      &tiling_mode, &pitch, 0);
-	igt_assert(bo);
+	buf = intel_buf_create(bops, WIDTH, HEIGHT, 8, 0, tiling_mode,
+			       I915_COMPRESSION_NONE);
+	igt_assert(buf);
 
-	r = drm_intel_gem_bo_map_gtt(bo);
-	igt_assert(!r);
+	buf->ptr = __gem_mmap__gtt(fd, buf->handle, buf->surface[0].size,
+				   PROT_WRITE | PROT_READ);
+	igt_assert(buf->ptr);
 
-	r = copy_tile_threaded(bo);
+	r = copy_tile_threaded(buf);
 	igt_assert(!r);
 
-	r = drm_intel_gem_bo_unmap_gtt(bo);
+	r = gem_munmap(buf->ptr, buf->surface[0].size);
+	buf->ptr = NULL;
 	igt_assert(!r);
 
-	drm_intel_bo_unreference(bo);
-	drm_intel_bufmgr_destroy(bufmgr);
+	intel_buf_destroy(buf);
+	buf_ops_destroy(bops);
 
 	close(fd);
 }
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 06/15] i915/gem_tiled_blits: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_tiled_blits.c | 75 ++++++++++++++++++------------------
 1 file changed, 38 insertions(+), 37 deletions(-)

diff --git a/tests/i915/gem_tiled_blits.c b/tests/i915/gem_tiled_blits.c
index 36e96785..2149f27f 100644
--- a/tests/i915/gem_tiled_blits.c
+++ b/tests/i915/gem_tiled_blits.c
@@ -60,49 +60,51 @@ IGT_TEST_DESCRIPTION("Test doing many tiled blits, with a working set larger"
 
 static int width = 512, height = 512;
 
-static drm_intel_bo *
-create_bo(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, uint32_t x)
+static struct intel_buf *
+create_bo(struct buf_ops *bops, struct intel_bb *ibb, uint32_t x)
 {
-	drm_intel_bo *bo, *linear_bo;
+	struct intel_buf *buf, *linear_buf;
 	uint32_t *linear;
 	uint32_t tiling = I915_TILING_X;
 	int i;
 
-	bo = drm_intel_bo_alloc(bufmgr, "tiled bo", 1024 * 1024, 4096);
-	do_or_die(drm_intel_bo_set_tiling(bo, &tiling, width * 4));
-	igt_assert(tiling == I915_TILING_X);
+	buf = intel_buf_create(bops, width, height, 32, 0, tiling,
+			       I915_COMPRESSION_NONE);
 
-	linear_bo = drm_intel_bo_alloc(bufmgr, "linear src", 1024 * 1024, 4096);
+	linear_buf = intel_buf_create(bops, width, height, 32, 0,
+				      I915_TILING_NONE, I915_COMPRESSION_NONE);
 
 	/* Fill the BO with dwords starting at start_val */
-	do_or_die(drm_intel_bo_map(linear_bo, 1));
-	linear = linear_bo->virtual;
+	intel_buf_cpu_map(linear_buf, 1);
+	linear = linear_buf->ptr;
 	for (i = 0; i < 1024 * 1024 / 4; i++)
 		linear[i] = x++;
-	drm_intel_bo_unmap(linear_bo);
+	intel_buf_unmap(linear_buf);
 
-	intel_copy_bo (batch, bo, linear_bo, width*height*4);
+	intel_bb_copy_intel_buf(ibb, linear_buf, buf, width*height*4);
+	intel_bb_reset(ibb, true);
 
-	drm_intel_bo_unreference(linear_bo);
+	intel_buf_destroy(linear_buf);
 
-	return bo;
+	return buf;
 }
 
 static void
-check_bo(drm_intel_bo *bo, uint32_t val, struct intel_batchbuffer *batch)
+check_bo(struct intel_buf *buf, uint32_t val, struct intel_bb *ibb)
 {
-	drm_intel_bo *linear_bo;
+	struct intel_buf *linear_buf;
 	uint32_t *linear;
 	int num_errors;
 	int i;
 
-	linear_bo = drm_intel_bo_alloc(bo->bufmgr, "linear dst",
-				       1024 * 1024, 4096);
+	linear_buf = intel_buf_create(buf->bops, width, height, 32, 0,
+				      I915_TILING_NONE, I915_COMPRESSION_NONE);
 
-	intel_copy_bo(batch, linear_bo, bo, width*height*4);
+	intel_bb_copy_intel_buf(ibb, buf, linear_buf, width*height*4);
+	intel_bb_reset(ibb, true);
 
-	do_or_die(drm_intel_bo_map(linear_bo, 0));
-	linear = linear_bo->virtual;
+	intel_buf_cpu_map(linear_buf, 0);
+	linear = linear_buf->ptr;
 
 	num_errors = 0;
 	for (i = 0; i < 1024 * 1024 / 4; i++) {
@@ -112,31 +114,28 @@ check_bo(drm_intel_bo *bo, uint32_t val, struct intel_batchbuffer *batch)
 		val++;
 	}
 	igt_assert_eq(num_errors, 0);
-	drm_intel_bo_unmap(linear_bo);
+	intel_buf_unmap(linear_buf);
 
-	drm_intel_bo_unreference(linear_bo);
+	intel_buf_destroy(linear_buf);
 }
 
 static void run_test(int fd, int count)
 {
-	struct intel_batchbuffer *batch;
-	drm_intel_bufmgr *bufmgr;
-	drm_intel_bo **bo;
+	struct intel_bb *ibb;
+	struct buf_ops *bops;
+	struct intel_buf **bo;
 	uint32_t *bo_start_val;
 	uint32_t start = 0;
 	int i;
 
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32);
-	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+	bops = buf_ops_create(fd);
+	ibb = intel_bb_create(fd, 4096);
 
-
-	bo = malloc(sizeof(drm_intel_bo *)*count);
+	bo = malloc(sizeof(struct intel_buf *)*count);
 	bo_start_val = malloc(sizeof(uint32_t)*count);
 
 	for (i = 0; i < count; i++) {
-		bo[i] = create_bo(bufmgr, batch, start);
+		bo[i] = create_bo(bops, ibb, start);
 		bo_start_val[i] = start;
 		start += 1024 * 1024 / 4;
 	}
@@ -148,20 +147,22 @@ static void run_test(int fd, int count)
 		if (src == dst)
 			continue;
 
-		intel_copy_bo(batch, bo[dst], bo[src], width*height*4);
+		intel_bb_copy_intel_buf(ibb, bo[src], bo[dst], width*height*4);
+		intel_bb_reset(ibb, true);
+
 		bo_start_val[dst] = bo_start_val[src];
 	}
 
 	for (i = 0; i < count; i++) {
-		check_bo(bo[i], bo_start_val[i], batch);
-		drm_intel_bo_unreference(bo[i]);
+		check_bo(bo[i], bo_start_val[i], ibb);
+		intel_buf_destroy(bo[i]);
 	}
 
 	free(bo_start_val);
 	free(bo);
 
-	intel_batchbuffer_free(batch);
-	drm_intel_bufmgr_destroy(bufmgr);
+	intel_bb_destroy(ibb);
+	buf_ops_destroy(bops);
 }
 
 #define MAX_32b ((1ull << 32) - 4096)
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 07/15] i915/gem_unfence_active_buffers.c: Remove librdm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.
The difference between offsets proposed from kernel using intel_bb
instead of libdrm is caused by EXEC_OBJECT_SUPPORTS_48B_ADDRESS set on
every object.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_unfence_active_buffers.c | 125 +++++++++---------------
 1 file changed, 46 insertions(+), 79 deletions(-)

diff --git a/tests/i915/gem_unfence_active_buffers.c b/tests/i915/gem_unfence_active_buffers.c
index 1e69c70d..dd92c4ab 100644
--- a/tests/i915/gem_unfence_active_buffers.c
+++ b/tests/i915/gem_unfence_active_buffers.c
@@ -51,24 +51,24 @@
 #include "drm.h"
 #include "i915/gem.h"
 #include "igt.h"
-#include "intel_bufmgr.h"
 
 IGT_TEST_DESCRIPTION("Check for use-after-free in the fence stealing code.");
 
-static drm_intel_bufmgr *bufmgr;
-struct intel_batchbuffer *batch;
-uint32_t devid;
-
 #define TEST_SIZE (1024*1024)
 #define TEST_STRIDE (4*1024)
+#define TEST_HEIGHT (TEST_SIZE/TEST_STRIDE)
+#define TEST_WIDTH (TEST_STRIDE/4)
 
 uint32_t data[TEST_SIZE/4];
 
 igt_simple_main
 {
-	int i, ret, fd, num_fences;
-	drm_intel_bo *busy_bo, *test_bo;
-	uint32_t tiling = I915_TILING_X;
+	int i, fd, num_fences;
+	struct intel_bb *ibb;
+	struct buf_ops *bops;
+	struct intel_buf *test_buf;
+	igt_spin_t *busy;
+	uint32_t ring = I915_EXEC_DEFAULT;
 
 	for (i = 0; i < 1024*256; i++)
 		data[i] = i;
@@ -77,86 +77,53 @@ igt_simple_main
 	igt_require_gem(fd);
 	gem_require_blitter(fd);
 
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-	devid = intel_get_drm_devid(fd);
-	batch = intel_batchbuffer_alloc(bufmgr, devid);
+	bops = buf_ops_create(fd);
+	ibb = intel_bb_create_with_relocs(fd, 4096);
 
 	igt_info("filling ring\n");
-	busy_bo = drm_intel_bo_alloc(bufmgr, "busy bo bo", 16*1024*1024, 4096);
-
-	for (i = 0; i < 250; i++) {
-		BLIT_COPY_BATCH_START(0);
-		OUT_BATCH((3 << 24) | /* 32 bits */
-			  (0xcc << 16) | /* copy ROP */
-			  2*1024*4);
-		OUT_BATCH(0 << 16 | 1024);
-		OUT_BATCH((2048) << 16 | (2048));
-		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		OUT_BATCH(0 << 16 | 0);
-		OUT_BATCH(2*1024*4);
-		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		ADVANCE_BATCH();
-
-		if (batch->gen >= 6) {
-			BEGIN_BATCH(3, 0);
-			OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-			ADVANCE_BATCH();
-		}
-	}
-	intel_batchbuffer_flush(batch);
+	if (HAS_BLT_RING(ibb->devid))
+		ring = I915_EXEC_BLT;
+	busy = igt_spin_new(fd, .ctx = gem_context_create(fd), .engine = ring);
 
 	num_fences = gem_available_fences(fd);
 	igt_info("creating havoc on %i fences\n", num_fences);
 
 	for (i = 0; i < num_fences*2; i++) {
-		test_bo = drm_intel_bo_alloc(bufmgr, "test_bo",
-					     TEST_SIZE, 4096);
-		ret = drm_intel_bo_set_tiling(test_bo, &tiling, TEST_STRIDE);
-		igt_assert(ret == 0);
-
-		drm_intel_bo_disable_reuse(test_bo);
-
-		BLIT_COPY_BATCH_START(0);
-		OUT_BATCH((3 << 24) | /* 32 bits */
+		test_buf = intel_buf_create(bops, TEST_WIDTH, TEST_HEIGHT,
+					    32, 0, I915_TILING_X,
+					    I915_COMPRESSION_NONE);
+		igt_assert(TEST_STRIDE == test_buf->surface[0].stride);
+
+		intel_bb_add_intel_buf(ibb, test_buf, true);
+		intel_bb_blit_start(ibb, 0);
+		intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 			  (0xcc << 16) | /* copy ROP */
 			  TEST_STRIDE);
-		OUT_BATCH(0 << 16 | 0);
-		OUT_BATCH((1) << 16 | (1));
-		OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		OUT_BATCH(0 << 16 | 0);
-		OUT_BATCH(TEST_STRIDE);
-		OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		ADVANCE_BATCH();
-		intel_batchbuffer_flush(batch);
-		igt_info("test bo offset: %#lx\n", test_bo->offset);
-
-		drm_intel_bo_unreference(test_bo);
+		intel_bb_out(ibb, 0 << 16 | 0);
+		intel_bb_out(ibb, (1) << 16 | (1));
+		intel_bb_emit_reloc_fenced(ibb, test_buf->handle,
+					   I915_GEM_DOMAIN_RENDER,
+					   I915_GEM_DOMAIN_RENDER, 0, 0x0);
+		intel_bb_out(ibb, 0 << 16 | 0);
+		intel_bb_out(ibb, TEST_STRIDE);
+		intel_bb_emit_reloc_fenced(ibb, test_buf->handle,
+					   I915_GEM_DOMAIN_RENDER, 0, 0, 0x0);
+
+		intel_bb_flush_blit(ibb);
+		igt_info("test bo offset: %#lx\n",
+			 intel_bb_get_object_offset(ibb, test_buf->handle));
+
+		intel_buf_destroy(test_buf);
+		intel_bb_reset(ibb, true);
 	}
 
-	/* launch a few batchs to ensure the damaged slab objects get reused. */
-	for (i = 0; i < 10; i++) {
-		BLIT_COPY_BATCH_START(0);
-		OUT_BATCH((3 << 24) | /* 32 bits */
-			  (0xcc << 16) | /* copy ROP */
-			  2*1024*4);
-		OUT_BATCH(0 << 16 | 1024);
-		OUT_BATCH((1) << 16 | (1));
-		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		OUT_BATCH(0 << 16 | 0);
-		OUT_BATCH(2*1024*4);
-		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		ADVANCE_BATCH();
-
-		if (batch->gen >= 8) {
-			BEGIN_BATCH(3, 0);
-			OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-			ADVANCE_BATCH();
-		}
-	}
-	intel_batchbuffer_flush(batch);
+	/* launch a few batchs to ensure the damaged slab object get reused. */
+	igt_spin_end(busy);
+	for (i = 0; i < 10; i++)
+		gem_execbuf(fd, &busy->execbuf);
+
+	gem_context_destroy(fd, busy->execbuf.rsvd1);
+	igt_spin_free(fd, busy);
+	intel_bb_destroy(ibb);
+	buf_ops_destroy(bops);
 }
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 08/15] i915/gem_unref_active_buffers.c: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_unref_active_buffers.c | 60 +++++++++++++--------------
 1 file changed, 29 insertions(+), 31 deletions(-)

diff --git a/tests/i915/gem_unref_active_buffers.c b/tests/i915/gem_unref_active_buffers.c
index 75394794..361e947c 100644
--- a/tests/i915/gem_unref_active_buffers.c
+++ b/tests/i915/gem_unref_active_buffers.c
@@ -29,8 +29,7 @@
  * Testcase: Unreferencing of active buffers
  *
  * Execs buffers and immediately unreferences them, hence the kernel active list
- * will be the last one to hold a reference on them. Usually libdrm bo caching
- * prevents that by keeping another reference.
+ * will be the last one to hold a reference on them.
  */
 #include <stdlib.h>
 #include <stdio.h>
@@ -44,55 +43,54 @@
 #include "drm.h"
 #include "i915/gem.h"
 #include "igt.h"
-#include "intel_bufmgr.h"
 
 IGT_TEST_DESCRIPTION("Test unreferencing of active buffers.");
 
-static drm_intel_bufmgr *bufmgr;
-struct intel_batchbuffer *batch;
-static drm_intel_bo *load_bo;
-
 igt_simple_main
 {
+	struct intel_buf *load_bo;
+	struct intel_bb *ibb;
+	struct buf_ops *bops;
 	int fd, i;
 
 	fd = drm_open_driver(DRIVER_INTEL);
 	igt_require_gem(fd);
 	gem_require_blitter(fd);
 
-	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-	igt_assert(bufmgr);
-	/* don't enable buffer reuse!! */
-	//drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-
-	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
-	igt_assert(batch);
+	bops = buf_ops_create(fd);
+	ibb = intel_bb_create_with_relocs(fd, 4096);
 
 	/* put some load onto the gpu to keep the light buffers active for long
 	 * enough */
 	for (i = 0; i < 1000; i++) {
-		load_bo = drm_intel_bo_alloc(bufmgr, "target bo", 1024*4096, 4096);
-		igt_assert(load_bo);
+		load_bo = intel_buf_create(bops, 2048, 2048, 32, 0,
+					   I915_TILING_NONE,
+					   I915_COMPRESSION_NONE);
 
-		BLIT_COPY_BATCH_START(0);
-		OUT_BATCH((3 << 24) | /* 32 bits */
-			  (0xcc << 16) | /* copy ROP */
-			  4096);
-		OUT_BATCH(0); /* dst x1,y1 */
-		OUT_BATCH((1024 << 16) | 512);
-		OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
-		OUT_BATCH(4096);
-		OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		ADVANCE_BATCH();
+		intel_bb_add_intel_buf(ibb, load_bo, true);
+		intel_bb_blit_start(ibb, 0);
+		intel_bb_out(ibb, (3 << 24) | /* 32 bits */
+			     (0xcc << 16) | /* copy ROP */
+			     4096);
+		intel_bb_out(ibb, 0); /* dst x1,y1 */
+		intel_bb_out(ibb, (1024 << 16) | 512);
+		intel_bb_emit_reloc_fenced(ibb, load_bo->handle,
+					   I915_GEM_DOMAIN_RENDER,
+					   I915_GEM_DOMAIN_RENDER, 0, 0x0);
+		intel_bb_out(ibb, (0 << 16) | 512); /* src x1, y1 */
+		intel_bb_out(ibb, 4096);
+		intel_bb_emit_reloc_fenced(ibb, load_bo->handle,
+					   I915_GEM_DOMAIN_RENDER,
+					   0, 0, 0x0);
 
-		intel_batchbuffer_flush(batch);
+		intel_bb_flush_blit(ibb);
 
-		drm_intel_bo_disable_reuse(load_bo);
-		drm_intel_bo_unreference(load_bo);
+		intel_buf_destroy(load_bo);
+		intel_bb_reset(ibb, true);
 	}
 
-	drm_intel_bufmgr_destroy(bufmgr);
+	intel_bb_destroy(ibb);
+	buf_ops_destroy(bops);
 
 	close(fd);
 }
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 09/15] i915/gem_tiled_partial_pwrite_pread: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_tiled_partial_pwrite_pread.c | 124 ++++++++++----------
 1 file changed, 61 insertions(+), 63 deletions(-)

diff --git a/tests/i915/gem_tiled_partial_pwrite_pread.c b/tests/i915/gem_tiled_partial_pwrite_pread.c
index 7de5358b..ead63087 100644
--- a/tests/i915/gem_tiled_partial_pwrite_pread.c
+++ b/tests/i915/gem_tiled_partial_pwrite_pread.c
@@ -53,68 +53,70 @@ IGT_TEST_DESCRIPTION("Test pwrite/pread consistency when touching partial"
  *
  */
 
-static drm_intel_bufmgr *bufmgr;
-struct intel_batchbuffer *batch;
+static struct buf_ops *bops;
+static struct intel_bb *ibb;
 
-drm_intel_bo *scratch_bo;
-drm_intel_bo *staging_bo;
-drm_intel_bo *tiled_staging_bo;
-unsigned long scratch_pitch;
+struct intel_buf *scratch_buf;
+struct intel_buf *staging_buf;
+struct intel_buf *tiled_staging_buf;
 #define BO_SIZE (32*4096)
-uint32_t devid;
 int fd;
 
 static void
-copy_bo(drm_intel_bo *src, int src_tiled,
-	drm_intel_bo *dst, int dst_tiled)
+copy_bo(struct intel_buf *src, int src_tiled,
+	struct intel_buf *dst, int dst_tiled)
 {
-	unsigned long dst_pitch = scratch_pitch;
-	unsigned long src_pitch = scratch_pitch;
+	unsigned long dst_pitch = dst->surface[0].stride;
+	unsigned long src_pitch = src->surface[0].stride;
+	unsigned long scratch_pitch = src->surface[0].stride;
 	uint32_t cmd_bits = 0;
 
 	/* dst is tiled ... */
-	if (intel_gen(devid) >= 4 && dst_tiled) {
+	if (ibb->gen >= 4 && dst_tiled) {
 		dst_pitch /= 4;
 		cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
 	}
 
-	if (intel_gen(devid) >= 4 && dst_tiled) {
+	if (ibb->gen >= 4 && src_tiled) {
 		src_pitch /= 4;
 		cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
 	}
 
-	BLIT_COPY_BATCH_START(cmd_bits);
-	OUT_BATCH((3 << 24) | /* 32 bits */
+	intel_bb_add_intel_buf(ibb, dst, true);
+	intel_bb_add_intel_buf(ibb, src, false);
+	intel_bb_blit_start(ibb, cmd_bits);
+	intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 		  (0xcc << 16) | /* copy ROP */
 		  dst_pitch);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH(BO_SIZE/scratch_pitch << 16 | 1024);
-	OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH(src_pitch);
-	OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-
-	intel_batchbuffer_flush(batch);
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, BO_SIZE/scratch_pitch << 16 | 1024);
+	intel_bb_emit_reloc_fenced(ibb, dst->handle, I915_GEM_DOMAIN_RENDER,
+				   I915_GEM_DOMAIN_RENDER, 0, dst->addr.offset);
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, src_pitch);
+	intel_bb_emit_reloc_fenced(ibb, src->handle, I915_GEM_DOMAIN_RENDER, 0,
+				   0, src->addr.offset);
+
+	intel_bb_flush_blit(ibb);
 }
 
 static void
-blt_bo_fill(drm_intel_bo *tmp_bo, drm_intel_bo *bo, int val)
+blt_bo_fill(struct intel_buf *tmp_buf, struct intel_buf *buf, int val)
 {
 	uint8_t *gtt_ptr;
 	int i;
 
-	drm_intel_gem_bo_map_gtt(tmp_bo);
-	gtt_ptr = tmp_bo->virtual;
+	gtt_ptr = gem_mmap__gtt(fd, tmp_buf->handle, tmp_buf->surface[0].size,
+				PROT_WRITE);
 
 	for (i = 0; i < BO_SIZE; i++)
 		gtt_ptr[i] = val;
 
-	drm_intel_gem_bo_unmap_gtt(tmp_bo);
+	gem_munmap(gtt_ptr, tmp_buf->surface[0].size);
 
 	igt_drop_caches_set(fd, DROP_BOUND);
 
-	copy_bo(tmp_bo, 0, bo, 1);
+	copy_bo(tmp_buf, 0, buf, 1);
 }
 
 #define MAX_BLT_SIZE 128
@@ -130,12 +132,12 @@ static void test_partial_reads(void)
 		int start, len;
 		int val = i % 256;
 
-		blt_bo_fill(staging_bo, scratch_bo, i);
+		blt_bo_fill(staging_buf, scratch_buf, i);
 
 		start = random() % BO_SIZE;
 		len = random() % (BO_SIZE-start) + 1;
 
-		drm_intel_bo_get_subdata(scratch_bo, start, len, tmp);
+		gem_read(fd, scratch_buf->handle, start, tmp, len);
 		for (j = 0; j < len; j++) {
 			igt_assert_f(tmp[j] == val,
 				     "mismatch at %i, got: %i, expected: %i\n",
@@ -154,18 +156,17 @@ static void test_partial_writes(void)
 		int start, len;
 		int val = i % 256;
 
-		blt_bo_fill(staging_bo, scratch_bo, i);
+		blt_bo_fill(staging_buf, scratch_buf, i);
 
 		start = random() % BO_SIZE;
 		len = random() % (BO_SIZE-start) + 1;
 
 		memset(tmp, i + 63, BO_SIZE);
 
-		drm_intel_bo_subdata(scratch_bo, start, len, tmp);
+		gem_write(fd, scratch_buf->handle, start, tmp, len);
 
-		copy_bo(scratch_bo, 1, tiled_staging_bo, 1);
-		drm_intel_bo_get_subdata(tiled_staging_bo, 0, BO_SIZE,
-					 compare_tmp);
+		copy_bo(scratch_buf, 1, tiled_staging_buf, 1);
+		gem_read(fd, tiled_staging_buf->handle, 0, compare_tmp, BO_SIZE);
 
 		for (j = 0; j < start; j++) {
 			igt_assert_f(compare_tmp[j] == val,
@@ -182,7 +183,6 @@ static void test_partial_writes(void)
 				     "mismatch at %i, got: %i, expected: %i\n",
 				     j, tmp[j], val);
 		}
-		drm_intel_gem_bo_unmap_gtt(staging_bo);
 
 		igt_progress("partial writes test: ", i, ROUNDS);
 	}
@@ -196,13 +196,13 @@ static void test_partial_read_writes(void)
 		int start, len;
 		int val = i % 256;
 
-		blt_bo_fill(staging_bo, scratch_bo, i);
+		blt_bo_fill(staging_buf, scratch_buf, i);
 
 		/* partial read */
 		start = random() % BO_SIZE;
 		len = random() % (BO_SIZE-start) + 1;
 
-		drm_intel_bo_get_subdata(scratch_bo, start, len, tmp);
+		gem_read(fd, scratch_buf->handle, start, tmp, len);
 		for (j = 0; j < len; j++) {
 			igt_assert_f(tmp[j] == val,
 				     "mismatch in read at %i, got: %i, expected: %i\n",
@@ -212,7 +212,7 @@ static void test_partial_read_writes(void)
 		/* Change contents through gtt to make the pread cachelines
 		 * stale. */
 		val = (i + 17) % 256;
-		blt_bo_fill(staging_bo, scratch_bo, val);
+		blt_bo_fill(staging_buf, scratch_buf, val);
 
 		/* partial write */
 		start = random() % BO_SIZE;
@@ -220,11 +220,10 @@ static void test_partial_read_writes(void)
 
 		memset(tmp, i + 63, BO_SIZE);
 
-		drm_intel_bo_subdata(scratch_bo, start, len, tmp);
+		gem_write(fd, scratch_buf->handle, start, tmp, len);
 
-		copy_bo(scratch_bo, 1, tiled_staging_bo, 1);
-		drm_intel_bo_get_subdata(tiled_staging_bo, 0, BO_SIZE,
-					 compare_tmp);
+		copy_bo(scratch_buf, 1, tiled_staging_buf, 1);
+		gem_read(fd, tiled_staging_buf->handle, 0, compare_tmp, BO_SIZE);
 
 		for (j = 0; j < start; j++) {
 			igt_assert_f(compare_tmp[j] == val,
@@ -241,7 +240,6 @@ static void test_partial_read_writes(void)
 				     "mismatch at %i, got: %i, expected: %i\n",
 				     j, tmp[j], val);
 		}
-		drm_intel_gem_bo_unmap_gtt(staging_bo);
 
 		igt_progress("partial read/writes test: ", i, ROUNDS);
 	}
@@ -261,8 +259,6 @@ static bool known_swizzling(uint32_t handle)
 
 igt_main
 {
-	uint32_t tiling_mode = I915_TILING_X;
-
 	srandom(0xdeadbeef);
 
 	igt_fixture {
@@ -271,28 +267,26 @@ igt_main
 		gem_require_mappable_ggtt(fd);
 		gem_require_blitter(fd);
 
-		bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-		//drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-		devid = intel_get_drm_devid(fd);
-		batch = intel_batchbuffer_alloc(bufmgr, devid);
+		bops = buf_ops_create(fd);
+		ibb = intel_bb_create(fd, 4096);
 
 		/* overallocate the buffers we're actually using because */
-		scratch_bo = drm_intel_bo_alloc_tiled(bufmgr, "scratch bo", 1024,
-						      BO_SIZE/4096, 4,
-						      &tiling_mode, &scratch_pitch, 0);
-		igt_assert(tiling_mode == I915_TILING_X);
-		igt_assert(scratch_pitch == 4096);
+		scratch_buf = intel_buf_create(bops, 1024, BO_SIZE/4096, 32, 0,
+					       I915_TILING_X,
+					       I915_COMPRESSION_NONE);
 
 		/*
 		 * As we want to compare our template tiled pattern against
 		 * the target bo, we need consistent swizzling on both.
 		 */
-		igt_require(known_swizzling(scratch_bo->handle));
-		staging_bo = drm_intel_bo_alloc(bufmgr, "staging bo", BO_SIZE, 4096);
-		tiled_staging_bo = drm_intel_bo_alloc_tiled(bufmgr, "scratch bo", 1024,
-							    BO_SIZE/4096, 4,
-							    &tiling_mode,
-							    &scratch_pitch, 0);
+		igt_require(known_swizzling(scratch_buf->handle));
+		staging_buf = intel_buf_create(bops, 1024, BO_SIZE/4096, 32,
+					       4096, I915_TILING_NONE,
+					       I915_COMPRESSION_NONE);
+
+		tiled_staging_buf = intel_buf_create(bops, 1024, BO_SIZE/4096,
+						     32, 0, I915_TILING_X,
+						     I915_COMPRESSION_NONE);
 	}
 
 	igt_subtest("reads")
@@ -305,7 +299,11 @@ igt_main
 		test_partial_read_writes();
 
 	igt_fixture {
-		drm_intel_bufmgr_destroy(bufmgr);
+		intel_buf_destroy(scratch_buf);
+		intel_buf_destroy(staging_buf);
+		intel_buf_destroy(tiled_staging_buf);
+		intel_bb_destroy(ibb);
+		buf_ops_destroy(bops);
 
 		close(fd);
 	}
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 10/15] i915/gem_set_tiling_vs_blit.c: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency. The tests
had depended on buffer reuse mechanism, so logic was changed a bit.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_set_tiling_vs_blt.c | 217 ++++++++++++++---------------
 1 file changed, 106 insertions(+), 111 deletions(-)

diff --git a/tests/i915/gem_set_tiling_vs_blt.c b/tests/i915/gem_set_tiling_vs_blt.c
index cb164154..c11276ab 100644
--- a/tests/i915/gem_set_tiling_vs_blt.c
+++ b/tests/i915/gem_set_tiling_vs_blt.c
@@ -57,15 +57,10 @@
 #include "drm.h"
 #include "i915/gem.h"
 #include "igt.h"
-#include "intel_bufmgr.h"
 
 IGT_TEST_DESCRIPTION("Check for proper synchronization of tiling changes vs."
 		     " tiled gpu access.");
 
-static drm_intel_bufmgr *bufmgr;
-struct intel_batchbuffer *batch;
-uint32_t devid;
-
 #define TEST_SIZE (1024*1024)
 #define TEST_STRIDE (4*1024)
 #define TEST_HEIGHT(stride)	(TEST_SIZE/(stride))
@@ -73,159 +68,158 @@ uint32_t devid;
 
 uint32_t data[TEST_SIZE/4];
 
-static void do_test(uint32_t tiling, unsigned stride,
+static void __set_tiling(struct buf_ops *bops, struct intel_buf *buf,
+			 uint32_t tiling, unsigned stride)
+{
+	int ret;
+
+	ret = __gem_set_tiling(buf_ops_get_fd(bops), buf->handle, tiling, stride);
+
+	buf->surface[0].stride = stride;
+	buf->surface[0].size = buf->surface[0].stride * TEST_HEIGHT(stride);
+	buf->tiling = tiling;
+
+	igt_assert_eq(ret, 0);
+}
+
+static void do_test(struct buf_ops *bops, uint32_t tiling, unsigned stride,
 		    uint32_t tiling_after, unsigned stride_after)
 {
-	drm_intel_bo *busy_bo, *test_bo, *target_bo;
-	int i, ret;
+	struct intel_buf *test_buf, *target_buf;
+	struct intel_bb *ibb;
+	igt_spin_t *busy;
+	int i, fd = buf_ops_get_fd(bops);
 	uint32_t *ptr;
-	uint32_t test_bo_handle;
+	uint32_t test_buf_handle;
 	uint32_t blt_stride, blt_bits;
+	uint32_t busy_ctx, ring = I915_EXEC_DEFAULT;
 	bool tiling_changed = false;
 
-	igt_info("filling ring .. ");
-	busy_bo = drm_intel_bo_alloc(bufmgr, "busy bo bo", 16*1024*1024, 4096);
-
-	for (i = 0; i < 250; i++) {
-		BLIT_COPY_BATCH_START(0);
-		OUT_BATCH((3 << 24) | /* 32 bits */
-			  (0xcc << 16) | /* copy ROP */
-			  2*1024*4);
-		OUT_BATCH(0 << 16 | 1024);
-		OUT_BATCH((2048) << 16 | (2048));
-		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-		OUT_BATCH(0 << 16 | 0);
-		OUT_BATCH(2*1024*4);
-		OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-		ADVANCE_BATCH();
-
-		if (batch->gen >= 6) {
-			BEGIN_BATCH(3, 0);
-			OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-			ADVANCE_BATCH();
-		}
-	}
-	intel_batchbuffer_flush(batch);
+	ibb = intel_bb_create_with_relocs(fd, 4096);
+
+	igt_info("filling ring\n");
+	if (HAS_BLT_RING(ibb->devid))
+		ring = I915_EXEC_BLT;
+	busy_ctx = gem_context_create(fd);
+	busy = igt_spin_new(fd, .ctx = busy_ctx, .engine = ring);
 
 	igt_info("playing tricks .. ");
 	/* first allocate the target so it gets out of the way of playing funky
 	 * tricks */
-	target_bo = drm_intel_bo_alloc(bufmgr, "target bo", TEST_SIZE, 4096);
+	target_buf = intel_buf_create(bops, TEST_WIDTH(TEST_STRIDE),
+				      TEST_HEIGHT(TEST_STRIDE), 32, 0,
+				      I915_TILING_NONE, I915_COMPRESSION_NONE);
 
+	intel_bb_add_intel_buf(ibb, target_buf, true);
 	/* allocate buffer with parameters _after_ transition we want to check
 	 * and touch it, so that it's properly aligned in the gtt. */
-	test_bo = drm_intel_bo_alloc(bufmgr, "tiled busy bo", TEST_SIZE, 4096);
-	test_bo_handle = test_bo->handle;
-	ret = drm_intel_bo_set_tiling(test_bo, &tiling_after, stride_after);
-	igt_assert_eq(ret, 0);
-	drm_intel_gem_bo_map_gtt(test_bo);
-	ptr = test_bo->virtual;
-	*ptr = 0;
-	ptr = NULL;
-	drm_intel_gem_bo_unmap_gtt(test_bo);
-
-	drm_intel_bo_unreference(test_bo);
+	test_buf = intel_buf_create(bops, TEST_WIDTH(stride_after),
+				   TEST_HEIGHT(stride_after), 32, 0,
+				   tiling_after, I915_COMPRESSION_NONE);
 
-	test_bo = NULL;
+	test_buf_handle = test_buf->handle;
 
-	/* note we need a bo bigger than batches, otherwise the buffer reuse
-	 * trick will fail. */
-	test_bo = drm_intel_bo_alloc(bufmgr, "busy bo", TEST_SIZE, 4096);
-	/* double check that the reuse trick worked */
-	igt_assert(test_bo_handle == test_bo->handle);
+	ptr = gem_mmap__gtt(fd, test_buf->handle, TEST_SIZE,
+			    PROT_READ | PROT_WRITE);
+	*ptr = 0;
+	gem_munmap(ptr, TEST_SIZE);
 
-	test_bo_handle = test_bo->handle;
-	/* ensure we have the right tiling before we start. */
-	ret = drm_intel_bo_set_tiling(test_bo, &tiling, stride);
-	igt_assert_eq(ret, 0);
+	/* Reuse previously aligned in the gtt object */
+	intel_buf_init_using_handle(bops, test_buf_handle, test_buf,
+				    TEST_WIDTH(stride), TEST_HEIGHT(stride), 32,
+				    0, tiling, I915_COMPRESSION_NONE);
+	igt_assert_eq_u32(intel_buf_bo_size(test_buf), TEST_SIZE);
+	intel_buf_set_ownership(test_buf, true);
+	intel_bb_add_intel_buf(ibb, test_buf, false);
 
 	if (tiling == I915_TILING_NONE) {
-		drm_intel_bo_subdata(test_bo, 0, TEST_SIZE, data);
+		gem_write(fd, test_buf->handle, 0, data, TEST_SIZE);
 	} else {
-		drm_intel_gem_bo_map_gtt(test_bo);
-		ptr = test_bo->virtual;
+		ptr = gem_mmap__gtt(fd, test_buf->handle, TEST_SIZE,
+				    PROT_READ | PROT_WRITE);
+
 		memcpy(ptr, data, TEST_SIZE);
 		ptr = NULL;
-		drm_intel_gem_bo_unmap_gtt(test_bo);
+		gem_munmap(ptr, TEST_SIZE);
 	}
 
 	blt_stride = stride;
 	blt_bits = 0;
-	if (intel_gen(devid) >= 4 && tiling != I915_TILING_NONE) {
+	if (intel_gen(ibb->devid) >= 4 && tiling != I915_TILING_NONE) {
 		blt_stride /= 4;
 		blt_bits = XY_SRC_COPY_BLT_SRC_TILED;
 	}
 
-	BLIT_COPY_BATCH_START(blt_bits);
-	OUT_BATCH((3 << 24) | /* 32 bits */
+	intel_bb_blit_start(ibb, blt_bits);
+	intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 		  (0xcc << 16) | /* copy ROP */
 		  stride);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH((TEST_HEIGHT(stride)) << 16 | (TEST_WIDTH(stride)));
-	OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH(blt_stride);
-	OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-	intel_batchbuffer_flush(batch);
-
-	drm_intel_bo_unreference(test_bo);
-
-	test_bo = drm_intel_bo_alloc_for_render(bufmgr, "tiled busy bo", TEST_SIZE, 4096);
-	/* double check that the reuse trick worked */
-	igt_assert(test_bo_handle == test_bo->handle);
-	ret = drm_intel_bo_set_tiling(test_bo, &tiling_after, stride_after);
-	igt_assert_eq(ret, 0);
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, (TEST_HEIGHT(stride)) << 16 | (TEST_WIDTH(stride)));
+	intel_bb_emit_reloc_fenced(ibb, target_buf->handle,
+				   I915_GEM_DOMAIN_RENDER,
+				   I915_GEM_DOMAIN_RENDER, 0, 0);
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, blt_stride);
+	intel_bb_emit_reloc_fenced(ibb, test_buf->handle,
+				   I915_GEM_DOMAIN_RENDER, 0, 0, 0);
+	intel_bb_flush_blit(ibb);
+
+	__set_tiling(bops, test_buf, tiling_after, stride_after);
+	intel_bb_reset(ibb, true);
+	intel_bb_add_intel_buf(ibb, test_buf, true);
 
 	/* Note: We don't care about gen4+ here because the blitter doesn't use
 	 * fences there. So not setting tiling flags on the tiled buffer is ok.
 	 */
-	BLIT_COPY_BATCH_START(0);
-	OUT_BATCH((3 << 24) | /* 32 bits */
+
+	intel_bb_blit_start(ibb, 0);
+	intel_bb_out(ibb, (3 << 24) | /* 32 bits */
 		  (0xcc << 16) | /* copy ROP */
 		  stride_after);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH((1) << 16 | (1));
-	OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH(stride_after);
-	OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-	intel_batchbuffer_flush(batch);
-
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, (1) << 16 | (1));
+	intel_bb_emit_reloc_fenced(ibb, test_buf->handle,
+				   I915_GEM_DOMAIN_RENDER,
+				   I915_GEM_DOMAIN_RENDER, 0, 0);
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, stride_after);
+	intel_bb_emit_reloc_fenced(ibb, test_buf->handle,
+				   I915_GEM_DOMAIN_RENDER, 0, 0, 0);
+	intel_bb_flush_blit(ibb);
 	/* Now try to trick the kernel the kernel into changing up the fencing
 	 * too early. */
-
 	igt_info("checking .. ");
 	memset(data, 0, TEST_SIZE);
-	drm_intel_bo_get_subdata(target_bo, 0, TEST_SIZE, data);
+
+	gem_read(fd, target_buf->handle, 0, data, TEST_SIZE);
 	for (i = 0; i < TEST_SIZE/4; i++)
 		igt_assert(data[i] == i);
 
-	/* check whether tiling on the test_bo actually changed. */
-	drm_intel_gem_bo_map_gtt(test_bo);
-	ptr = test_bo->virtual;
+	/* check whether tiling on the test_buf actually changed. */
+	ptr = gem_mmap__gtt(fd, test_buf->handle, TEST_SIZE,
+			    PROT_WRITE | PROT_READ);
+
 	for (i = 0; i < TEST_SIZE/4; i++)
 		if (ptr[i] != data[i])
 			tiling_changed = true;
-	ptr = NULL;
-	drm_intel_gem_bo_unmap_gtt(test_bo);
+
+	gem_munmap(ptr, TEST_SIZE);
 	igt_assert(tiling_changed);
 
-	drm_intel_bo_unreference(test_bo);
-	drm_intel_bo_unreference(target_bo);
-	drm_intel_bo_unreference(busy_bo);
+	igt_spin_free(fd, busy);
+	gem_context_destroy(fd, busy_ctx);
+	intel_buf_destroy(test_buf);
+	intel_buf_destroy(target_buf);
+
 	igt_info("done\n");
 }
 
-int fd;
-
 igt_main
 {
-	int i;
+	int fd, i;
 	uint32_t tiling, tiling_after;
+	struct buf_ops *bops;
 
 	igt_fixture {
 		for (i = 0; i < 1024*256; i++)
@@ -235,17 +229,13 @@ igt_main
 		igt_require_gem(fd);
 		gem_require_blitter(fd);
 		igt_require(gem_available_fences(fd) > 0);
-
-		bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-		drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-		devid = intel_get_drm_devid(fd);
-		batch = intel_batchbuffer_alloc(bufmgr, devid);
+		bops = buf_ops_create(fd);
 	}
 
 	igt_subtest("untiled-to-tiled") {
 		tiling = I915_TILING_NONE;
 		tiling_after = I915_TILING_X;
-		do_test(tiling, TEST_STRIDE, tiling_after, TEST_STRIDE);
+		do_test(bops, tiling, TEST_STRIDE, tiling_after, TEST_STRIDE);
 		igt_assert(tiling == I915_TILING_NONE);
 		igt_assert(tiling_after == I915_TILING_X);
 	}
@@ -253,7 +243,7 @@ igt_main
 	igt_subtest("tiled-to-untiled") {
 		tiling = I915_TILING_X;
 		tiling_after = I915_TILING_NONE;
-		do_test(tiling, TEST_STRIDE, tiling_after, TEST_STRIDE);
+		do_test(bops, tiling, TEST_STRIDE, tiling_after, TEST_STRIDE);
 		igt_assert(tiling == I915_TILING_X);
 		igt_assert(tiling_after == I915_TILING_NONE);
 	}
@@ -261,8 +251,13 @@ igt_main
 	igt_subtest("tiled-to-tiled") {
 		tiling = I915_TILING_X;
 		tiling_after = I915_TILING_X;
-		do_test(tiling, TEST_STRIDE/2, tiling_after, TEST_STRIDE);
+		do_test(bops, tiling, TEST_STRIDE/2, tiling_after, TEST_STRIDE);
 		igt_assert(tiling == I915_TILING_X);
 		igt_assert(tiling_after == I915_TILING_X);
 	}
+
+	igt_fixture{
+		buf_ops_destroy(bops);
+		close(fd);
+	}
 }
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 11/15] tests/kms_fence_pin_leak.c: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/kms_fence_pin_leak.c | 89 ++++++++++++++++++++------------------
 1 file changed, 48 insertions(+), 41 deletions(-)

diff --git a/tests/kms_fence_pin_leak.c b/tests/kms_fence_pin_leak.c
index b59efc0a..3bf8c51a 100644
--- a/tests/kms_fence_pin_leak.c
+++ b/tests/kms_fence_pin_leak.c
@@ -37,34 +37,46 @@ IGT_TEST_DESCRIPTION("Exercises full ppgtt fence pin_count leak in the "
 typedef struct {
 	int drm_fd;
 	uint32_t devid;
-	drm_intel_bufmgr *bufmgr;
+	struct buf_ops *bops;
 	igt_display_t display;
-	drm_intel_bo *bos[64]; /* >= num fence registers */
+	struct intel_buf *bos[64]; /* >= num fence registers */
 } data_t;
 
-static void exec_nop(data_t *data, uint32_t handle, drm_intel_context *context)
+static void exec_nop(data_t *data, struct igt_fb *fb, uint32_t ctx)
 {
-	drm_intel_bo *dst;
-	struct intel_batchbuffer *batch;
-
-	dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle);
-	igt_assert(dst);
-
-	batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
-	igt_assert(batch);
+	struct intel_buf *dst;
+	struct intel_bb *ibb;
+	uint32_t name, handle, tiling, stride, width, height, bpp, size;
+
+	tiling = igt_fb_mod_to_tiling(fb->modifier);
+	stride = fb->strides[0];
+	bpp = fb->plane_bpp[0];
+	size = fb->size;
+	width = stride / (bpp / 8);
+	height = size / stride;
+
+	name = gem_flink(data->drm_fd, fb->gem_handle);
+	handle = gem_open(data->drm_fd, name);
+	dst = intel_buf_create_using_handle(data->bops, handle,
+					    width, height, bpp, 0, tiling, 0);
+	intel_buf_set_ownership(dst, true);
+
+	ibb = intel_bb_create_with_context(buf_ops_get_fd(data->bops),
+					   ctx, 4096);
 
 	/* add the reloc to make sure the kernel will think we write to dst */
-	BEGIN_BATCH(4, 1);
-	OUT_BATCH(MI_BATCH_BUFFER_END);
-	OUT_BATCH(MI_NOOP);
-	OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(MI_NOOP);
-	ADVANCE_BATCH();
+	intel_bb_add_intel_buf(ibb, dst, true);
+	intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+	intel_bb_out(ibb, MI_NOOP);
+	intel_bb_emit_reloc(ibb, dst->handle, I915_GEM_DOMAIN_RENDER,
+			    I915_GEM_DOMAIN_RENDER, 0, 0x0);
+	intel_bb_out(ibb, MI_NOOP);
 
-	intel_batchbuffer_flush_with_context(batch, context);
-	intel_batchbuffer_free(batch);
+	intel_bb_flush_render(ibb);
 
-	drm_intel_bo_unreference(dst);
+	intel_bb_destroy(ibb);
+
+	intel_buf_destroy(dst);
 }
 
 static void alloc_fence_objs(data_t *data)
@@ -72,13 +84,12 @@ static void alloc_fence_objs(data_t *data)
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(data->bos); i++) {
-		drm_intel_bo *bo;
-
-		bo = drm_intel_bo_alloc(data->bufmgr, "fence bo", 4096, 4096);
-		igt_assert(bo);
-		gem_set_tiling(data->drm_fd, bo->handle, I915_TILING_X, 512);
+		struct intel_buf *buf;
 
-		data->bos[i] = bo;
+		buf = intel_buf_create(data->bops, 128, 8, 32, 0,
+				       I915_TILING_X, I915_COMPRESSION_NONE);
+		igt_assert(buf->surface[0].stride == 512);
+		data->bos[i] = buf;
 	}
 }
 
@@ -102,7 +113,7 @@ static void free_fence_objs(data_t *data)
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(data->bos); i++)
-		drm_intel_bo_unreference(data->bos[i]);
+		intel_buf_destroy(data->bos[i]);
 }
 
 static void run_single_test(data_t *data, enum pipe pipe, igt_output_t *output)
@@ -133,19 +144,18 @@ static void run_single_test(data_t *data, enum pipe pipe, igt_output_t *output)
 	igt_display_commit(display);
 
 	for (i = 0; i < 64; i++) {
-		drm_intel_context *ctx;
+		uint32_t ctx;
 
 		/*
 		 * Link fb.gem_handle to the ppgtt vm of ctx so that the context
 		 * destruction will unbind the obj from the ppgtt vm in question.
 		 */
-		ctx = drm_intel_gem_context_create(data->bufmgr);
-		igt_assert(ctx);
-		exec_nop(data, fb[i&1].gem_handle, ctx);
-		drm_intel_gem_context_destroy(ctx);
+		ctx = gem_context_create(data->drm_fd);
+		exec_nop(data, &fb[i&1], ctx);
+		gem_context_destroy(data->drm_fd, ctx);
 
 		/* Force a context switch to make sure ctx gets destroyed for real. */
-		exec_nop(data, fb[i&1].gem_handle, NULL);
+		exec_nop(data, &fb[i&1], 0);
 
 		gem_sync(data->drm_fd, fb[i&1].gem_handle);
 
@@ -196,7 +206,7 @@ static void run_test(data_t *data)
 
 igt_simple_main
 {
-	drm_intel_context *ctx;
+	uint32_t ctx;
 	data_t data = {};
 
 	data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
@@ -207,15 +217,12 @@ igt_simple_main
 
 	kmstest_set_vt_graphics_mode();
 
-	data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
-	igt_assert(data.bufmgr);
-	drm_intel_bufmgr_gem_enable_reuse(data.bufmgr);
+	data.bops = buf_ops_create(data.drm_fd);
 
 	igt_display_require(&data.display, data.drm_fd);
 
-	ctx = drm_intel_gem_context_create(data.bufmgr);
-	igt_require(ctx);
-	drm_intel_gem_context_destroy(ctx);
+	ctx = gem_context_create(data.drm_fd);
+	gem_context_destroy(data.drm_fd, ctx);
 
 	alloc_fence_objs(&data);
 
@@ -223,6 +230,6 @@ igt_simple_main
 
 	free_fence_objs(&data);
 
-	drm_intel_bufmgr_destroy(data.bufmgr);
+	buf_ops_destroy(data.bops);
 	igt_display_fini(&data.display);
 }
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 12/15] tests/kms_flip.c: Remove libdrm dependency

[Dominik Grzegorzek]

Use intel_bb / intel_buf to remove libdrm dependency.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/kms_flip.c | 22 ++++++++--------------
 1 file changed, 8 insertions(+), 14 deletions(-)

diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index b33cfe9c..51b9ac95 100755
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -86,8 +86,7 @@
 
 drmModeRes *resources;
 int drm_fd;
-static drm_intel_bufmgr *bufmgr;
-struct intel_batchbuffer *batch;
+static struct buf_ops *bops;
 uint32_t devid;
 int test_time = 3;
 static bool monotonic_timestamp;
@@ -211,20 +210,19 @@ static void emit_fence_stress(struct test_output *o)
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 *exec;
 	uint32_t buf[2] = { MI_BATCH_BUFFER_END, 0 };
-	drm_intel_bo **bo;
+	struct intel_buf **bo;
 	int i;
 
-	igt_require(bufmgr);
+	igt_require(bops);
 
 	igt_assert(num_fences);
 	bo = calloc(sizeof(*bo), num_fences);
 	exec = calloc(sizeof(*exec), num_fences+1);
 	for (i = 0; i < num_fences - 1; i++) {
 		uint32_t tiling = I915_TILING_X;
-		unsigned long pitch = 0;
-		bo[i] = drm_intel_bo_alloc_tiled(bufmgr,
-						 "X tiled bo", 1024, 1024, 4,
-						 &tiling, &pitch, 0);
+		bo[i] = intel_buf_create(bops, 1024, 1024, 32, 0, tiling,
+					 I915_COMPRESSION_NONE);
+
 		exec[i].handle = bo[i]->handle;
 		exec[i].flags = EXEC_OBJECT_NEEDS_FENCE;
 	}
@@ -244,7 +242,7 @@ static void emit_fence_stress(struct test_output *o)
 
 	gem_close(drm_fd, exec[i].handle);
 	for (i = 0; i < num_fences - 1; i++)
-		drm_intel_bo_unreference(bo[i]);
+		intel_buf_destroy(bo[i]);
 	free(bo);
 	free(exec);
 }
@@ -1664,11 +1662,7 @@ igt_main
 		get_timestamp_format();
 
 		if (is_i915_device(drm_fd)) {
-			bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
-			if (bufmgr) {
-				devid = intel_get_drm_devid(drm_fd);
-				batch = intel_batchbuffer_alloc(bufmgr, devid);
-			}
+			bops = buf_ops_create(drm_fd);
 		}
 	}
 
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 13/15] tests/kms_psr2_su.c: Get rid of unused bufmgr

[Dominik Grzegorzek]

Removal of bufmgr that was only set but not used.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/kms_psr2_su.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/tests/kms_psr2_su.c b/tests/kms_psr2_su.c
index d549d9a3..9215c59d 100644
--- a/tests/kms_psr2_su.c
+++ b/tests/kms_psr2_su.c
@@ -30,7 +30,6 @@
 #include <stdio.h>
 #include <string.h>
 #include <sys/timerfd.h>
-#include "intel_bufmgr.h"
 
 IGT_TEST_DESCRIPTION("Test PSR2 selective update");
 
@@ -65,7 +64,6 @@ typedef struct {
 	int drm_fd;
 	int debugfs_fd;
 	igt_display_t display;
-	drm_intel_bufmgr *bufmgr;
 	drmModeModeInfo *mode;
 	igt_output_t *output;
 	struct igt_fb fb[2];
@@ -247,10 +245,6 @@ igt_main
 					       data.debugfs_fd, PSR_MODE_2),
 			      "Sink does not support PSR2\n");
 
-		data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
-		igt_assert(data.bufmgr);
-		drm_intel_bufmgr_gem_enable_reuse(data.bufmgr);
-
 		display_init(&data);
 
 		/* Test if PSR2 can be enabled */
@@ -287,7 +281,6 @@ igt_main
 
 	igt_fixture {
 		close(data.debugfs_fd);
-		drm_intel_bufmgr_destroy(data.bufmgr);
 		display_fini(&data);
 	}
 }
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 14/15] tests/i915/gem_ppgtt: make copying more readable

[Dominik Grzegorzek]

Use intel_bb_copy_intel_buf instead of intel_bb_blit_copy
to make the code simplier.

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ppgtt.c | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/tests/i915/gem_ppgtt.c b/tests/i915/gem_ppgtt.c
index 73bd19c5..73d13fe7 100644
--- a/tests/i915/gem_ppgtt.c
+++ b/tests/i915/gem_ppgtt.c
@@ -166,12 +166,8 @@ static void fork_bcs_copy(int timeout, uint32_t final,
 			src[1] = create_bo(dst[child]->bops,
 					   i++ | child << 16);
 
-			intel_bb_blt_copy(ibb, src[1], 0, 0, 4096,
-					  src[0], 0, 0, 4096,
-					  4096/4, SIZE/4096, 32);
-			intel_bb_blt_copy(ibb, src[0], 0, 0, 4096,
-					  dst[child], 0, 0, 4096,
-					  4096/4, SIZE/4096, 32);
+			intel_bb_copy_intel_buf(ibb, src[1], src[0], SIZE);
+			intel_bb_copy_intel_buf(ibb, src[0], dst[child], SIZE);
 
 			intel_buf_destroy(src[1]);
 			intel_buf_destroy(src[0]);
@@ -181,12 +177,8 @@ static void fork_bcs_copy(int timeout, uint32_t final,
 		src[1] = create_bo(dst[child]->bops,
 				   final | child << 16);
 
-		intel_bb_blt_copy(ibb, src[1], 0, 0, 4096,
-				  src[0], 0, 0, 4096,
-				  4096/4, SIZE/4096, 32);
-		intel_bb_blt_copy(ibb, src[0], 0, 0, 4096,
-				  dst[child], 0, 0, 4096,
-				  4096/4, SIZE/4096, 32);
+		intel_bb_copy_intel_buf(ibb, src[1], src[0], SIZE);
+		intel_bb_copy_intel_buf(ibb, src[0], dst[child], SIZE);
 
 		intel_buf_destroy(src[1]);
 		intel_buf_destroy(src[0]);
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 15/15] HAX: don't run failing test in BAT

[Dominik Grzegorzek]

gem_tiled_blits will fail on !llc platforms
https://gitlab.freedesktop.org/drm/intel/-/issues/2328

Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
---
 tests/intel-ci/fast-feedback.testlist | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist
index aa2eb329..4180b5a1 100644
--- a/tests/intel-ci/fast-feedback.testlist
+++ b/tests/intel-ci/fast-feedback.testlist
@@ -37,7 +37,6 @@ igt@gem_render_tiled_blits@basic
 igt@gem_ringfill@basic-all
 igt@gem_sync@basic-all
 igt@gem_sync@basic-each
-igt@gem_tiled_blits@basic
 igt@gem_tiled_fence_blits@basic
 igt@gem_tiled_pread_basic
 igt@gem_wait@busy@all
-- 
2.20.1

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[igt-dev] ✓ Fi.CI.BAT: success for tests: Remove libdrm dependency (rev3)

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 5771 bytes --]

== Series Details ==

Series: tests: Remove libdrm dependency (rev3)
URL   : https://patchwork.freedesktop.org/series/82203/
State : success

== Summary ==

CI Bug Log - changes from IGT_5797 -> IGTPW_5036
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html

Known issues
------------

  Here are the changes found in IGTPW_5036 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-bsw-kefka:       [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - fi-icl-u2:          [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@vgem_basic@unload:
    - fi-skl-guc:         [PASS][5] -> [DMESG-WARN][6] ([i915#2203])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-skl-guc/igt@vgem_basic@unload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-skl-guc/igt@vgem_basic@unload.html
    - fi-kbl-x1275:       [PASS][7] -> [DMESG-WARN][8] ([i915#62] / [i915#92])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-kbl-x1275/igt@vgem_basic@unload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-kbl-x1275/igt@vgem_basic@unload.html

  
#### Possible fixes ####

  * {igt@core_hotunplug@unbind-rebind}:
    - fi-kbl-x1275:       [DMESG-WARN][9] ([i915#62] / [i915#92]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-kbl-x1275/igt@core_hotunplug@unbind-rebind.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-kbl-x1275/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-bsw-kefka:       [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@kms_busy@basic@flip:
    - fi-kbl-x1275:       [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-kbl-x1275/igt@kms_busy@basic@flip.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-kbl-x1275/igt@kms_busy@basic@flip.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
    - fi-skl-guc:         [DMESG-WARN][15] ([i915#2203]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2.html

  
#### Warnings ####

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [DMESG-FAIL][17] ([i915#62]) -> [DMESG-FAIL][18] ([i915#62] / [i915#95])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-kbl-x1275:       [DMESG-WARN][19] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][20] ([i915#62] / [i915#92]) +2 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - fi-kbl-x1275:       [DMESG-WARN][21] ([i915#62] / [i915#92]) -> [DMESG-WARN][22] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (45 -> 36)
------------------------------

  Missing    (9): fi-ilk-m540 fi-tgl-dsi fi-hsw-4200u fi-bdw-gvtdvm fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5797 -> IGTPW_5036

  CI-20190529: 20190529
  CI_DRM_9091: 1e20b6560332c04881daeeac61536a9ae9a4d539 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_5036: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html
  IGT_5797: 1a7ef7eb5e99c9a8f4ffbc13cdae399a01a9aa12 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html

[-- Attachment #1.2: Type: text/html, Size: 7934 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

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[igt-dev] ✗ Fi.CI.IGT: failure for tests: Remove libdrm dependency (rev3)

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 14701 bytes --]

== Series Details ==

Series: tests: Remove libdrm dependency (rev3)
URL   : https://patchwork.freedesktop.org/series/82203/
State : failure

== Summary ==

CI Bug Log - changes from IGT_5797_full -> IGTPW_5036_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_5036_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_5036_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_5036_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_tiled_blits@basic:
    - shard-glk:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-glk9/igt@gem_tiled_blits@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-glk3/igt@gem_tiled_blits@basic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
    - shard-hsw:          [PASS][3] -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-hsw6/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-hsw4/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html

  
Known issues
------------

  Here are the changes found in IGTPW_5036_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_eio@in-flight-suspend:
    - shard-kbl:          [PASS][5] -> [DMESG-WARN][6] ([i915#180])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-kbl6/igt@gem_eio@in-flight-suspend.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-kbl6/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_reloc@basic-many-active@vecs0:
    - shard-glk:          [PASS][7] -> [FAIL][8] ([i915#2389]) +2 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-glk3/igt@gem_exec_reloc@basic-many-active@vecs0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-glk4/igt@gem_exec_reloc@basic-many-active@vecs0.html

  * igt@gem_exec_whisper@basic-queues-forked:
    - shard-glk:          [PASS][9] -> [DMESG-WARN][10] ([i915#118] / [i915#95]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-glk8/igt@gem_exec_whisper@basic-queues-forked.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-glk3/igt@gem_exec_whisper@basic-queues-forked.html

  * igt@gem_tiled_blits@basic:
    - shard-apl:          [PASS][11] -> [FAIL][12] ([i915#1635])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-apl6/igt@gem_tiled_blits@basic.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-apl6/igt@gem_tiled_blits@basic.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([i915#1899])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-iclb6/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
    - shard-hsw:          [PASS][15] -> [FAIL][16] ([i915#2370])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html

  * igt@kms_cursor_legacy@short-flip-after-cursor-atomic-transitions:
    - shard-apl:          [PASS][17] -> [DMESG-WARN][18] ([i915#1635] / [i915#1982]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-apl7/igt@kms_cursor_legacy@short-flip-after-cursor-atomic-transitions.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-apl8/igt@kms_cursor_legacy@short-flip-after-cursor-atomic-transitions.html

  * igt@kms_flip@2x-wf_vblank-ts-check@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][19] -> [DMESG-WARN][20] ([i915#1982])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-glk2/igt@kms_flip@2x-wf_vblank-ts-check@ab-hdmi-a1-hdmi-a2.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-glk8/igt@kms_flip@2x-wf_vblank-ts-check@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-tglb:         [PASS][21] -> [DMESG-WARN][22] ([i915#1982])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_psr@psr2_cursor_plane_move:
    - shard-iclb:         [PASS][23] -> [SKIP][24] ([fdo#109441]) +2 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-iclb5/igt@kms_psr@psr2_cursor_plane_move.html

  
#### Possible fixes ####

  * igt@gem_mmap_offset@blt-coherency:
    - shard-apl:          [FAIL][25] ([i915#1635]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-apl3/igt@gem_mmap_offset@blt-coherency.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-apl8/igt@gem_mmap_offset@blt-coherency.html

  * igt@kms_atomic_transition@2x-modeset-transitions-nonblocking:
    - shard-hsw:          [INCOMPLETE][27] -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-hsw1/igt@kms_atomic_transition@2x-modeset-transitions-nonblocking.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-hsw7/igt@kms_atomic_transition@2x-modeset-transitions-nonblocking.html

  * igt@kms_cursor_crc@pipe-a-cursor-64x21-onscreen:
    - shard-apl:          [FAIL][29] ([i915#1635] / [i915#54]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-apl8/igt@kms_cursor_crc@pipe-a-cursor-64x21-onscreen.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-apl6/igt@kms_cursor_crc@pipe-a-cursor-64x21-onscreen.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [FAIL][31] ([i915#96]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-hsw4/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ab-vga1-hdmi-a1:
    - shard-hsw:          [DMESG-WARN][33] ([i915#1982]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-hsw6/igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ab-vga1-hdmi-a1.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-hsw1/igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ab-vga1-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2:
    - shard-glk:          [FAIL][35] ([i915#79]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-glk:          [FAIL][37] ([i915#49]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-glk6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-glk3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
    - shard-tglb:         [DMESG-WARN][39] ([i915#1982]) -> [PASS][40] +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-stridechange.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][41] ([fdo#109642] / [fdo#111068]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-iclb3/igt@kms_psr2_su@frontbuffer.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][43] ([fdo#109441]) -> [PASS][44] +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][45] ([i915#1635] / [i915#31]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-apl4/igt@kms_setmode@basic.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-apl6/igt@kms_setmode@basic.html

  * igt@prime_vgem@sync@bcs0:
    - shard-tglb:         [INCOMPLETE][47] ([i915#409]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-tglb6/igt@prime_vgem@sync@bcs0.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-tglb7/igt@prime_vgem@sync@bcs0.html

  
#### Warnings ####

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - shard-tglb:         [SKIP][49] ([i915#1904]) -> [DMESG-WARN][50] ([i915#2411])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-tglb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-tglb1/igt@i915_pm_dc@dc3co-vpb-simulation.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         [FAIL][51] ([i915#454]) -> [FAIL][52] ([i915#1899])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-tglb2/igt@i915_pm_dc@dc6-psr.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-tglb3/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_content_protection@atomic:
    - shard-apl:          [TIMEOUT][53] ([i915#1319] / [i915#1635]) -> [FAIL][54] ([fdo#110321] / [fdo#110336] / [i915#1635])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-apl8/igt@kms_content_protection@atomic.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-apl2/igt@kms_content_protection@atomic.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
    - shard-apl:          [DMESG-FAIL][55] ([fdo#108145] / [i915#1635] / [i915#1982]) -> [FAIL][56] ([fdo#108145] / [i915#1635] / [i915#265])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-apl4/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-apl6/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html

  * igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend:
    - shard-tglb:         [DMESG-WARN][57] ([i915#2411]) -> [INCOMPLETE][58] ([i915#1436] / [i915#1602] / [i915#1887])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-tglb6/igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-tglb6/igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend.html

  * igt@runner@aborted:
    - shard-tglb:         [FAIL][59] ([i915#409]) -> [FAIL][60] ([i915#1602])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5797/shard-tglb6/igt@runner@aborted.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/shard-tglb6/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
  [fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1887]: https://gitlab.freedesktop.org/drm/intel/issues/1887
  [i915#1899]: https://gitlab.freedesktop.org/drm/intel/issues/1899
  [i915#1904]: https://gitlab.freedesktop.org/drm/intel/issues/1904
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2370]: https://gitlab.freedesktop.org/drm/intel/issues/2370
  [i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#409]: https://gitlab.freedesktop.org/drm/intel/issues/409
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
  [i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96


Participating hosts (8 -> 8)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5797 -> IGTPW_5036

  CI-20190529: 20190529
  CI_DRM_9091: 1e20b6560332c04881daeeac61536a9ae9a4d539 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_5036: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html
  IGT_5797: 1a7ef7eb5e99c9a8f4ffbc13cdae399a01a9aa12 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html

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[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

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Re: [igt-dev] ✗ Fi.CI.IGT: failure for tests: Remove libdrm dependency (rev3)

[Grzegorzek, Dominik]

On Fri, 2020-10-02 at 08:35 +0000, Patchwork wrote:
> Patch Details
> Series:	tests: Remove libdrm dependency (rev3)
> URL:	https://patchwork.freedesktop.org/series/82203/
> State:	failure
> Details:	
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html
> CI Bug Log - changes from IGT_5797_full -> IGTPW_5036_full
> Summary
> FAILURE
> 
> Serious unknown changes coming with IGTPW_5036_full absolutely need
> to be
> verified manually.
> 
> If you think the reported changes have nothing to do with the changes
> introduced in IGTPW_5036_full, please notify your bug team to allow
> them
> to document this new failure mode, which will reduce false positives
> in CI.
> 
> External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html
> 
> Possible new issues
> Here are the unknown changes that may have been introduced in
> IGTPW_5036_full:
> 
> IGT changes
> Possible regressions
> igt@gem_tiled_blits@basic:
> 
> shard-glk: PASS -> FAIL
this one is expected.
> igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
> 
> shard-hsw: PASS -> INCOMPLETE
this is unrelated to changes made.

---
Dominik
> Known issues
> Here are the changes found in IGTPW_5036_full that come from known
> issues:
> 
> IGT changes
> Issues hit
> igt@gem_eio@in-flight-suspend:
> 
> shard-kbl: PASS -> DMESG-WARN (i915#180)
> igt@gem_exec_reloc@basic-many-active@vecs0:
> 
> shard-glk: PASS -> FAIL (i915#2389) +2 similar issues
> igt@gem_exec_whisper@basic-queues-forked:
> 
> shard-glk: PASS -> DMESG-WARN (i915#118 / i915#95) +1 similar issue
> igt@gem_tiled_blits@basic:
> 
> shard-apl: PASS -> FAIL (i915#1635)
> igt@i915_pm_dc@dc6-psr:
> 
> shard-iclb: PASS -> FAIL (i915#1899)
> igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
> 
> shard-hsw: PASS -> FAIL (i915#2370)
> igt@kms_cursor_legacy@short-flip-after-cursor-atomic-transitions:
> 
> shard-apl: PASS -> DMESG-WARN (i915#1635 / i915#1982) +1 similar
> issue
> igt@kms_flip@2x-wf_vblank-ts-check@ab-hdmi-a1-hdmi-a2:
> 
> shard-glk: PASS -> DMESG-WARN (i915#1982)
> igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
> 
> shard-tglb: PASS -> DMESG-WARN (i915#1982)
> igt@kms_psr@psr2_cursor_plane_move:
> 
> shard-iclb: PASS -> SKIP (fdo#109441) +2 similar issues
> Possible fixes
> igt@gem_mmap_offset@blt-coherency:
> 
> shard-apl: FAIL (i915#1635) -> PASS
> igt@kms_atomic_transition@2x-modeset-transitions-nonblocking:
> 
> shard-hsw: INCOMPLETE -> PASS
> igt@kms_cursor_crc@pipe-a-cursor-64x21-onscreen:
> 
> shard-apl: FAIL (i915#1635 / i915#54) -> PASS
> igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
> 
> shard-hsw: FAIL (i915#96) -> PASS
> igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ab-vga1-hdmi-a1:
> 
> shard-hsw: DMESG-WARN (i915#1982) -> PASS
> igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2:
> 
> shard-glk: FAIL (i915#79) -> PASS +1 similar issue
> igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc:
> 
> shard-glk: FAIL (i915#49) -> PASS
> igt@kms_frontbuffer_tracking@fbc-stridechange:
> 
> shard-tglb: DMESG-WARN (i915#1982) -> PASS +1 similar issue
> igt@kms_psr2_su@frontbuffer:
> 
> shard-iclb: SKIP (fdo#109642 / fdo#111068) -> PASS
> igt@kms_psr@psr2_sprite_plane_move:
> 
> shard-iclb: SKIP (fdo#109441) -> PASS +1 similar issue
> igt@kms_setmode@basic:
> 
> shard-apl: FAIL (i915#1635 / i915#31) -> PASS
> igt@prime_vgem@sync@bcs0:
> 
> shard-tglb: INCOMPLETE (i915#409) -> PASS
> Warnings
> igt@i915_pm_dc@dc3co-vpb-simulation:
> 
> shard-tglb: SKIP (i915#1904) -> DMESG-WARN (i915#2411)
> igt@i915_pm_dc@dc6-psr:
> 
> shard-tglb: FAIL (i915#454) -> FAIL (i915#1899)
> igt@kms_content_protection@atomic:
> 
> shard-apl: TIMEOUT (i915#1319 / i915#1635) -> FAIL (fdo#110321 /
> fdo#110336 / i915#1635)
> igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
> 
> shard-apl: DMESG-FAIL (fdo#108145 / i915#1635 / i915#1982) -> FAIL
> (fdo#108145 / i915#1635 / i915#265)
> igt@kms_vblank@pipe-d-ts-continuation-dpms-suspend:
> 
> shard-tglb: DMESG-WARN (i915#2411) -> INCOMPLETE (i915#1436 /
> i915#1602 / i915#1887)
> igt@runner@aborted:
> 
> shard-tglb: FAIL (i915#409) -> FAIL (i915#1602)
> {name}: This element is suppressed. This means it is ignored when
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
> Participating hosts (8 -> 8)
> No changes in participating hosts
> 
> Build changes
> CI: CI-20190529 -> None
> IGT: IGT_5797 -> IGTPW_5036
> CI-20190529: 20190529
> CI_DRM_9091: 1e20b6560332c04881daeeac61536a9ae9a4d539 @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGTPW_5036: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5036/index.html
> IGT_5797: 1a7ef7eb5e99c9a8f4ffbc13cdae399a01a9aa12 @
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
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Re: [igt-dev] [PATCH i-g-t v3 06/15] i915/gem_tiled_blits: Remove libdrm dependency

[Zbigniew Kempczyński]

On Fri, Oct 02, 2020 at 08:54:33AM +0200, Dominik Grzegorzek wrote:
> Use intel_bb / intel_buf to remove libdrm dependency.
> 
> Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  tests/i915/gem_tiled_blits.c | 75 ++++++++++++++++++------------------
>  1 file changed, 38 insertions(+), 37 deletions(-)

Remove this test from series and try to adopt it on top of:

https://patchwork.freedesktop.org/series/82954/

--
Zbigniew

> 
> diff --git a/tests/i915/gem_tiled_blits.c b/tests/i915/gem_tiled_blits.c
> index 36e96785..2149f27f 100644
> --- a/tests/i915/gem_tiled_blits.c
> +++ b/tests/i915/gem_tiled_blits.c
> @@ -60,49 +60,51 @@ IGT_TEST_DESCRIPTION("Test doing many tiled blits, with a working set larger"
>  
>  static int width = 512, height = 512;
>  
> -static drm_intel_bo *
> -create_bo(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, uint32_t x)
> +static struct intel_buf *
> +create_bo(struct buf_ops *bops, struct intel_bb *ibb, uint32_t x)
>  {
> -	drm_intel_bo *bo, *linear_bo;
> +	struct intel_buf *buf, *linear_buf;
>  	uint32_t *linear;
>  	uint32_t tiling = I915_TILING_X;
>  	int i;
>  
> -	bo = drm_intel_bo_alloc(bufmgr, "tiled bo", 1024 * 1024, 4096);
> -	do_or_die(drm_intel_bo_set_tiling(bo, &tiling, width * 4));
> -	igt_assert(tiling == I915_TILING_X);
> +	buf = intel_buf_create(bops, width, height, 32, 0, tiling,
> +			       I915_COMPRESSION_NONE);
>  
> -	linear_bo = drm_intel_bo_alloc(bufmgr, "linear src", 1024 * 1024, 4096);
> +	linear_buf = intel_buf_create(bops, width, height, 32, 0,
> +				      I915_TILING_NONE, I915_COMPRESSION_NONE);
>  
>  	/* Fill the BO with dwords starting at start_val */
> -	do_or_die(drm_intel_bo_map(linear_bo, 1));
> -	linear = linear_bo->virtual;
> +	intel_buf_cpu_map(linear_buf, 1);
> +	linear = linear_buf->ptr;
>  	for (i = 0; i < 1024 * 1024 / 4; i++)
>  		linear[i] = x++;
> -	drm_intel_bo_unmap(linear_bo);
> +	intel_buf_unmap(linear_buf);
>  
> -	intel_copy_bo (batch, bo, linear_bo, width*height*4);
> +	intel_bb_copy_intel_buf(ibb, linear_buf, buf, width*height*4);
> +	intel_bb_reset(ibb, true);
>  
> -	drm_intel_bo_unreference(linear_bo);
> +	intel_buf_destroy(linear_buf);
>  
> -	return bo;
> +	return buf;
>  }
>  
>  static void
> -check_bo(drm_intel_bo *bo, uint32_t val, struct intel_batchbuffer *batch)
> +check_bo(struct intel_buf *buf, uint32_t val, struct intel_bb *ibb)
>  {
> -	drm_intel_bo *linear_bo;
> +	struct intel_buf *linear_buf;
>  	uint32_t *linear;
>  	int num_errors;
>  	int i;
>  
> -	linear_bo = drm_intel_bo_alloc(bo->bufmgr, "linear dst",
> -				       1024 * 1024, 4096);
> +	linear_buf = intel_buf_create(buf->bops, width, height, 32, 0,
> +				      I915_TILING_NONE, I915_COMPRESSION_NONE);
>  
> -	intel_copy_bo(batch, linear_bo, bo, width*height*4);
> +	intel_bb_copy_intel_buf(ibb, buf, linear_buf, width*height*4);
> +	intel_bb_reset(ibb, true);
>  
> -	do_or_die(drm_intel_bo_map(linear_bo, 0));
> -	linear = linear_bo->virtual;
> +	intel_buf_cpu_map(linear_buf, 0);
> +	linear = linear_buf->ptr;
>  
>  	num_errors = 0;
>  	for (i = 0; i < 1024 * 1024 / 4; i++) {
> @@ -112,31 +114,28 @@ check_bo(drm_intel_bo *bo, uint32_t val, struct intel_batchbuffer *batch)
>  		val++;
>  	}
>  	igt_assert_eq(num_errors, 0);
> -	drm_intel_bo_unmap(linear_bo);
> +	intel_buf_unmap(linear_buf);
>  
> -	drm_intel_bo_unreference(linear_bo);
> +	intel_buf_destroy(linear_buf);
>  }
>  
>  static void run_test(int fd, int count)
>  {
> -	struct intel_batchbuffer *batch;
> -	drm_intel_bufmgr *bufmgr;
> -	drm_intel_bo **bo;
> +	struct intel_bb *ibb;
> +	struct buf_ops *bops;
> +	struct intel_buf **bo;
>  	uint32_t *bo_start_val;
>  	uint32_t start = 0;
>  	int i;
>  
> -	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
> -	drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32);
> -	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
> -	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
> +	bops = buf_ops_create(fd);
> +	ibb = intel_bb_create(fd, 4096);
>  
> -
> -	bo = malloc(sizeof(drm_intel_bo *)*count);
> +	bo = malloc(sizeof(struct intel_buf *)*count);
>  	bo_start_val = malloc(sizeof(uint32_t)*count);
>  
>  	for (i = 0; i < count; i++) {
> -		bo[i] = create_bo(bufmgr, batch, start);
> +		bo[i] = create_bo(bops, ibb, start);
>  		bo_start_val[i] = start;
>  		start += 1024 * 1024 / 4;
>  	}
> @@ -148,20 +147,22 @@ static void run_test(int fd, int count)
>  		if (src == dst)
>  			continue;
>  
> -		intel_copy_bo(batch, bo[dst], bo[src], width*height*4);
> +		intel_bb_copy_intel_buf(ibb, bo[src], bo[dst], width*height*4);
> +		intel_bb_reset(ibb, true);
> +
>  		bo_start_val[dst] = bo_start_val[src];
>  	}
>  
>  	for (i = 0; i < count; i++) {
> -		check_bo(bo[i], bo_start_val[i], batch);
> -		drm_intel_bo_unreference(bo[i]);
> +		check_bo(bo[i], bo_start_val[i], ibb);
> +		intel_buf_destroy(bo[i]);
>  	}
>  
>  	free(bo_start_val);
>  	free(bo);
>  
> -	intel_batchbuffer_free(batch);
> -	drm_intel_bufmgr_destroy(bufmgr);
> +	intel_bb_destroy(ibb);
> +	buf_ops_destroy(bops);
>  }
>  
>  #define MAX_32b ((1ull << 32) - 4096)
> -- 
> 2.20.1
> 
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Re: [igt-dev] [PATCH i-g-t v3 14/15] tests/i915/gem_ppgtt: make copying more readable

[Zbigniew Kempczyński]

On Fri, Oct 02, 2020 at 08:54:41AM +0200, Dominik Grzegorzek wrote:
> Use intel_bb_copy_intel_buf instead of intel_bb_blit_copy
> to make the code simplier.
> 
> Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  tests/i915/gem_ppgtt.c | 16 ++++------------
>  1 file changed, 4 insertions(+), 12 deletions(-)

Looks ok. 

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

> 
> diff --git a/tests/i915/gem_ppgtt.c b/tests/i915/gem_ppgtt.c
> index 73bd19c5..73d13fe7 100644
> --- a/tests/i915/gem_ppgtt.c
> +++ b/tests/i915/gem_ppgtt.c
> @@ -166,12 +166,8 @@ static void fork_bcs_copy(int timeout, uint32_t final,
>  			src[1] = create_bo(dst[child]->bops,
>  					   i++ | child << 16);
>  
> -			intel_bb_blt_copy(ibb, src[1], 0, 0, 4096,
> -					  src[0], 0, 0, 4096,
> -					  4096/4, SIZE/4096, 32);
> -			intel_bb_blt_copy(ibb, src[0], 0, 0, 4096,
> -					  dst[child], 0, 0, 4096,
> -					  4096/4, SIZE/4096, 32);
> +			intel_bb_copy_intel_buf(ibb, src[1], src[0], SIZE);
> +			intel_bb_copy_intel_buf(ibb, src[0], dst[child], SIZE);
>  
>  			intel_buf_destroy(src[1]);
>  			intel_buf_destroy(src[0]);
> @@ -181,12 +177,8 @@ static void fork_bcs_copy(int timeout, uint32_t final,
>  		src[1] = create_bo(dst[child]->bops,
>  				   final | child << 16);
>  
> -		intel_bb_blt_copy(ibb, src[1], 0, 0, 4096,
> -				  src[0], 0, 0, 4096,
> -				  4096/4, SIZE/4096, 32);
> -		intel_bb_blt_copy(ibb, src[0], 0, 0, 4096,
> -				  dst[child], 0, 0, 4096,
> -				  4096/4, SIZE/4096, 32);
> +		intel_bb_copy_intel_buf(ibb, src[1], src[0], SIZE);
> +		intel_bb_copy_intel_buf(ibb, src[0], dst[child], SIZE);
>  
>  		intel_buf_destroy(src[1]);
>  		intel_buf_destroy(src[0]);
> -- 
> 2.20.1
> 
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