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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 39/61] drm/i915: Use a single page table lock for each gtt.
Date: Fri,  2 Oct 2020 14:59:17 +0200	[thread overview]
Message-ID: <20201002125939.50817-40-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20201002125939.50817-1-maarten.lankhorst@linux.intel.com>

We may create page table objects on the fly, but we may need to
wait with the ww lock held. Instead of waiting on a freed obj
lock, ensure we have the same lock for each object to keep
-EDEADLK working. This ensures that i915_vma_pin_ww can lock
the page tables when required.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_ggtt.c  |  8 +++++-
 drivers/gpu/drm/i915/gt/intel_gtt.c   | 38 ++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/gt/intel_gtt.h   |  5 ++++
 drivers/gpu/drm/i915/gt/intel_ppgtt.c |  3 ++-
 drivers/gpu/drm/i915/i915_vma.c       |  5 ++++
 5 files changed, 56 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 317f377a95c6..a34e1c349145 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -615,7 +615,9 @@ static int init_aliasing_ppgtt(struct i915_ggtt *ggtt)
 	if (err)
 		goto err_ppgtt;
 
+	i915_gem_object_lock(ppgtt->vm.scratch[0], NULL);
 	err = i915_vm_pin_pt_stash(&ppgtt->vm, &stash);
+	i915_gem_object_unlock(ppgtt->vm.scratch[0]);
 	if (err)
 		goto err_stash;
 
@@ -702,6 +704,7 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
 
 	mutex_unlock(&ggtt->vm.mutex);
 	i915_address_space_fini(&ggtt->vm);
+	dma_resv_fini(&ggtt->vm.resv);
 
 	arch_phys_wc_del(ggtt->mtrr);
 
@@ -1078,6 +1081,7 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt)
 	ggtt->vm.gt = gt;
 	ggtt->vm.i915 = i915;
 	ggtt->vm.dma = &i915->drm.pdev->dev;
+	dma_resv_init(&ggtt->vm.resv);
 
 	if (INTEL_GEN(i915) <= 5)
 		ret = i915_gmch_probe(ggtt);
@@ -1085,8 +1089,10 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt)
 		ret = gen6_gmch_probe(ggtt);
 	else
 		ret = gen8_gmch_probe(ggtt);
-	if (ret)
+	if (ret) {
+		dma_resv_fini(&ggtt->vm.resv);
 		return ret;
+	}
 
 	if ((ggtt->vm.total - 1) >> 32) {
 		drm_err(&i915->drm,
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 3f1114b58b01..567a2f875088 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -13,16 +13,36 @@
 
 struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm, int sz)
 {
+	struct drm_i915_gem_object *obj;
+
 	if (I915_SELFTEST_ONLY(should_fail(&vm->fault_attr, 1)))
 		i915_gem_shrink_all(vm->i915);
 
-	return i915_gem_object_create_internal(vm->i915, sz);
+	obj = i915_gem_object_create_internal(vm->i915, sz);
+	/* ensure all dma objects have the same reservation class */
+	if (!IS_ERR(obj))
+		obj->base.resv = &vm->resv;
+	return obj;
 }
 
 int pin_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
 {
 	int err;
 
+	i915_gem_object_lock(obj, NULL);
+	err = i915_gem_object_pin_pages(obj);
+	i915_gem_object_unlock(obj);
+	if (err)
+		return err;
+
+	i915_gem_object_make_unshrinkable(obj);
+	return 0;
+}
+
+int pin_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
+{
+	int err;
+
 	err = i915_gem_object_pin_pages(obj);
 	if (err)
 		return err;
@@ -56,6 +76,20 @@ void __i915_vm_close(struct i915_address_space *vm)
 	mutex_unlock(&vm->mutex);
 }
 
+/* lock the vm into the current ww, if we lock one, we lock all */
+int i915_vm_lock_objects(struct i915_address_space *vm,
+			 struct i915_gem_ww_ctx *ww)
+{
+	if (vm->scratch[0]->base.resv == &vm->resv) {
+		return i915_gem_object_lock(vm->scratch[0], ww);
+	} else {
+		struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
+
+		/* We borrowed the scratch page from ggtt, take the top level object */
+		return i915_gem_object_lock(ppgtt->pd->pt.base, ww);
+	}
+}
+
 void i915_address_space_fini(struct i915_address_space *vm)
 {
 	drm_mm_takedown(&vm->mm);
@@ -69,6 +103,7 @@ static void __i915_vm_release(struct work_struct *work)
 
 	vm->cleanup(vm);
 	i915_address_space_fini(vm);
+	dma_resv_fini(&vm->resv);
 
 	kfree(vm);
 }
@@ -98,6 +133,7 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass)
 	mutex_init(&vm->mutex);
 	lockdep_set_subclass(&vm->mutex, subclass);
 	i915_gem_shrinker_taints_mutex(vm->i915, &vm->mutex);
+	dma_resv_init(&vm->resv);
 
 	GEM_BUG_ON(!vm->total);
 	drm_mm_init(&vm->mm, 0, vm->total);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index c13c650ced22..2c5557cc84ae 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -238,6 +238,7 @@ struct i915_address_space {
 	atomic_t open;
 
 	struct mutex mutex; /* protects vma and our lists */
+	struct dma_resv resv; /* reservation lock for all pd objects, and buffer pool */
 #define VM_CLASS_GGTT 0
 #define VM_CLASS_PPGTT 1
 
@@ -346,6 +347,9 @@ struct i915_ppgtt {
 
 #define i915_is_ggtt(vm) ((vm)->is_ggtt)
 
+int __must_check
+i915_vm_lock_objects(struct i915_address_space *vm, struct i915_gem_ww_ctx *ww);
+
 static inline bool
 i915_vm_is_4lvl(const struct i915_address_space *vm)
 {
@@ -522,6 +526,7 @@ struct i915_page_directory *alloc_pd(struct i915_address_space *vm);
 struct i915_page_directory *__alloc_pd(int npde);
 
 int pin_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj);
+int pin_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object *obj);
 
 void free_px(struct i915_address_space *vm,
 	     struct i915_page_table *pt, int lvl);
diff --git a/drivers/gpu/drm/i915/gt/intel_ppgtt.c b/drivers/gpu/drm/i915/gt/intel_ppgtt.c
index 46d9aceda64c..f3ac47702aee 100644
--- a/drivers/gpu/drm/i915/gt/intel_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ppgtt.c
@@ -262,7 +262,7 @@ int i915_vm_pin_pt_stash(struct i915_address_space *vm,
 
 	for (n = 0; n < ARRAY_SIZE(stash->pt); n++) {
 		for (pt = stash->pt[n]; pt; pt = pt->stash) {
-			err = pin_pt_dma(vm, pt->base);
+			err = pin_pt_dma_locked(vm, pt->base);
 			if (err)
 				return err;
 		}
@@ -304,6 +304,7 @@ void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt)
 	ppgtt->vm.dma = &i915->drm.pdev->dev;
 	ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size);
 
+	dma_resv_init(&ppgtt->vm.resv);
 	i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT);
 
 	ppgtt->vm.vma_ops.bind_vma    = ppgtt_bind_vma;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index ed6cf4529d5d..4106b10ac651 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -882,6 +882,11 @@ int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
 		wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm);
 
 	if (flags & vma->vm->bind_async_flags) {
+		/* lock VM */
+		err = i915_vm_lock_objects(vma->vm, ww);
+		if (err)
+			goto err_rpm;
+
 		work = i915_vma_work();
 		if (!work) {
 			err = -ENOMEM;
-- 
2.28.0

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  parent reply	other threads:[~2020-10-02 13:00 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-02 12:58 [Intel-gfx] [PATCH 00/61] drm/i915: Remove obj->mm.lock! Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 01/61] drm/i915: Move cmd parser pinning to execbuffer Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 02/61] drm/i915: Add missing -EDEADLK handling to execbuf pinning Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 03/61] drm/i915: Do not share hwsp across contexts any more, v2 Maarten Lankhorst
2020-10-06 12:25   ` kernel test robot
2020-10-02 12:58 ` [Intel-gfx] [PATCH 04/61] drm/i915: Ensure we hold the object mutex in pin correctly Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 05/61] drm/i915: Add gem object locking to madvise Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 06/61] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 07/61] drm/i915: Rework struct phys attachment handling Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 08/61] drm/i915: Convert i915_gem_object_attach_phys() to ww locking Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 09/61] drm/i915: make lockdep slightly happier about execbuf Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 10/61] drm/i915: Disable userptr pread/pwrite support Maarten Lankhorst
2020-10-02 20:14   ` Ruhl, Michael J
2020-10-12 14:13     ` Maarten Lankhorst
2020-10-19 17:54       ` Ruhl, Michael J
2020-10-02 12:58 ` [Intel-gfx] [PATCH 11/61] drm/i915: No longer allow exporting userptr through dma-buf Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 12/61] drm/i915: Reject more ioctls for userptr Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 13/61] drm/i915: Reject UNSYNCHRONIZED " Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 14/61] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 15/61] drm/i915: Flatten obj->mm.lock Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 16/61] drm/i915: Pin timeline map after first timeline pin Maarten Lankhorst
2020-10-02 23:08   ` kernel test robot
2020-10-02 12:58 ` [Intel-gfx] [PATCH 17/61] drm/i915: Populate logical context during first pin Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 18/61] drm/i915: Make ring submission compatible with obj->mm.lock removal Maarten Lankhorst
2020-10-07  7:33   ` Dan Carpenter
2020-10-07  7:33     ` Dan Carpenter
2020-10-02 12:58 ` [Intel-gfx] [PATCH 19/61] drm/i915: Handle ww locking in init_status_page Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 20/61] drm/i915: Rework clflush to work correctly without obj->mm.lock Maarten Lankhorst
2020-10-02 12:58 ` [Intel-gfx] [PATCH 21/61] drm/i915: Pass ww ctx to intel_pin_to_display_plane Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 22/61] drm/i915: Add object locking to vm_fault_cpu Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 23/61] drm/i915: Move pinning to inside engine_wa_list_verify() Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 24/61] drm/i915: Take reservation lock around i915_vma_pin Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 25/61] drm/i915: Make intel_init_workaround_bb more compatible with ww locking Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 26/61] drm/i915: Make __engine_unpark() " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 27/61] drm/i915: Take obj lock around set_domain ioctl Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 28/61] drm/i915: Defer pin calls in buffer pool until first use by caller Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 29/61] drm/i915: Fix pread/pwrite to work with new locking rules Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 30/61] drm/i915: Fix workarounds selftest, part 1 Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 31/61] drm/i915: Prepare for obj->mm.lock removal Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 32/61] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 33/61] drm/i915: Add ww locking around vm_access() Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 34/61] drm/i915: Increase ww locking for perf Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 35/61] drm/i915: Lock ww in ucode objects correctly Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 36/61] drm/i915: Add ww locking to dma-buf ops Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 37/61] drm/i915: Add missing ww lock in intel_dsb_prepare Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 38/61] drm/i915: Fix ww locking in shmem_create_from_object Maarten Lankhorst
2020-10-02 12:59 ` Maarten Lankhorst [this message]
2020-10-02 12:59 ` [Intel-gfx] [PATCH 40/61] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 41/61] drm/i915/selftests: Prepare client blit " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 42/61] drm/i915/selftests: Prepare coherency tests " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 43/61] drm/i915/selftests: Prepare context " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 44/61] drm/i915/selftests: Prepare dma-buf " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 45/61] drm/i915/selftests: Prepare execbuf " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 46/61] drm/i915/selftests: Prepare mman testcases " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 47/61] drm/i915/selftests: Prepare object tests " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 48/61] drm/i915/selftests: Prepare object blit " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 49/61] drm/i915/selftests: Prepare igt_gem_utils " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 50/61] drm/i915/selftests: Prepare context selftest " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 51/61] drm/i915/selftests: Prepare hangcheck " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 52/61] drm/i915/selftests: Prepare execlists " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 53/61] drm/i915/selftests: Prepare mocs tests " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 54/61] drm/i915/selftests: Prepare ring submission " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 55/61] drm/i915/selftests: Prepare timeline tests " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 56/61] drm/i915/selftests: Prepare i915_request " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 57/61] drm/i915/selftests: Prepare memory region " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 58/61] drm/i915/selftests: Prepare cs engine " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 59/61] drm/i915/selftests: Prepare gtt " Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 60/61] drm/i915: Finally remove obj->mm.lock Maarten Lankhorst
2020-10-02 12:59 ` [Intel-gfx] [PATCH 61/61] drm/i915: Keep userpointer bindings if seqcount is unchanged Maarten Lankhorst
2020-10-02 13:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove obj->mm.lock! Patchwork
2020-10-02 18:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-02 18:38 ` [Intel-gfx] [PATCH 00/61] " Chris Wilson

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