* [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms
@ 2020-10-02 14:03 Jon Mason
2020-10-02 14:04 ` [PATCH 2/7] gem5: remove reference " Jon Mason
` (6 more replies)
0 siblings, 7 replies; 9+ messages in thread
From: Jon Mason @ 2020-10-02 14:03 UTC (permalink / raw)
To: meta-arm
meta-arm-platforms does not exist. Change to meta-arm-bsp.
Change-Id: Iacf74f2ec2d5cd2ddaa3a952e9190e71822bd9f5
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
meta-arm-bsp/documentation/a5ds.md | 2 +-
meta-arm-bsp/documentation/foundation-armv8.md | 2 +-
meta-arm-bsp/documentation/fvp-base-arm32.md | 2 +-
meta-arm-bsp/documentation/fvp-base.md | 2 +-
meta-arm-bsp/documentation/juno.md | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/meta-arm-bsp/documentation/a5ds.md b/meta-arm-bsp/documentation/a5ds.md
index 9f88abc..38c719a 100644
--- a/meta-arm-bsp/documentation/a5ds.md
+++ b/meta-arm-bsp/documentation/a5ds.md
@@ -1,4 +1,4 @@
-# Cortex-A5 DesignStart A5DS Platform Support in meta-arm-platforms
+# Cortex-A5 DesignStart A5DS Platform Support in meta-arm-bsp
## Howto Build and Run
diff --git a/meta-arm-bsp/documentation/foundation-armv8.md b/meta-arm-bsp/documentation/foundation-armv8.md
index 7e73da5..dacdce3 100644
--- a/meta-arm-bsp/documentation/foundation-armv8.md
+++ b/meta-arm-bsp/documentation/foundation-armv8.md
@@ -1,4 +1,4 @@
-# Armv8-A Base Platform Support in meta-arm-platforms
+# Armv8-A Base Platform Support in meta-arm-bsp
## Howto Build and Run
diff --git a/meta-arm-bsp/documentation/fvp-base-arm32.md b/meta-arm-bsp/documentation/fvp-base-arm32.md
index 363e6b2..52ca1a4 100644
--- a/meta-arm-bsp/documentation/fvp-base-arm32.md
+++ b/meta-arm-bsp/documentation/fvp-base-arm32.md
@@ -1,4 +1,4 @@
-# Armv7-A Base Platform FVP Support in meta-arm-platforms
+# Armv7-A Base Platform FVP Support in meta-arm-bsp
## How to build and run
diff --git a/meta-arm-bsp/documentation/fvp-base.md b/meta-arm-bsp/documentation/fvp-base.md
index 58604e1..17c28c2 100644
--- a/meta-arm-bsp/documentation/fvp-base.md
+++ b/meta-arm-bsp/documentation/fvp-base.md
@@ -1,4 +1,4 @@
-# Armv8-A Base Platform FVP Support in meta-arm-platforms
+# Armv8-A Base Platform FVP Support in meta-arm-bsp
## Howto Build and Run
diff --git a/meta-arm-bsp/documentation/juno.md b/meta-arm-bsp/documentation/juno.md
index cc5a272..69e56bc 100644
--- a/meta-arm-bsp/documentation/juno.md
+++ b/meta-arm-bsp/documentation/juno.md
@@ -1,4 +1,4 @@
-# Juno Development Platform Support in meta-arm-platforms
+# Juno Development Platform Support in meta-arm-bsp
## Howto Build and Run
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/7] gem5: remove reference to meta-arm-platforms
2020-10-02 14:03 [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Jon Mason
@ 2020-10-02 14:04 ` Jon Mason
2020-10-02 14:04 ` [PATCH 3/7] arm-bsp: Add cortexa tunes Jon Mason
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2020-10-02 14:04 UTC (permalink / raw)
To: meta-arm
Change-Id: Ib279545916b7da00b3d74b58464fd35f511bdc11
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
meta-gem5/documentation/gem5-arm64.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meta-gem5/documentation/gem5-arm64.md b/meta-gem5/documentation/gem5-arm64.md
index dc305e8..caaa422 100644
--- a/meta-gem5/documentation/gem5-arm64.md
+++ b/meta-gem5/documentation/gem5-arm64.md
@@ -1,4 +1,4 @@
-# Gem5 Arm64 Platform Support in meta-arm-platforms
+# Gem5 Arm64 Platform Support in meta-gem5
## Howto Build and Run
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/7] arm-bsp: Add cortexa tunes
2020-10-02 14:03 [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Jon Mason
2020-10-02 14:04 ` [PATCH 2/7] gem5: remove reference " Jon Mason
@ 2020-10-02 14:04 ` Jon Mason
2020-10-02 14:04 ` [PATCH 4/7] arm-bsp: Add cortexm tunes Jon Mason
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2020-10-02 14:04 UTC (permalink / raw)
To: meta-arm
Until accepted into oe-core, add the cortex-a tunes here so that they
can be used in meta-arm-bsp. Also, this allows for them to be used for
dunfell support.
Change-Id: I9e0affef8d9d94f27cd68d5032b82276f51f7c1e
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.../machine/include/arm/arch-armv8-2a.inc | 19 +++++++
.../conf/machine/include/tune-cortexa15.inc | 51 +++++++++++++++++
.../conf/machine/include/tune-cortexa17.inc | 51 +++++++++++++++++
.../conf/machine/include/tune-cortexa32.inc | 17 ++++++
.../conf/machine/include/tune-cortexa34.inc | 20 +++++++
.../conf/machine/include/tune-cortexa35.inc | 17 ++++++
.../conf/machine/include/tune-cortexa5.inc | 51 +++++++++++++++++
.../conf/machine/include/tune-cortexa53.inc | 17 ++++++
.../conf/machine/include/tune-cortexa55.inc | 13 +++++
.../include/tune-cortexa57-cortexa53.inc | 14 +++++
.../conf/machine/include/tune-cortexa57.inc | 17 ++++++
.../conf/machine/include/tune-cortexa65.inc | 16 ++++++
.../conf/machine/include/tune-cortexa65ae.inc | 16 ++++++
.../conf/machine/include/tune-cortexa7.inc | 51 +++++++++++++++++
.../include/tune-cortexa72-cortexa53.inc | 19 +++++++
.../conf/machine/include/tune-cortexa72.inc | 13 +++++
.../include/tune-cortexa73-cortexa35.inc | 15 ++---
.../include/tune-cortexa73-cortexa53.inc | 19 +++++++
.../conf/machine/include/tune-cortexa73.inc | 16 ++++++
.../include/tune-cortexa75-cortexa55.inc | 28 +++++-----
.../conf/machine/include/tune-cortexa75.inc | 13 +++--
.../include/tune-cortexa76-cortexa55.inc | 28 +++++-----
.../conf/machine/include/tune-cortexa76.inc | 15 +++--
.../conf/machine/include/tune-cortexa76ae.inc | 16 ++++++
.../conf/machine/include/tune-cortexa77.inc | 15 +++--
.../conf/machine/include/tune-cortexa8.inc | 39 +++++++++++++
.../conf/machine/include/tune-cortexa9.inc | 55 +++++++++++++++++++
27 files changed, 609 insertions(+), 52 deletions(-)
create mode 100644 meta-arm-bsp/conf/machine/include/arm/arch-armv8-2a.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa15.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa17.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa32.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa34.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa35.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa5.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa53.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa55.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa57-cortexa53.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa57.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa65.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa65ae.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa7.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa72-cortexa53.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa72.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa53.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa73.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa76ae.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa8.inc
create mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa9.inc
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8-2a.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8-2a.inc
new file mode 100644
index 0000000..528c34e
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv8-2a.inc
@@ -0,0 +1,19 @@
+DEFAULTTUNE ?= "armv8-2a"
+
+TUNEVALID[armv8-2a] = "Enable instructions for ARMv8-a"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8-2a', ' -march=armv8.2-a', '', d)}"
+# TUNE crypto will be handled by arch-armv8a.inc below
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8-2a', 'armv8-2a:', '', d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+
+AVAILTUNES += "armv8-2a armv8-2a-crypto"
+ARMPKGARCH_tune-armv8-2a ?= "armv8-2a"
+ARMPKGARCH_tune-armv8-2a-crypto ?= "armv8-2a"
+TUNE_FEATURES_tune-armv8-2a = "aarch64 armv8-2a"
+TUNE_FEATURES_tune-armv8-2a-crypto = "${TUNE_FEATURES_tune-armv8-2a} crypto"
+PACKAGE_EXTRA_ARCHS_tune-armv8-2a = "${PACKAGE_EXTRA_ARCHS_tune-armv8a} armv8-2a"
+PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a} armv8-2a-crypto"
+BASE_LIB_tune-armv8-2a = "lib64"
+BASE_LIB_tune-armv8-2a-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa15.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa15.inc
new file mode 100644
index 0000000..0457c2d
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa15.inc
@@ -0,0 +1,51 @@
+DEFAULTTUNE ?= "armv7vethf-neon"
+
+require conf/machine/include/arm/arch-armv7ve.inc
+
+TUNEVALID[cortexa15] = "Enable Cortex-A15 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa15', ' -mcpu=cortex-a15', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa15', 'armv7ve:', '', d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa15 cortexa15t cortexa15-neon cortexa15t-neon cortexa15-neon-vfpv4 cortexa15t-neon-vfpv4"
+ARMPKGARCH_tune-cortexa15 = "cortexa15"
+ARMPKGARCH_tune-cortexa15t = "cortexa15"
+ARMPKGARCH_tune-cortexa15-neon = "cortexa15"
+ARMPKGARCH_tune-cortexa15t-neon = "cortexa15"
+ARMPKGARCH_tune-cortexa15-neon-vfpv4 = "cortexa15"
+ARMPKGARCH_tune-cortexa15t-neon-vfpv4 = "cortexa15"
+# mcpu is used so don't use armv7ve as we don't want march
+TUNE_FEATURES_tune-cortexa15 = "arm vfp cortexa15"
+TUNE_FEATURES_tune-cortexa15t = "${TUNE_FEATURES_tune-cortexa15} thumb"
+TUNE_FEATURES_tune-cortexa15-neon = "${TUNE_FEATURES_tune-cortexa15} neon"
+TUNE_FEATURES_tune-cortexa15t-neon = "${TUNE_FEATURES_tune-cortexa15-neon} thumb"
+TUNE_FEATURES_tune-cortexa15-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa15-neon} vfpv4"
+TUNE_FEATURES_tune-cortexa15t-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa15-neon-vfpv4} thumb"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve} cortexa15-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15t = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet} cortexa15-vfp cortexa15t2-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon} cortexa15-vfp cortexa15-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon} cortexa15-vfp cortexa15-neon cortexa15t2-vfp cortexa15t2-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon-vfpv4} cortexa15-vfp cortexa15-neon cortexa15-neon-vfpv4"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15t-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon-vfpv4} cortexa15-vfp cortexa15-neon cortexa15-neon-vfpv4 cortexa15t2-vfp cortexa15t2-neon cortexa15t2-neon-vfpv4"
+
+# HF Tunes
+AVAILTUNES += "cortexa15hf cortexa15thf cortexa15hf-neon cortexa15thf-neon cortexa15hf-neon-vfpv4 cortexa15thf-neon-vfpv4"
+ARMPKGARCH_tune-cortexa15hf = "cortexa15"
+ARMPKGARCH_tune-cortexa15thf = "cortexa15"
+ARMPKGARCH_tune-cortexa15hf-neon = "cortexa15"
+ARMPKGARCH_tune-cortexa15thf-neon = "cortexa15"
+ARMPKGARCH_tune-cortexa15hf-neon-vfpv4 = "cortexa15"
+ARMPKGARCH_tune-cortexa15thf-neon-vfpv4 = "cortexa15"
+# mcpu is used so don't use armv7ve as we don't want march
+TUNE_FEATURES_tune-cortexa15hf = "${TUNE_FEATURES_tune-cortexa15} callconvention-hard"
+TUNE_FEATURES_tune-cortexa15thf = "${TUNE_FEATURES_tune-cortexa15t} callconvention-hard"
+TUNE_FEATURES_tune-cortexa15hf-neon = "${TUNE_FEATURES_tune-cortexa15-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa15thf-neon = "${TUNE_FEATURES_tune-cortexa15t-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa15hf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa15-neon-vfpv4} callconvention-hard"
+TUNE_FEATURES_tune-cortexa15thf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa15t-neon-vfpv4} callconvention-hard"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf} cortexa15hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf} cortexa15hf-vfp cortexa15t2hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon} cortexa15hf-vfp cortexa15hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon} cortexa15hf-vfp cortexa15hf-neon cortexa15t2hf-vfp cortexa15t2hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon-vfpv4} cortexa15hf-vfp cortexa15hf-neon cortexa15hf-neon-vfpv4"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon-vfpv4} cortexa15hf-vfp cortexa15hf-neon cortexa15hf-neon-vfpv4 cortexa15t2hf-vfp cortexa15t2hf-neon cortexa15t2hf-neon-vfpv4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa17.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa17.inc
new file mode 100644
index 0000000..6a2107f
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa17.inc
@@ -0,0 +1,51 @@
+DEFAULTTUNE ?= "armv7vethf-neon"
+
+require conf/machine/include/arm/arch-armv7ve.inc
+
+TUNEVALID[cortexa17] = "Enable Cortex-A17 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa17', ' -mcpu=cortex-a17', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa17', 'armv7ve:', '', d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa17 cortexa17t cortexa17-neon cortexa17t-neon cortexa17-neon-vfpv4 cortexa17t-neon-vfpv4"
+ARMPKGARCH_tune-cortexa17 = "cortexa17"
+ARMPKGARCH_tune-cortexa17t = "cortexa17"
+ARMPKGARCH_tune-cortexa17-neon = "cortexa17"
+ARMPKGARCH_tune-cortexa17t-neon = "cortexa17"
+ARMPKGARCH_tune-cortexa17-neon-vfpv4 = "cortexa17"
+ARMPKGARCH_tune-cortexa17t-neon-vfpv4 = "cortexa17"
+# mcpu is used so don't use armv7ve as we don't want march
+TUNE_FEATURES_tune-cortexa17 = "arm vfp cortexa17"
+TUNE_FEATURES_tune-cortexa17t = "${TUNE_FEATURES_tune-cortexa17} thumb"
+TUNE_FEATURES_tune-cortexa17-neon = "${TUNE_FEATURES_tune-cortexa17} neon"
+TUNE_FEATURES_tune-cortexa17t-neon = "${TUNE_FEATURES_tune-cortexa17-neon} thumb"
+TUNE_FEATURES_tune-cortexa17-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa17-neon} vfpv4"
+TUNE_FEATURES_tune-cortexa17t-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa17-neon-vfpv4} thumb"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve} cortexa17-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17t = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet} cortexa17-vfp cortexa17t2-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon} cortexa17-vfp cortexa17-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon} cortexa17-vfp cortexa17-neon cortexa17t2-vfp cortexa17t2-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon-vfpv4} cortexa17-vfp cortexa17-neon cortexa17-neon-vfpv4"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17t-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon-vfpv4} cortexa17-vfp cortexa17-neon cortexa17-neon-vfpv4 cortexa17t2-vfp cortexa17t2-neon cortexa17t2-neon-vfpv4"
+
+# HF Tunes
+AVAILTUNES += "cortexa17hf cortexa17thf cortexa17hf-neon cortexa17thf-neon cortexa17hf-neon-vfpv4 cortexa17thf-neon-vfpv4"
+ARMPKGARCH_tune-cortexa17hf = "cortexa17"
+ARMPKGARCH_tune-cortexa17thf = "cortexa17"
+ARMPKGARCH_tune-cortexa17hf-neon = "cortexa17"
+ARMPKGARCH_tune-cortexa17thf-neon = "cortexa17"
+ARMPKGARCH_tune-cortexa17hf-neon-vfpv4 = "cortexa17"
+ARMPKGARCH_tune-cortexa17thf-neon-vfpv4 = "cortexa17"
+# mcpu is used so don't use armv7ve as we don't want march
+TUNE_FEATURES_tune-cortexa17hf = "${TUNE_FEATURES_tune-cortexa17} callconvention-hard"
+TUNE_FEATURES_tune-cortexa17thf = "${TUNE_FEATURES_tune-cortexa17t} callconvention-hard"
+TUNE_FEATURES_tune-cortexa17hf-neon = "${TUNE_FEATURES_tune-cortexa17-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa17thf-neon = "${TUNE_FEATURES_tune-cortexa17t-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa17hf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa17-neon-vfpv4} callconvention-hard"
+TUNE_FEATURES_tune-cortexa17thf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa17t-neon-vfpv4} callconvention-hard"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf} cortexa17hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf} cortexa17hf-vfp cortexa17t2hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon} cortexa17hf-vfp cortexa17hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon} cortexa17hf-vfp cortexa17hf-neon cortexa17t2hf-vfp cortexa17t2hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon-vfpv4} cortexa17hf-vfp cortexa17hf-neon cortexa17hf-neon-vfpv4"
+PACKAGE_EXTRA_ARCHS_tune-cortexa17thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon-vfpv4} cortexa17hf-vfp cortexa17hf-neon cortexa17hf-neon-vfpv4 cortexa17t2hf-vfp cortexa17t2hf-neon cortexa17t2hf-neon-vfpv4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa32.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa32.inc
new file mode 100644
index 0000000..a11ab7b
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa32.inc
@@ -0,0 +1,17 @@
+DEFAULTTUNE ?= "cortexa32"
+
+TUNEVALID[cortexa32] = "Enable Cortex-A32 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa32', ' -mcpu=cortex-a32', '', d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa32 cortexa32-crypto"
+ARMPKGARCH_tune-cortexa32 = "cortexa32"
+ARMPKGARCH_tune-cortexa32-crypto = "cortexa32"
+TUNE_FEATURES_tune-cortexa32 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa32"
+TUNE_FEATURES_tune-cortexa32-crypto = "${TUNE_FEATURES_tune-cortexa32} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa32 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa32"
+PACKAGE_EXTRA_ARCHS_tune-cortexa32-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa32 cortexa32-crypto"
+BASE_LIB_tune-cortexa32 = "lib"
+BASE_LIB_tune-cortexa32-crypto = "lib"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa34.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa34.inc
new file mode 100644
index 0000000..f7d4c87
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa34.inc
@@ -0,0 +1,20 @@
+#
+# Tune Settings for Cortex-A34
+#
+DEFAULTTUNE ?= "cortexa34"
+
+TUNEVALID[cortexa34] = "Enable Cortex-A34 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa34', ' -mcpu=cortex-a34', '', d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa34 cortexa34-crypto"
+ARMPKGARCH_tune-cortexa34 = "cortexa34"
+ARMPKGARCH_tune-cortexa34-crypto = "cortexa34"
+TUNE_FEATURES_tune-cortexa34 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa34"
+TUNE_FEATURES_tune-cortexa34-crypto = "${TUNE_FEATURES_tune-cortexa34} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa34 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa34"
+PACKAGE_EXTRA_ARCHS_tune-cortexa34-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa34 cortexa34-crypto"
+BASE_LIB_tune-cortexa34 = "lib64"
+BASE_LIB_tune-cortexa34-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa35.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa35.inc
new file mode 100644
index 0000000..cb3ad4c
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa35.inc
@@ -0,0 +1,17 @@
+DEFAULTTUNE ?= "cortexa35"
+
+TUNEVALID[cortexa35] = "Enable Cortex-A35 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa35', ' -mcpu=cortex-a35', '', d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa35 cortexa35-crypto"
+ARMPKGARCH_tune-cortexa35 = "cortexa35"
+ARMPKGARCH_tune-cortexa35-crypto = "cortexa35"
+TUNE_FEATURES_tune-cortexa35 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa35"
+TUNE_FEATURES_tune-cortexa35-crypto = "${TUNE_FEATURES_tune-cortexa35} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa35 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa35"
+PACKAGE_EXTRA_ARCHS_tune-cortexa35-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa35 cortexa35-crypto"
+BASE_LIB_tune-cortexa35 = "lib64"
+BASE_LIB_tune-cortexa35-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa5.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa5.inc
new file mode 100644
index 0000000..923b758
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa5.inc
@@ -0,0 +1,51 @@
+DEFAULTTUNE ?= "armv7athf-neon"
+
+require conf/machine/include/arm/arch-armv7a.inc
+
+TUNEVALID[cortexa5] = "Enable Cortex-A5 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa5', ' -mcpu=cortex-a5', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa5', 'armv7a:', '', d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa5 cortexa5t cortexa5-neon cortexa5t-neon cortexa5-neon-vfpv4 cortexa5t-neon-vfpv4"
+ARMPKGARCH_tune-cortexa5 = "cortexa5"
+ARMPKGARCH_tune-cortexa5t = "cortexa5"
+ARMPKGARCH_tune-cortexa5-neon = "cortexa5"
+ARMPKGARCH_tune-cortexa5t-neon = "cortexa5"
+ARMPKGARCH_tune-cortexa5-neon-vfpv4 = "cortexa5"
+ARMPKGARCH_tune-cortexa5t-neon-vfpv4 = "cortexa5"
+# mcpu is used so don't use armv7a as we don't want march
+TUNE_FEATURES_tune-cortexa5 = "arm vfp cortexa5"
+TUNE_FEATURES_tune-cortexa5t = "${TUNE_FEATURES_tune-cortexa5} thumb"
+TUNE_FEATURES_tune-cortexa5-neon = "${TUNE_FEATURES_tune-cortexa5} neon"
+TUNE_FEATURES_tune-cortexa5t-neon = "${TUNE_FEATURES_tune-cortexa5-neon} thumb"
+TUNE_FEATURES_tune-cortexa5-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa5-neon} vfpv4"
+TUNE_FEATURES_tune-cortexa5t-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa5-neon-vfpv4} thumb"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa5-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa5-vfp cortexa5t2-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa5-vfp cortexa5-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa5-vfp cortexa5-neon cortexa5t2-vfp cortexa5t2-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon-vfpv4} cortexa5-vfp cortexa5-neon cortexa5-neon-vfpv4"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5t-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon-vfpv4} cortexa5-vfp cortexa5-neon cortexa5-neon-vfpv4 cortexa5t2-vfp cortexa5t2-neon cortexa5t2-neon-vfpv4"
+
+# HF Tunes
+AVAILTUNES += "cortexa5hf cortexa5thf cortexa5hf-neon cortexa5thf-neon cortexa5hf-neon-vfpv4 cortexa5thf-neon-vfpv4"
+ARMPKGARCH_tune-cortexa5hf = "cortexa5"
+ARMPKGARCH_tune-cortexa5thf = "cortexa5"
+ARMPKGARCH_tune-cortexa5hf-neon = "cortexa5"
+ARMPKGARCH_tune-cortexa5thf-neon = "cortexa5"
+ARMPKGARCH_tune-cortexa5hf-neon-vfpv4 = "cortexa5"
+ARMPKGARCH_tune-cortexa5thf-neon-vfpv4 = "cortexa5"
+# mcpu is used so don't use armv7a as we don't want march
+TUNE_FEATURES_tune-cortexa5hf = "${TUNE_FEATURES_tune-cortexa5} callconvention-hard"
+TUNE_FEATURES_tune-cortexa5thf = "${TUNE_FEATURES_tune-cortexa5t} callconvention-hard"
+TUNE_FEATURES_tune-cortexa5hf-neon = "${TUNE_FEATURES_tune-cortexa5-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa5thf-neon = "${TUNE_FEATURES_tune-cortexa5t-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa5hf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa5-neon-vfpv4} callconvention-hard"
+TUNE_FEATURES_tune-cortexa5thf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa5t-neon-vfpv4} callconvention-hard"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa5hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa5hf-vfp cortexa5t2hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa5hf-vfp cortexa5hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa5hf-vfp cortexa5hf-neon cortexa5t2hf-vfp cortexa5t2hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon-vfpv4} cortexa5hf-vfp cortexa5hf-neon cortexa5hf-neon-vfpv4"
+PACKAGE_EXTRA_ARCHS_tune-cortexa5thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon-vfpv4} cortexa5hf-vfp cortexa5hf-neon cortexa5hf-neon-vfpv4 cortexa5t2hf-vfp cortexa5t2hf-neon cortexa5t2hf-neon-vfpv4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa53.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa53.inc
new file mode 100644
index 0000000..7f8863a
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa53.inc
@@ -0,0 +1,17 @@
+DEFAULTTUNE ?= "cortexa53"
+
+TUNEVALID[cortexa53] = "Enable Cortex-A53 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa53', ' -mcpu=cortex-a53', '', d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa53 cortexa53-crypto"
+ARMPKGARCH_tune-cortexa53 = "cortexa53"
+ARMPKGARCH_tune-cortexa53-crypto = "cortexa53-crypto"
+TUNE_FEATURES_tune-cortexa53 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa53"
+TUNE_FEATURES_tune-cortexa53-crypto = "${TUNE_FEATURES_tune-cortexa53} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa53"
+PACKAGE_EXTRA_ARCHS_tune-cortexa53-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa53 cortexa53-crypto"
+BASE_LIB_tune-cortexa53 = "lib64"
+BASE_LIB_tune-cortexa53-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa55.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa55.inc
new file mode 100644
index 0000000..e962973
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa55.inc
@@ -0,0 +1,13 @@
+DEFAULTTUNE ?= "cortexa55"
+
+TUNEVALID[cortexa55] = "Enable Cortex-A55 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa55', ' -mcpu=cortex-a55', '', d)}"
+
+require conf/machine/include/arm/arch-armv8-2a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa55"
+ARMPKGARCH_tune-cortexa55 = "cortexa55"
+TUNE_FEATURES_tune-cortexa55 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa55"
+PACKAGE_EXTRA_ARCHS_tune-cortexa55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa55"
+BASE_LIB_tune-cortexa55 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa57-cortexa53.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa57-cortexa53.inc
new file mode 100644
index 0000000..d329d61
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa57-cortexa53.inc
@@ -0,0 +1,14 @@
+DEFAULTTUNE ?= "cortexa57-cortexa53"
+
+TUNEVALID[cortexa57-cortexa53] = "Enable big.LITTLE Cortex-A57.Cortex-A53 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", " -mcpu=cortex-a57.cortex-a53", "", d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", "cortexa57-cortexa53:", "", d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa57-cortexa53"
+ARMPKGARCH_tune-cortexa57-cortexa53 = "cortexa57-cortexa53"
+TUNE_FEATURES_tune-cortexa57-cortexa53 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa57-cortexa53"
+PACKAGE_EXTRA_ARCHS_tune-cortexa57-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa57-cortexa53"
+BASE_LIB_tune-cortexa57-cortexa53 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa57.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa57.inc
new file mode 100644
index 0000000..91fa668
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa57.inc
@@ -0,0 +1,17 @@
+DEFAULTTUNE ?= "cortexa57"
+
+TUNEVALID[cortexa57] = "Enable Cortex-A57 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa57', ' -mcpu=cortex-a57', '', d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa57 cortexa57-crypto"
+ARMPKGARCH_tune-cortexa57 = "cortexa57"
+ARMPKGARCH_tune-cortexa57-crypto = "cortexa57-crypto"
+TUNE_FEATURES_tune-cortexa57 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa57"
+TUNE_FEATURES_tune-cortexa57-crypto = "${TUNE_FEATURES_tune-cortexa57} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa57 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa57"
+PACKAGE_EXTRA_ARCHS_tune-cortexa57-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa57 cortexa57-crypto"
+BASE_LIB_tune-cortexa57 = "lib64"
+BASE_LIB_tune-cortexa57-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa65.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa65.inc
new file mode 100644
index 0000000..ecf17fb
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa65.inc
@@ -0,0 +1,16 @@
+#
+# Tune Settings for Cortex-A65
+#
+DEFAULTTUNE ?= "cortexa65"
+
+TUNEVALID[cortexa65] = "Enable Cortex-A65 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa65', ' -mcpu=cortex-a65', '', d)}"
+
+require conf/machine/include/arm/arch-armv8-2a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa65"
+ARMPKGARCH_tune-cortexa65 = "cortexa65"
+TUNE_FEATURES_tune-cortexa65 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa55"
+PACKAGE_EXTRA_ARCHS_tune-cortexa65 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa65"
+BASE_LIB_tune-cortexa65 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa65ae.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa65ae.inc
new file mode 100644
index 0000000..aea47d0
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa65ae.inc
@@ -0,0 +1,16 @@
+#
+# Tune Settings for Cortex-A65AE
+#
+DEFAULTTUNE ?= "cortexa65ae"
+
+TUNEVALID[cortexa65ae] = "Enable Cortex-A65AE specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa65ae', ' -mcpu=cortex-a65ae', '', d)}"
+
+require conf/machine/include/arm/arch-armv8-2a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa65ae"
+ARMPKGARCH_tune-cortexa65ae = "cortexa65ae"
+TUNE_FEATURES_tune-cortexa65ae = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa65ae"
+PACKAGE_EXTRA_ARCHS_tune-cortexa65ae = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa65ae"
+BASE_LIB_tune-cortexa65ae = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa7.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa7.inc
new file mode 100644
index 0000000..05081dc
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa7.inc
@@ -0,0 +1,51 @@
+DEFAULTTUNE ?= "armv7vethf-neon"
+
+require conf/machine/include/arm/arch-armv7ve.inc
+
+TUNEVALID[cortexa7] = "Enable Cortex-A7 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa7', ' -mcpu=cortex-a7', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa7', 'armv7ve:', '', d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa7 cortexa7t cortexa7-neon cortexa7t-neon cortexa7-neon-vfpv4 cortexa7t-neon-vfpv4"
+ARMPKGARCH_tune-cortexa7 = "cortexa7"
+ARMPKGARCH_tune-cortexa7t = "cortexa7"
+ARMPKGARCH_tune-cortexa7-neon = "cortexa7"
+ARMPKGARCH_tune-cortexa7t-neon = "cortexa7"
+ARMPKGARCH_tune-cortexa7-neon-vfpv4 = "cortexa7"
+ARMPKGARCH_tune-cortexa7t-neon-vfpv4 = "cortexa7"
+# mcpu is used so don't use armv7ve as we don't want march
+TUNE_FEATURES_tune-cortexa7 = "arm vfp cortexa7"
+TUNE_FEATURES_tune-cortexa7t = "${TUNE_FEATURES_tune-cortexa7} thumb"
+TUNE_FEATURES_tune-cortexa7-neon = "${TUNE_FEATURES_tune-cortexa7} neon"
+TUNE_FEATURES_tune-cortexa7t-neon = "${TUNE_FEATURES_tune-cortexa7-neon} thumb"
+TUNE_FEATURES_tune-cortexa7-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa7-neon} vfpv4"
+TUNE_FEATURES_tune-cortexa7t-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa7-neon-vfpv4} thumb"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve} cortexa7-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7t = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet} cortexa7-vfp cortexa7t2-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon} cortexa7-vfp cortexa7-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon} cortexa7-vfp cortexa7-neon cortexa7t2-vfp cortexa7t2-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon-vfpv4} cortexa7-vfp cortexa7-neon cortexa7-neon-vfpv4"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7t-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon-vfpv4} cortexa7-vfp cortexa7-neon cortexa7-neon-vfpv4 cortexa7t2-vfp cortexa7t2-neon cortexa7t2-neon-vfpv4"
+
+# HF Tunes
+AVAILTUNES += "cortexa7hf cortexa7thf cortexa7hf-neon cortexa7thf-neon cortexa7hf-neon-vfpv4 cortexa7thf-neon-vfpv4"
+ARMPKGARCH_tune-cortexa7hf = "cortexa7"
+ARMPKGARCH_tune-cortexa7thf = "cortexa7"
+ARMPKGARCH_tune-cortexa7hf-neon = "cortexa7"
+ARMPKGARCH_tune-cortexa7thf-neon = "cortexa7"
+ARMPKGARCH_tune-cortexa7hf-neon-vfpv4 = "cortexa7"
+ARMPKGARCH_tune-cortexa7thf-neon-vfpv4 = "cortexa7"
+# mcpu is used so don't use armv7ve as we don't want march
+TUNE_FEATURES_tune-cortexa7hf = "${TUNE_FEATURES_tune-cortexa7} callconvention-hard"
+TUNE_FEATURES_tune-cortexa7thf = "${TUNE_FEATURES_tune-cortexa7t} callconvention-hard"
+TUNE_FEATURES_tune-cortexa7hf-neon = "${TUNE_FEATURES_tune-cortexa7-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa7thf-neon = "${TUNE_FEATURES_tune-cortexa7t-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa7hf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa7-neon-vfpv4} callconvention-hard"
+TUNE_FEATURES_tune-cortexa7thf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa7t-neon-vfpv4} callconvention-hard"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf} cortexa7hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf} cortexa7hf-vfp cortexa7t2hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon} cortexa7hf-vfp cortexa7hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon} cortexa7hf-vfp cortexa7hf-neon cortexa7t2hf-vfp cortexa7t2hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon-vfpv4} cortexa7hf-vfp cortexa7hf-neon cortexa7hf-neon-vfpv4"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon-vfpv4} cortexa7hf-vfp cortexa7hf-neon cortexa7hf-neon-vfpv4 cortexa7t2hf-vfp cortexa7t2hf-neon cortexa7t2hf-neon-vfpv4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa72-cortexa53.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa72-cortexa53.inc
new file mode 100644
index 0000000..98e8eba
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa72-cortexa53.inc
@@ -0,0 +1,19 @@
+DEFAULTTUNE ?= "cortexa72-cortexa53"
+
+TUNEVALID[cortexa72-cortexa53] = "Enable big.LITTLE Cortex-A72.Cortex-A53 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa72-cortexa53", " -mcpu=cortex-a72.cortex-a53", "", d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa72-cortexa53", "cortexa72-cortexa53:", "", d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# cortexa72.cortexa53 implies crc support
+AVAILTUNES += "cortexa72-cortexa53 cortexa72-cortexa53-crypto"
+ARMPKGARCH_tune-cortexa72-cortexa53 = "cortexa72-cortexa53"
+ARMPKGARCH_tune-cortexa72-cortexa53-crypto = "cortexa72-cortexa53-crypto"
+TUNE_FEATURES_tune-cortexa72-cortexa53 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa72-cortexa53"
+TUNE_FEATURES_tune-cortexa72-cortexa53-crypto = "${TUNE_FEATURES_tune-cortexa72-cortexa53} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa72-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa72-cortexa53"
+PACKAGE_EXTRA_ARCHS_tune-cortexa72-cortexa53-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa72-cortexa53 cortexa72-cortexa53-crypto"
+BASE_LIB_tune-cortexa72-cortexa53 = "lib64"
+BASE_LIB_tune-cortexa72-cortexa53-crypto = "lib64"
+
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa72.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa72.inc
new file mode 100644
index 0000000..b3f68ab
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa72.inc
@@ -0,0 +1,13 @@
+DEFAULTTUNE ?= "cortexa72"
+
+TUNEVALID[cortexa72] = "Enable Cortex-A72 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa72', ' -mcpu=cortex-a72', '', d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa72"
+ARMPKGARCH_tune-cortexa72 = "cortexa72"
+TUNE_FEATURES_tune-cortexa72 = "${TUNE_FEATURES_tune-armv8a-crc-crypto} cortexa72"
+PACKAGE_EXTRA_ARCHS_tune-cortexa72 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa72"
+BASE_LIB_tune-cortexa72 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa35.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa35.inc
index 9e0786c..927296c 100644
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa35.inc
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa35.inc
@@ -1,20 +1,21 @@
+#
+# Tune Settings for big.LITTLE Cortex-A73 - Cortex-A35
+#
DEFAULTTUNE ?= "cortexa73-cortexa35"
TUNEVALID[cortexa73-cortexa35] = "Enable big.LITTLE Cortex-A73.Cortex-A35 specific processor optimizations"
-TUNECONFLICTS[aarch64] = "armv4 armv5 armv6 armv7 armv7a"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa35", "cortexa73-cortexa35:", "" ,d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa35", "cortexa73-cortexa35:", "", d)}"
TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa35", " -mcpu=cortex-a73.cortex-a35", "", d)}"
require conf/machine/include/arm/arch-armv8a.inc
# cortexa73.cortexa35 implies crc support
-AVAILTUNES += "cortexa73-cortexa35 cortexa73-cortexa35-crypto"
+AVAILTUNES += "cortexa73-cortexa35 cortexa73-cortexa35-crypto"
ARMPKGARCH_tune-cortexa73-cortexa35 = "cortexa73-cortexa35"
ARMPKGARCH_tune-cortexa73-cortexa35-crypto = "cortexa73-cortexa35-crypto"
-TUNE_FEATURES_tune-cortexa73-cortexa35 = "aarch64 crc cortexa73-cortexa35"
-TUNE_FEATURES_tune-cortexa73-cortexa35-crypto = "aarch64 crc crypto cortexa73-cortexa35"
-PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa35 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa73-cortexa35"
+TUNE_FEATURES_tune-cortexa73-cortexa35 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa73-cortexa35"
+TUNE_FEATURES_tune-cortexa73-cortexa35-crypto = "${TUNE_FEATURES_tune-cortexa73-cortexa35} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa35 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa73-cortexa35"
PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa35-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa73-cortexa35 cortexa73-cortexa35-crypto"
BASE_LIB_tune-cortexa73-cortexa35 = "lib64"
BASE_LIB_tune-cortexa73-cortexa35-crypto = "lib64"
-
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa53.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa53.inc
new file mode 100644
index 0000000..3750f07
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa53.inc
@@ -0,0 +1,19 @@
+DEFAULTTUNE ?= "cortexa73-cortexa53"
+
+TUNEVALID[cortexa73-cortexa53] = "Enable big.LITTLE Cortex-A73.Cortex-A53 specific processor optimizations"
+MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa53", "cortexa73-cortexa53:", "", d)}"
+TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa53", " -mcpu=cortex-a73.cortex-a53", "", d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# cortexa73.cortexa53 implies crc support
+AVAILTUNES += "cortexa73-cortexa53 cortexa73-cortexa53-crypto"
+ARMPKGARCH_tune-cortexa73-cortexa53 = "cortexa73-cortexa53"
+ARMPKGARCH_tune-cortexa73-cortexa53-crypto = "cortexa73-cortexa53-crypto"
+TUNE_FEATURES_tune-cortexa73-cortexa53 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa73-cortexa53"
+TUNE_FEATURES_tune-cortexa73-cortexa53-crypto = "${TUNE_FEATURES_tune-cortexa73-cortexa53} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa73-cortexa53"
+PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa53-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa73-cortexa53 cortexa73-cortexa53-crypto"
+BASE_LIB_tune-cortexa73-cortexa53 = "lib64"
+BASE_LIB_tune-cortexa73-cortexa53-crypto = "lib64"
+
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa73.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa73.inc
new file mode 100644
index 0000000..ed2deb9
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa73.inc
@@ -0,0 +1,16 @@
+#
+# Tune Settings for Cortex-A73
+#
+DEFAULTTUNE ?= "cortexa73"
+
+TUNEVALID[cortexa73] = "Enable Cortex-A73 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa73', ' -mcpu=cortex-a73', '', d)}"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa73"
+ARMPKGARCH_tune-cortexa73 = "cortexa73"
+TUNE_FEATURES_tune-cortexa73 = "${TUNE_FEATURES_tune-armv8a-crc-crypto} cortexa73"
+PACKAGE_EXTRA_ARCHS_tune-cortexa73 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa73"
+BASE_LIB_tune-cortexa73 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa75-cortexa55.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa75-cortexa55.inc
index af4bfbe..9c45fe9 100644
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa75-cortexa55.inc
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa75-cortexa55.inc
@@ -1,20 +1,20 @@
-DEFAULTTUNE ?= "cortexa75-cortexa55"
+#
+# Tune Settings for big.LITTLE Cortex-A75 - Cortex-A55
+#
+DEFAULTTUNE ?= "cortexa75-cortexa55"
TUNEVALID[cortexa75-cortexa55] = "Enable big.LITTLE Cortex-A75.Cortex-A55 specific processor optimizations"
-TUNECONFLICTS[aarch64] = "armv4 armv5 armv6 armv7 armv7a"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa75-cortexa55", "cortexa75-cortexa55:", "" ,d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa75-cortexa55", "cortexa75-cortexa55:", "", d)}"
TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa75-cortexa55", " -mcpu=cortex-a75.cortex-a55", "", d)}"
require conf/machine/include/arm/arch-armv8-2a.inc
-# cortexa75.cortexa55 implies crc support
-AVAILTUNES += "cortexa75-cortexa55 cortexa75-cortexa55-crypto"
-ARMPKGARCH_tune-cortexa75-cortexa55 = "cortexa75-cortexa55"
-ARMPKGARCH_tune-cortexa75-cortexa55-crypto = "cortexa75-cortexa55-crypto"
-TUNE_FEATURES_tune-cortexa75-cortexa55 = "aarch64 crc cortexa75-cortexa55"
-TUNE_FEATURES_tune-cortexa75-cortexa55-crypto = "aarch64 crc crypto cortexa75-cortexa55"
-PACKAGE_EXTRA_ARCHS_tune-cortexa75-cortexa55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa75-cortexa55"
-PACKAGE_EXTRA_ARCHS_tune-cortexa75-cortexa55-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa75-cortexa55 cortexa75-cortexa55-crypto"
-BASE_LIB_tune-cortexa75-cortexa55 = "lib64"
-BASE_LIB_tune-cortexa75-cortexa55-crypto = "lib64"
-
+AVAILTUNES += "cortexa75-cortexa55 cortexa75-cortexa55-crypto"
+ARMPKGARCH_tune-cortexa75-cortexa55 = "cortexa75-cortexa55"
+ARMPKGARCH_tune-cortexa75-cortexa55-crypto = "cortexa75-cortexa55-crypto"
+TUNE_FEATURES_tune-cortexa75-cortexa55 = "${TUNE_FEATURES_tune-armv8-2a} cortexa75-cortexa55"
+TUNE_FEATURES_tune-cortexa75-cortexa55-crypto = "${TUNE_FEATURES_tune-cortexa75-cortexa55} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa75-cortexa55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a} cortexa75-cortexa55"
+PACKAGE_EXTRA_ARCHS_tune-cortexa75-cortexa55-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa75-cortexa55 cortexa75-cortexa55-crypto"
+BASE_LIB_tune-cortexa75-cortexa55 = "lib64"
+BASE_LIB_tune-cortexa75-cortexa55-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa75.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa75.inc
index 58a3019..d019450 100644
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa75.inc
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa75.inc
@@ -1,3 +1,6 @@
+#
+# Tune Settings for Cortex-A75
+#
DEFAULTTUNE ?= "cortexa75"
TUNEVALID[cortexa75] = "Enable Cortex-A75 specific processor optimizations"
@@ -6,8 +9,8 @@ TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa75', ' -mcpu=corte
require conf/machine/include/arm/arch-armv8-2a.inc
# Little Endian base configs
-AVAILTUNES += "cortexa75"
-ARMPKGARCH_tune-cortexa75 = "cortexa75"
-TUNE_FEATURES_tune-cortexa75 = "aarch64 cortexa75 crc crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa75 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa75"
-BASE_LIB_tune-cortexa75 = "lib64"
+AVAILTUNES += "cortexa75"
+ARMPKGARCH_tune-cortexa75 = "cortexa75"
+TUNE_FEATURES_tune-cortexa75 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa75"
+PACKAGE_EXTRA_ARCHS_tune-cortexa75 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa75"
+BASE_LIB_tune-cortexa75 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa76-cortexa55.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa76-cortexa55.inc
index 7c27d21..cae8ffe 100644
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa76-cortexa55.inc
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa76-cortexa55.inc
@@ -1,20 +1,20 @@
-DEFAULTTUNE ?= "cortexa76-cortexa55"
+#
+# Tune Settings for big.LITTLE Cortex-A76 - Cortex-A55
+#
+DEFAULTTUNE ?= "cortexa76-cortexa55"
TUNEVALID[cortexa76-cortexa55] = "Enable big.LITTLE Cortex-A76.Cortex-A55 specific processor optimizations"
-TUNECONFLICTS[aarch64] = "armv4 armv5 armv6 armv7 armv7a"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa76-cortexa55", "cortexa76-cortexa55:", "" ,d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa76-cortexa55", "cortexa76-cortexa55:", "", d)}"
TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa76-cortexa55", " -mcpu=cortex-a76.cortex-a55", "", d)}"
require conf/machine/include/arm/arch-armv8-2a.inc
-# cortexa76.cortexa55 implies crc support
-AVAILTUNES += "cortexa76-cortexa55 cortexa76-cortexa55-crypto"
-ARMPKGARCH_tune-cortexa76-cortexa55 = "cortexa76-cortexa55"
-ARMPKGARCH_tune-cortexa76-cortexa55-crypto = "cortexa76-cortexa55-crypto"
-TUNE_FEATURES_tune-cortexa76-cortexa55 = "aarch64 crc cortexa76-cortexa55"
-TUNE_FEATURES_tune-cortexa76-cortexa55-crypto = "aarch64 crc crypto cortexa76-cortexa55"
-PACKAGE_EXTRA_ARCHS_tune-cortexa76-cortexa55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa76-cortexa55"
-PACKAGE_EXTRA_ARCHS_tune-cortexa76-cortexa55-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa76-cortexa55 cortexa76-cortexa55-crypto"
-BASE_LIB_tune-cortexa76-cortexa55 = "lib64"
-BASE_LIB_tune-cortexa76-cortexa55-crypto = "lib64"
-
+AVAILTUNES += "cortexa76-cortexa55 cortexa76-cortexa55-crypto"
+ARMPKGARCH_tune-cortexa76-cortexa55 = "cortexa76-cortexa55"
+ARMPKGARCH_tune-cortexa76-cortexa55-crypto = "cortexa76-cortexa55-crypto"
+TUNE_FEATURES_tune-cortexa76-cortexa55 = "${TUNE_FEATURES_tune-armv8-2a} cortexa76-cortexa55"
+TUNE_FEATURES_tune-cortexa76-cortexa55-crypto = "${TUNE_FEATURES_tune-cortexa76-cortexa55} crypto"
+PACKAGE_EXTRA_ARCHS_tune-cortexa76-cortexa55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a} cortexa76-cortexa55"
+PACKAGE_EXTRA_ARCHS_tune-cortexa76-cortexa55-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa76-cortexa55 cortexa76-cortexa55-crypto"
+BASE_LIB_tune-cortexa76-cortexa55 = "lib64"
+BASE_LIB_tune-cortexa76-cortexa55-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa76.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa76.inc
index 70f9770..ae3661a 100644
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa76.inc
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa76.inc
@@ -1,4 +1,7 @@
-DEFAULTTUNE ?= "cortexa76"
+#
+# Tune Settings for Cortex-A76
+#
+DEFAULTTUNE ?= "cortexa76"
TUNEVALID[cortexa76] = "Enable Cortex-A76 specific processor optimizations"
TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa76', ' -mcpu=cortex-a76', '', d)}"
@@ -6,8 +9,8 @@ TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa76', ' -mcpu=corte
require conf/machine/include/arm/arch-armv8-2a.inc
# Little Endian base configs
-AVAILTUNES += "cortexa76"
-ARMPKGARCH_tune-cortexa76 = "cortexa76"
-TUNE_FEATURES_tune-cortexa76 = "aarch64 cortexa76 crc crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa76 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa76"
-BASE_LIB_tune-cortexa76 = "lib64"
+AVAILTUNES += "cortexa76"
+ARMPKGARCH_tune-cortexa76 = "cortexa76"
+TUNE_FEATURES_tune-cortexa76 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa76"
+PACKAGE_EXTRA_ARCHS_tune-cortexa76 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa76"
+BASE_LIB_tune-cortexa76 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa76ae.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa76ae.inc
new file mode 100644
index 0000000..d368aa1
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa76ae.inc
@@ -0,0 +1,16 @@
+#
+# Tune Settings for Cortex-A76AE
+#
+DEFAULTTUNE ?= "cortexa76ae"
+
+TUNEVALID[cortexa76ae] = "Enable Cortex-A76AE specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa76ae', ' -mcpu=cortex-a76ae', '', d)}"
+
+require conf/machine/include/arm/arch-armv8-2a.inc
+
+# Little Endian base configs
+AVAILTUNES += "cortexa76ae"
+ARMPKGARCH_tune-cortexa76ae = "cortexa76ae"
+TUNE_FEATURES_tune-cortexa65ae = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa76ae"
+PACKAGE_EXTRA_ARCHS_tune-cortexa76ae = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa76ae"
+BASE_LIB_tune-cortexa76ae = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa77.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa77.inc
index 672c8d5..048fa31 100644
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa77.inc
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa77.inc
@@ -1,4 +1,7 @@
-DEFAULTTUNE ?= "cortexa77"
+#
+# Tune Settings for Cortex-A77
+#
+DEFAULTTUNE ?= "cortexa77"
TUNEVALID[cortexa77] = "Enable Cortex-A77 specific processor optimizations"
TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa77', ' -mcpu=cortex-a77', '', d)}"
@@ -6,8 +9,8 @@ TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa77', ' -mcpu=corte
require conf/machine/include/arm/arch-armv8-2a.inc
# Little Endian base configs
-AVAILTUNES += "cortexa77"
-ARMPKGARCH_tune-cortexa77 = "cortexa77"
-TUNE_FEATURES_tune-cortexa77 = "aarch64 cortexa77 crc crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa77 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa77"
-BASE_LIB_tune-cortexa77 = "lib64"
+AVAILTUNES += "cortexa77"
+ARMPKGARCH_tune-cortexa77 = "cortexa77"
+TUNE_FEATURES_tune-cortexa77 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa77"
+PACKAGE_EXTRA_ARCHS_tune-cortexa77 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa77"
+BASE_LIB_tune-cortexa77 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa8.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa8.inc
new file mode 100644
index 0000000..f27bfb8
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa8.inc
@@ -0,0 +1,39 @@
+DEFAULTTUNE ?= "armv7athf-neon"
+
+require conf/machine/include/arm/arch-armv7a.inc
+
+TUNEVALID[cortexa8] = "Enable Cortex-A8 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa8', ' -mcpu=cortex-a8', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa8', 'armv7a:', '', d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa8 cortexa8t cortexa8-neon cortexa8t-neon"
+ARMPKGARCH_tune-cortexa8 = "cortexa8"
+ARMPKGARCH_tune-cortexa8t = "cortexa8"
+ARMPKGARCH_tune-cortexa8-neon = "cortexa8"
+ARMPKGARCH_tune-cortexa8t-neon = "cortexa8"
+# mcpu is used so don't use armv7a as we don't want march
+TUNE_FEATURES_tune-cortexa8 = "arm vfp cortexa8"
+TUNE_FEATURES_tune-cortexa8t = "${TUNE_FEATURES_tune-cortexa8} thumb"
+TUNE_FEATURES_tune-cortexa8-neon = "${TUNE_FEATURES_tune-cortexa8} neon"
+TUNE_FEATURES_tune-cortexa8t-neon = "${TUNE_FEATURES_tune-cortexa8-neon} thumb"
+PACKAGE_EXTRA_ARCHS_tune-cortexa8 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa8-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa8t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa8-vfp cortexa8t2-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa8-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa8-vfp cortexa8-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa8t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa8-vfp cortexa8-neon cortexa8t2-vfp cortexa8t2-neon"
+
+# HF Tunes
+AVAILTUNES += "cortexa8hf cortexa8thf cortexa8hf-neon cortexa8thf-neon"
+ARMPKGARCH_tune-cortexa8hf = "cortexa8"
+ARMPKGARCH_tune-cortexa8thf = "cortexa8"
+ARMPKGARCH_tune-cortexa8hf-neon = "cortexa8"
+ARMPKGARCH_tune-cortexa8thf-neon = "cortexa8"
+# mcpu is used so don't use armv7a as we don't want march
+TUNE_FEATURES_tune-cortexa8hf = "${TUNE_FEATURES_tune-cortexa8} callconvention-hard"
+TUNE_FEATURES_tune-cortexa8thf = "${TUNE_FEATURES_tune-cortexa8t} callconvention-hard"
+TUNE_FEATURES_tune-cortexa8hf-neon = "${TUNE_FEATURES_tune-cortexa8-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa8thf-neon = "${TUNE_FEATURES_tune-cortexa8t-neon} callconvention-hard"
+PACKAGE_EXTRA_ARCHS_tune-cortexa8hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa8hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa8thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa8hf-vfp cortexa8t2hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa8hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa8hf-vfp cortexa8hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa8thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa8hf-vfp cortexa8hf-neon cortexa8t2hf-vfp cortexa8t2hf-neon"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa9.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa9.inc
new file mode 100644
index 0000000..0eb8f3b
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexa9.inc
@@ -0,0 +1,55 @@
+DEFAULTTUNE ?= "armv7athf-neon"
+
+require conf/machine/include/arm/arch-armv7a.inc
+
+TUNEVALID[cortexa9] = "Enable Cortex-A9 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa9', ' -mcpu=cortex-a9', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa9', 'armv7a:', '', d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa9 cortexa9t cortexa9-neon cortexa9t-neon"
+ARMPKGARCH_tune-cortexa9 = "cortexa9"
+ARMPKGARCH_tune-cortexa9t = "cortexa9"
+ARMPKGARCH_tune-cortexa9-neon = "cortexa9"
+ARMPKGARCH_tune-cortexa9t-neon = "cortexa9"
+# mcpu is used so don't use armv7a as we don't want march
+TUNE_FEATURES_tune-cortexa9 = "arm vfp cortexa9"
+TUNE_FEATURES_tune-cortexa9t = "${TUNE_FEATURES_tune-cortexa9} thumb"
+TUNE_FEATURES_tune-cortexa9-neon = "${TUNE_FEATURES_tune-cortexa9} neon"
+TUNE_FEATURES_tune-cortexa9t-neon = "${TUNE_FEATURES_tune-cortexa9-neon} thumb"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa9-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa9-vfp cortexa9t2-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa9-vfp cortexa9-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa9-vfp cortexa9-neon cortexa9t2-vfp cortexa9t2-neon"
+
+# HF Tunes
+AVAILTUNES += "cortexa9hf cortexa9thf cortexa9hf-neon cortexa9thf-neon"
+ARMPKGARCH_tune-cortexa9hf = "cortexa9"
+ARMPKGARCH_tune-cortexa9thf = "cortexa9"
+ARMPKGARCH_tune-cortexa9hf-neon = "cortexa9"
+ARMPKGARCH_tune-cortexa9thf-neon = "cortexa9"
+# mcpu is used so don't use armv7a as we don't want march
+TUNE_FEATURES_tune-cortexa9hf = "${TUNE_FEATURES_tune-cortexa9} callconvention-hard"
+TUNE_FEATURES_tune-cortexa9thf = "${TUNE_FEATURES_tune-cortexa9t} callconvention-hard"
+TUNE_FEATURES_tune-cortexa9hf-neon = "${TUNE_FEATURES_tune-cortexa9-neon} callconvention-hard"
+TUNE_FEATURES_tune-cortexa9thf-neon = "${TUNE_FEATURES_tune-cortexa9t-neon} callconvention-hard"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa9hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa9hf-vfp cortexa9t2hf-vfp"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa9hf-vfp cortexa9hf-neon"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa9hf-vfp cortexa9hf-neon cortexa9t2hf-vfp cortexa9t2hf-neon"
+
+# VFPv3 Tunes
+AVAILTUNES += "cortexa9-vfpv3 cortexa9t-vfpv3 cortexa9hf-vfpv3 cortexa9thf-vfpv3"
+ARMPKGARCH_tune-cortexa9-vfpv3 = "cortexa9"
+ARMPKGARCH_tune-cortexa9t-vfpv3 = "cortexa9"
+ARMPKGARCH_tune-cortexa9hf-vfpv3 = "cortexa9"
+ARMPKGARCH_tune-cortexa9thf-vfpv3 = "cortexa9"
+# mcpu is used so don't use armv7a as we don't want march
+TUNE_FEATURES_tune-cortexa9-vfpv3 = "${TUNE_FEATURES_tune-cortexa9} vfpv3"
+TUNE_FEATURES_tune-cortexa9t-vfpv3 = "${TUNE_FEATURES_tune-cortexa9t} vfpv3"
+TUNE_FEATURES_tune-cortexa9hf-vfpv3 = "${TUNE_FEATURES_tune-cortexa9hf} vfpv3"
+TUNE_FEATURES_tune-cortexa9thf-vfpv3 = "${TUNE_FEATURES_tune-cortexa9thf} vfpv3"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9-vfpv3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-vfpv3} cortexa9-vfp cortexa9-vfpv3"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9t-vfpv3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-vfpv3} cortexa9-vfp cortexa9-vfpv3 cortexa9t2-vfp cortexa9t2-vfpv3"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9hf-vfpv3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-vfpv3} cortexa9hf-vfp cortexa9hf-vfpv3"
+PACKAGE_EXTRA_ARCHS_tune-cortexa9thf-vfpv3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-vfpv3} cortexa9hf-vfp cortexa9hf-vfpv3 cortexa9t2hf-vfp cortexa9t2hf-vfpv3"
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/7] arm-bsp: Add cortexm tunes
2020-10-02 14:03 [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Jon Mason
2020-10-02 14:04 ` [PATCH 2/7] gem5: remove reference " Jon Mason
2020-10-02 14:04 ` [PATCH 3/7] arm-bsp: Add cortexa tunes Jon Mason
@ 2020-10-02 14:04 ` Jon Mason
2020-10-02 14:04 ` [PATCH 5/7] arm-bsp: rename musca_b1 and musca_s1 Jon Mason
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2020-10-02 14:04 UTC (permalink / raw)
To: meta-arm
Until accepted into oe-core, add the cortex-m tunes here so that they
can be used in meta-arm-bsp.
Change-Id: Iaa74937da61cd8d35c27beae7e09351e996a262e
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.../conf/machine/include/arm/arch-armv6m.inc | 19 ++++++++++++
.../conf/machine/include/arm/arch-armv7em.inc | 18 +++++++++++
.../conf/machine/include/arm/arch-armv7m.inc | 30 +++++++++++++++++++
.../include/arm/arch-armv8-1m-main.inc | 19 ++++++++++++
.../machine/include/arm/arch-armv8m-base.inc | 18 +++++++++++
.../machine/include/arm/arch-armv8m-main.inc | 19 ++++++++++++
.../conf/machine/include/tune-cortexm0.inc | 14 +++++++++
.../machine/include/tune-cortexm0plus.inc | 14 +++++++++
.../conf/machine/include/tune-cortexm1.inc | 15 ++++++++++
.../conf/machine/include/tune-cortexm23.inc | 15 ++++++++++
.../conf/machine/include/tune-cortexm3.inc | 15 ++++++++++
.../conf/machine/include/tune-cortexm33.inc | 15 ++++++++++
.../conf/machine/include/tune-cortexm35p.inc | 15 ++++++++++
.../conf/machine/include/tune-cortexm4.inc | 15 ++++++++++
.../conf/machine/include/tune-cortexm55.inc | 15 ++++++++++
.../conf/machine/include/tune-cortexm7.inc | 15 ++++++++++
16 files changed, 271 insertions(+)
create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv6m.inc
create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm0.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm0plus.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm1.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm23.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm3.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm33.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm35p.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm4.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm55.inc
create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm7.inc
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv6m.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv6m.inc
new file mode 100755
index 0000000..739550d
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv6m.inc
@@ -0,0 +1,19 @@
+# Tuning for ARMV6-m defined in ARM v6-M ArchitectureReference Manual
+# at https://static.docs.arm.com/ddi0419/d/DDI0419D_armv6m_arm.pdf
+DEFAULTTUNE ?= "armv6m"
+
+TUNEVALID[armv6m] = "Enable instructions for ARMv6-m"
+TUNECONFLICTS[armv6m] = "armv4 armv5 armv6 armv7a"
+
+# Use armv6s-m instead of armv6-m to avoid gcc bug "SVC is not permitted on this architecture".
+# SVC is a valid instruction.
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv6m', ' -march=armv6s-m', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv6m', 'armv6m:', '', d)}"
+
+require conf/machine/include/arm/arch-armv5.inc
+
+# Little Endian
+AVAILTUNES += "armv6m"
+ARMPKGARCH_tune-armv6m = "armv6m"
+TUNE_FEATURES_tune-armv6m = "armv6m"
+PACKAGE_EXTRA_ARCHS_tune-armv6m = "armv6m"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
new file mode 100755
index 0000000..4f21c6a
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
@@ -0,0 +1,18 @@
+#
+# Defaults for ARMv7e-m
+#
+DEFAULTTUNE ?= "armv7em"
+
+TUNEVALID[armv7em] = "Enable instructions for ARMv7e-m"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv7em', ' -march=armv7e-m', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv7em', 'armv7em:', '', d)}"
+
+TUNECONFLICTS[armv7em] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv7m.inc
+
+
+AVAILTUNES += "armv7em"
+ARMPKGARCH_tune-armv7em = "armv7em"
+TUNE_FEATURES_tune-armv7em = "armv7em"
+PACKAGE_EXTRA_ARCHS_tune-armv7em = "armv7em"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
new file mode 100755
index 0000000..af82e6c
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
@@ -0,0 +1,30 @@
+#
+# Tune Settings for Cortex-M3
+#
+TUNEVALID[cortexm3] = "Enable Cortex-M3 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm3', ' -mcpu=cortex-m3', '', d)}"
+
+
+AVAILTUNES += "cortexm3"
+ARMPKGARCH_tune-cortexm3 = "cortexm3"
+TUNE_FEATURES_tune-cortexm3 = "${TUNE_FEATURES_tune-armv7m} cortexm3"
+PACKAGE_EXTRA_ARCHS_tune-cortexm3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7m} cortexm3"
+
+#
+# Defaults for ARMv7-m
+#
+DEFAULTTUNE ?= "armv7m"
+
+TUNEVALID[armv7m] = "Enable instructions for ARMv7-m"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv7m', ' -march=armv7-m', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv7m', 'armv7m:', '', d)}"
+
+TUNECONFLICTS[armv7m] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv6m.inc
+
+
+AVAILTUNES += "armv7m"
+ARMPKGARCH_tune-armv7m = "armv7m"
+TUNE_FEATURES_tune-armv7m = "armv7m"
+PACKAGE_EXTRA_ARCHS_tune-armv7m = "armv7m"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
new file mode 100755
index 0000000..505897a
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
@@ -0,0 +1,19 @@
+#
+#
+# Defaults for ARMv8.1-M.main
+#
+DEFAULTTUNE ?= "armv8-1m-main"
+
+TUNEVALID[armv8-1m-main] = "Enable instructions for ARMv8.1-m.main"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8-1m-main', ' -march=armv8.1-m.main', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8-1m-main', 'armv8-1m-main:', '', d)}"
+
+TUNECONFLICTS[armv8-1m-main] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv8m-main.inc
+
+
+AVAILTUNES += "armv8-1m-main"
+ARMPKGARCH_tune-armv8-1m-main = "armv8-1m-main"
+TUNE_FEATURES_tune-armv8-1m-main = "armv8-1m-main"
+PACKAGE_EXTRA_ARCHS_tune-armv8-1m-main = "armv8-1m-main"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
new file mode 100755
index 0000000..5df1728
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
@@ -0,0 +1,18 @@
+#
+# Defaults for ARMv8-m.base
+#
+DEFAULTTUNE ?= "armv8m-base"
+
+TUNEVALID[armv8m-base] = "Enable instructions for ARMv8-m.base"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-base', ' -march=armv8-m.base', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-base', 'armv8m-base:', '', d)}"
+
+TUNECONFLICTS[armv8m-base] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv7m.inc
+
+
+AVAILTUNES += "armv8m-base"
+ARMPKGARCH_tune-armv8m-base = "armv8m-base"
+TUNE_FEATURES_tune-armv8m-base = "armv8m-base"
+PACKAGE_EXTRA_ARCHS_tune-armv8m-base = "armv8m-base"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
new file mode 100755
index 0000000..a03c01c
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
@@ -0,0 +1,19 @@
+#
+#
+# Defaults for ARMv8-M.main
+#
+DEFAULTTUNE ?= "armv8m-main"
+
+TUNEVALID[armv8m-main] = "Enable instructions for ARMv8-m.main"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-main', ' -march=armv8-m.main', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-main', 'armv8m-main:', '', d)}"
+
+TUNECONFLICTS[armv8m-main] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv8m-base.inc
+
+
+AVAILTUNES += "armv8m-main"
+ARMPKGARCH_tune-armv8m-main = "armv8m-main"
+TUNE_FEATURES_tune-armv8m-main = "armv8m-main"
+PACKAGE_EXTRA_ARCHS_tune-armv8m-main = "armv8m-main"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm0.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm0.inc
new file mode 100755
index 0000000..7849ff6
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm0.inc
@@ -0,0 +1,14 @@
+#
+# Tune Settings for Cortex-M0
+#
+DEFAULTTUNE ?= "cortexm0"
+
+TUNEVALID[cortexm0] = "Enable Cortex-M0 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm0', ' -mcpu=cortex-m0', '', d)}"
+
+require conf/machine/include/arm/arch-armv6m.inc
+
+AVAILTUNES += "cortexm0"
+ARMPKGARCH_tune-cortexm0 = "cortexm0"
+TUNE_FEATURES_tune-cortexm0 = "${TUNE_FEATURES_tune-armv6m} cortexm0"
+PACKAGE_EXTRA_ARCHS_tune-cortexm0 = "${PACKAGE_EXTRA_ARCHS_tune-armv6m} cortexm0"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm0plus.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm0plus.inc
new file mode 100755
index 0000000..83f8cac
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm0plus.inc
@@ -0,0 +1,14 @@
+#
+# Tune Settings for Cortex-M0+
+#
+DEFAULTTUNE ?= "cortexm0-plus"
+
+TUNEVALID[cortexm0-plus] = "Enable Cortex-M0 Plus specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm0-plus', ' -mcpu=cortex-m0plus', '', d)}"
+
+require conf/machine/include/arm/arch-armv6m.inc
+
+AVAILTUNES += "cortexm0-plus"
+ARMPKGARCH_tune-cortexm0-plus = "cortexm0-plus"
+TUNE_FEATURES_tune-cortexm0-plus = "${TUNE_FEATURES_tune-armv6m} cortexm0-plus"
+PACKAGE_EXTRA_ARCHS_tune-cortexm0-plus = "${PACKAGE_EXTRA_ARCHS_tune-armv6m} cortexm0-plus"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm1.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm1.inc
new file mode 100755
index 0000000..0bcdbe2
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm1.inc
@@ -0,0 +1,15 @@
+#
+# Tune Settings for Cortex-M1
+#
+DEFAULTTUNE ?= "cortexm1"
+
+TUNEVALID[cortexm1] = "Enable Cortex-M1 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm1', ' -mcpu=cortex-m1', '', d)}"
+
+require conf/machine/include/arm/arch-armv6m.inc
+
+
+AVAILTUNES += "cortexm1"
+ARMPKGARCH_tune-cortexm1 = "cortexm1"
+TUNE_FEATURES_tune-cortexm1 = "${TUNE_FEATURES_tune-armv6m} cortexm1"
+PACKAGE_EXTRA_ARCHS_tune-cortexm1 = "${PACKAGE_EXTRA_ARCHS_tune-armv6m} cortexm1"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm23.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm23.inc
new file mode 100755
index 0000000..12d4c14
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm23.inc
@@ -0,0 +1,15 @@
+#
+# Tune Settings for Cortex-M23
+#
+DEFAULTTUNE ?= "cortexm23"
+
+TUNEVALID[cortexm23] = "Enable Cortex-M23 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm23', ' -mcpu=cortex-m23', '', d)}"
+
+require conf/machine/include/arm/arch-armv8m-base.inc
+
+
+AVAILTUNES += "cortexm23"
+ARMPKGARCH_tune-cortexm23 = "cortexm23"
+TUNE_FEATURES_tune-cortexm23 = "${TUNE_FEATURES_tune-armv8m-base} cortexm23"
+PACKAGE_EXTRA_ARCHS_tune-cortexm23 = "${PACKAGE_EXTRA_ARCHS_tune-armv8m-base} cortexm23"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm3.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm3.inc
new file mode 100755
index 0000000..605c9a7
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm3.inc
@@ -0,0 +1,15 @@
+#
+# Tune Settings for Cortex-M3
+#
+DEFAULTTUNE ?= "cortexm3"
+
+TUNEVALID[cortexm3] = "Enable Cortex-M3 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm3', ' -mcpu=cortex-m3', '', d)}"
+
+require conf/machine/include/arm/arch-armv7m.inc
+
+
+AVAILTUNES += "cortexm3"
+ARMPKGARCH_tune-cortexm3 = "cortexm3"
+TUNE_FEATURES_tune-cortexm3 = "${TUNE_FEATURES_tune-armv7m} cortexm3"
+PACKAGE_EXTRA_ARCHS_tune-cortexm3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7m} cortexm3"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm33.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm33.inc
new file mode 100755
index 0000000..d9c88aa
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm33.inc
@@ -0,0 +1,15 @@
+#
+# Tune Settings for Cortex-M33
+#
+DEFAULTTUNE ?= "armv8m"
+
+TUNEVALID[armv8m] = "Enable instructions for ARMv8-m"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8m', ' -march=armv7-m', '', d)}"
+
+require conf/machine/include/arm/arch-armv8m-main.inc
+
+AVAILTUNES += "armv8m"
+ARMPKGARCH_tune-armv8m ?= "armv8m"
+TUNE_FEATURES_tune-armv8m = "armv8m"
+PACKAGE_EXTRA_ARCHS_tune-armv8m = "armv8m"
+
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm35p.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm35p.inc
new file mode 100755
index 0000000..562ee81
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm35p.inc
@@ -0,0 +1,15 @@
+#
+# Tune Settings for Cortex-M35P
+#
+DEFAULTTUNE ?= "cortexm33p"
+
+TUNEVALID[cortexm35p] = "Enable Cortex-M35p specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm35p', ' -mcpu=cortex-m35p', '', d)}"
+
+require conf/machine/include/arm/arch-armv8m-main.inc
+
+
+AVAILTUNES += "cortexm35p"
+ARMPKGARCH_tune-cortexm35p = "cortexm35p"
+TUNE_FEATURES_tune-cortexm35p = "${TUNE_FEATURES_tune-armv8m-main} cortexm35p"
+PACKAGE_EXTRA_ARCHS_tune-cortexm35p = "${PACKAGE_EXTRA_ARCHS_tune-armv8m-main} cortexm35p"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm4.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm4.inc
new file mode 100755
index 0000000..74aa27c
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm4.inc
@@ -0,0 +1,15 @@
+#
+# Tune Settings for Cortex-M4
+#
+DEFAULTTUNE ?= "cortexm4"
+
+TUNEVALID[cortexm4] = "Enable Cortex-M4 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm4', ' -mcpu=cortex-m4', '', d)}"
+
+require conf/machine/include/arm/arch-armv7em.inc
+
+
+AVAILTUNES += "cortexm4"
+ARMPKGARCH_tune-cortexm4 = "cortexm4"
+TUNE_FEATURES_tune-cortexm4 = "${TUNE_FEATURES_tune-armv7em} cortexm4"
+PACKAGE_EXTRA_ARCHS_tune-cortexm4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7em} cortexm4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm55.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm55.inc
new file mode 100755
index 0000000..3f7f3d7
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm55.inc
@@ -0,0 +1,15 @@
+#
+# Tune Settings for Cortex-M55
+#
+DEFAULTTUNE ?= "cortexm55"
+
+TUNEVALID[cortexm55] = "Enable Cortex-M55 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm55', ' -mcpu=cortex-m55', '', d)}"
+
+require conf/machine/include/arm/arch-armv8-1m-main.inc
+
+
+AVAILTUNES += "cortexm55"
+ARMPKGARCH_tune-cortexm55 = "cortexm55"
+TUNE_FEATURES_tune-cortexm55 = "${TUNE_FEATURES_tune-armv8-1m-main} cortexm55"
+PACKAGE_EXTRA_ARCHS_tune-cortexm55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-1m-main} cortexm55"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm7.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm7.inc
new file mode 100755
index 0000000..8409108
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm7.inc
@@ -0,0 +1,15 @@
+#
+# Tune Settings for Cortex-M7
+#
+DEFAULTTUNE ?= "cortexm7"
+
+TUNEVALID[cortexm7] = "Enable Cortex-M7 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm7', ' -mcpu=cortex-m7', '', d)}"
+
+require conf/machine/include/arm/arch-armv7em.inc
+
+
+AVAILTUNES += "cortexm7"
+ARMPKGARCH_tune-cortexm7 = "cortexm7"
+TUNE_FEATURES_tune-cortexm7 = "${TUNE_FEATURES_tune-armv7em} cortexm7"
+PACKAGE_EXTRA_ARCHS_tune-cortexm7 = "${PACKAGE_EXTRA_ARCHS_tune-armv7em} cortexm7"
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 5/7] arm-bsp: rename musca_b1 and musca_s1
2020-10-02 14:03 [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Jon Mason
` (2 preceding siblings ...)
2020-10-02 14:04 ` [PATCH 4/7] arm-bsp: Add cortexm tunes Jon Mason
@ 2020-10-02 14:04 ` Jon Mason
2020-10-02 14:04 ` [PATCH 6/7] arm-bsp: remove armv8m Jon Mason
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2020-10-02 14:04 UTC (permalink / raw)
To: meta-arm
Rename musca_b1 and musca_s1 machines to have the standard hyphen
instead of underscore.
Change-Id: Ifd43d4f68cd964f5acd546a8380f165cc53588ab
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
meta-arm-bsp/conf/machine/{musca_b1.conf => musca-b1.conf} | 0
meta-arm-bsp/conf/machine/{musca_s1.conf => musca-s1.conf} | 0
.../trusted-firmware-m/trusted-firmware-m_%.bbappend | 6 +++---
3 files changed, 3 insertions(+), 3 deletions(-)
rename meta-arm-bsp/conf/machine/{musca_b1.conf => musca-b1.conf} (100%)
rename meta-arm-bsp/conf/machine/{musca_s1.conf => musca-s1.conf} (100%)
diff --git a/meta-arm-bsp/conf/machine/musca_b1.conf b/meta-arm-bsp/conf/machine/musca-b1.conf
similarity index 100%
rename from meta-arm-bsp/conf/machine/musca_b1.conf
rename to meta-arm-bsp/conf/machine/musca-b1.conf
diff --git a/meta-arm-bsp/conf/machine/musca_s1.conf b/meta-arm-bsp/conf/machine/musca-s1.conf
similarity index 100%
rename from meta-arm-bsp/conf/machine/musca_s1.conf
rename to meta-arm-bsp/conf/machine/musca-s1.conf
diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m_%.bbappend b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m_%.bbappend
index 32b50b7..d7a099e 100644
--- a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m_%.bbappend
+++ b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m_%.bbappend
@@ -1,4 +1,4 @@
-COMPATIBLE_MACHINE = "musca_b1|musca_s1"
+COMPATIBLE_MACHINE = "musca-b1|musca-s1"
-TFM_PLATFORM_musca_b1 = "MUSCA_B1"
-TFM_PLATFORM_musca_s1 = "MUSCA_S1"
+TFM_PLATFORM_musca-b1 = "MUSCA_B1"
+TFM_PLATFORM_musca-s1 = "MUSCA_S1"
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 6/7] arm-bsp: remove armv8m
2020-10-02 14:03 [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Jon Mason
` (3 preceding siblings ...)
2020-10-02 14:04 ` [PATCH 5/7] arm-bsp: rename musca_b1 and musca_s1 Jon Mason
@ 2020-10-02 14:04 ` Jon Mason
2020-10-02 14:04 ` [PATCH 7/7] arm-bsp: musca-b1: Add Zephyr support Jon Mason
2020-10-03 8:24 ` [meta-arm] [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Ross Burton
6 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2020-10-02 14:04 UTC (permalink / raw)
To: meta-arm
Musca B1 and S1 should be using the external tune files. Remove armv8,
as it is not correct anyway, and use the Cortex-M33 tune.
Note: This change will prevent glibc from compiling (and possibly
others). This isn't relevant for a Cortex-M, as it should be
running an RTOS not Linux.
Change-Id: Id88d2af41217e8b5bad01e98b337cf0523acf6e1
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
meta-arm-bsp/conf/machine/armv8m.inc | 12 ------------
meta-arm-bsp/conf/machine/musca-b1.conf | 6 ++++--
meta-arm-bsp/conf/machine/musca-s1.conf | 6 ++++--
3 files changed, 8 insertions(+), 16 deletions(-)
delete mode 100644 meta-arm-bsp/conf/machine/armv8m.inc
diff --git a/meta-arm-bsp/conf/machine/armv8m.inc b/meta-arm-bsp/conf/machine/armv8m.inc
deleted file mode 100644
index 0763193..0000000
--- a/meta-arm-bsp/conf/machine/armv8m.inc
+++ /dev/null
@@ -1,12 +0,0 @@
-DEFAULTTUNE ?= "armv8m"
-
-TUNEVALID[armv8m] = "Enable instructions for ARMv8-m"
-AVAILTUNES += "armv8m"
-
-PREFERRED_PROVIDER_virtual/kernel = "linux-dummy"
-
-ARMPKGARCH_tune-armv8m ?= "armv8m"
-TUNE_FEATURES_tune-armv8m = "armv8m"
-PACKAGE_EXTRA_ARCHS_tune-armv8m = "armv8m"
-
-require conf/machine/include/arm/arch-arm.inc
diff --git a/meta-arm-bsp/conf/machine/musca-b1.conf b/meta-arm-bsp/conf/machine/musca-b1.conf
index 0f9734b..e7320ba 100644
--- a/meta-arm-bsp/conf/machine/musca-b1.conf
+++ b/meta-arm-bsp/conf/machine/musca-b1.conf
@@ -5,7 +5,9 @@
#@DESCRIPTION: Machine configuration for Musca-B1
EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-m"
-
PREFERRED_VERSION_trusted-firmware-m = "1.0"
-require armv8m.inc
+require conf/machine/include/tune-cortexm33.inc
+
+# GLIBC will not work with Cortex-M.
+TCLIBC ?= "baremetal"
diff --git a/meta-arm-bsp/conf/machine/musca-s1.conf b/meta-arm-bsp/conf/machine/musca-s1.conf
index 4b6b575..a37657d 100644
--- a/meta-arm-bsp/conf/machine/musca-s1.conf
+++ b/meta-arm-bsp/conf/machine/musca-s1.conf
@@ -5,7 +5,9 @@
#@DESCRIPTION: Machine configuration for Musca-S1
EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-m"
-
PREFERRED_VERSION_trusted-firmware-m = "1.0"
-require armv8m.inc
+require conf/machine/include/tune-cortexm33.inc
+
+# GLIBC will not work with Cortex-M.
+TCLIBC ?= "baremetal"
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 7/7] arm-bsp: musca-b1: Add Zephyr support
2020-10-02 14:03 [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Jon Mason
` (4 preceding siblings ...)
2020-10-02 14:04 ` [PATCH 6/7] arm-bsp: remove armv8m Jon Mason
@ 2020-10-02 14:04 ` Jon Mason
2020-10-03 8:24 ` [meta-arm] [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Ross Burton
6 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2020-10-02 14:04 UTC (permalink / raw)
To: meta-arm
Zephyr supports Musca B1, and QEMU has an emulated Musca B1 board. Add
the relevant parts to get this compiling with meta-zephyr and (in
theory) run QEMU.
Change-Id: I9af4aea03e31e96f8eee17f44913e747b1241891
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
meta-arm-bsp/conf/machine/musca-b1.conf | 13 +++++++++++++
meta-arm-bsp/documentation/musca-b1.md | 26 +++++++++++++++++++++++++
2 files changed, 39 insertions(+)
create mode 100644 meta-arm-bsp/documentation/musca-b1.md
diff --git a/meta-arm-bsp/conf/machine/musca-b1.conf b/meta-arm-bsp/conf/machine/musca-b1.conf
index e7320ba..c7b818a 100644
--- a/meta-arm-bsp/conf/machine/musca-b1.conf
+++ b/meta-arm-bsp/conf/machine/musca-b1.conf
@@ -11,3 +11,16 @@ require conf/machine/include/tune-cortexm33.inc
# GLIBC will not work with Cortex-M.
TCLIBC ?= "baremetal"
+
+# For runqemu
+require conf/machine/include/qemu.inc
+QB_SYSTEM_NAME = "qemu-system-arm"
+QB_MACHINE = "-machine musca-b1"
+QB_CPU = "-cpu cortex-m33"
+QB_OPT_APPEND = "-nographic -vga none"
+QB_MEM = "512k"
+
+# Zephyr RTOS settings
+ZEPHYR_BOARD = "v2m_musca_b1"
+ZEPHYR_INHERIT_CLASSES += "zephyr-qemuboot"
+ARCH_musca-b1 = "arm"
diff --git a/meta-arm-bsp/documentation/musca-b1.md b/meta-arm-bsp/documentation/musca-b1.md
new file mode 100644
index 0000000..9fde10a
--- /dev/null
+++ b/meta-arm-bsp/documentation/musca-b1.md
@@ -0,0 +1,26 @@
+# Musca B1
+
+## Overview
+For a description of the hardware, go to
+https://developer.arm.com/tools-and-software/development-boards/iot-test-chips-and-boards/musca-b-test-chip-board
+
+For current supported hardware by Zephyr, go to
+https://docs.zephyrproject.org/2.3.0/boards/arm/v2m_musca/doc/index.html
+
+For emulated hardware, go to
+https://www.qemu.org/docs/master/system/arm/musca.html
+
+## Building
+In the local.conf file, MACHINE should be set as follows:
+MACHINE ?= "musca-b1"
+
+To build for Zephyr:
+```bash$ bitbake-layers layerindex-fetch meta-zephyr```
+```bash$ bitbake zephyr-philosophers```
+
+To build the trusted firmware-m (and not Zephyr):
+```bash$ bitbake trusted-frimware-m```
+
+## Running
+To run Zephyr on the QEMU based machine, execute the following command
+```bash$ runqemu qemu-musca-b1```
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [meta-arm] [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms
2020-10-02 14:03 [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Jon Mason
` (5 preceding siblings ...)
2020-10-02 14:04 ` [PATCH 7/7] arm-bsp: musca-b1: Add Zephyr support Jon Mason
@ 2020-10-03 8:24 ` Ross Burton
2020-10-05 13:09 ` Jon Mason
6 siblings, 1 reply; 9+ messages in thread
From: Ross Burton @ 2020-10-03 8:24 UTC (permalink / raw)
To: Jon Mason; +Cc: meta-arm
+1 to the whole series.
Ross
On Fri, 2 Oct 2020 at 15:49, Jon Mason <jon.mason@arm.com> wrote:
>
> meta-arm-platforms does not exist. Change to meta-arm-bsp.
>
> Change-Id: Iacf74f2ec2d5cd2ddaa3a952e9190e71822bd9f5
> Signed-off-by: Jon Mason <jon.mason@arm.com>
> ---
> meta-arm-bsp/documentation/a5ds.md | 2 +-
> meta-arm-bsp/documentation/foundation-armv8.md | 2 +-
> meta-arm-bsp/documentation/fvp-base-arm32.md | 2 +-
> meta-arm-bsp/documentation/fvp-base.md | 2 +-
> meta-arm-bsp/documentation/juno.md | 2 +-
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/meta-arm-bsp/documentation/a5ds.md b/meta-arm-bsp/documentation/a5ds.md
> index 9f88abc..38c719a 100644
> --- a/meta-arm-bsp/documentation/a5ds.md
> +++ b/meta-arm-bsp/documentation/a5ds.md
> @@ -1,4 +1,4 @@
> -# Cortex-A5 DesignStart A5DS Platform Support in meta-arm-platforms
> +# Cortex-A5 DesignStart A5DS Platform Support in meta-arm-bsp
>
> ## Howto Build and Run
>
> diff --git a/meta-arm-bsp/documentation/foundation-armv8.md b/meta-arm-bsp/documentation/foundation-armv8.md
> index 7e73da5..dacdce3 100644
> --- a/meta-arm-bsp/documentation/foundation-armv8.md
> +++ b/meta-arm-bsp/documentation/foundation-armv8.md
> @@ -1,4 +1,4 @@
> -# Armv8-A Base Platform Support in meta-arm-platforms
> +# Armv8-A Base Platform Support in meta-arm-bsp
>
> ## Howto Build and Run
>
> diff --git a/meta-arm-bsp/documentation/fvp-base-arm32.md b/meta-arm-bsp/documentation/fvp-base-arm32.md
> index 363e6b2..52ca1a4 100644
> --- a/meta-arm-bsp/documentation/fvp-base-arm32.md
> +++ b/meta-arm-bsp/documentation/fvp-base-arm32.md
> @@ -1,4 +1,4 @@
> -# Armv7-A Base Platform FVP Support in meta-arm-platforms
> +# Armv7-A Base Platform FVP Support in meta-arm-bsp
>
> ## How to build and run
>
> diff --git a/meta-arm-bsp/documentation/fvp-base.md b/meta-arm-bsp/documentation/fvp-base.md
> index 58604e1..17c28c2 100644
> --- a/meta-arm-bsp/documentation/fvp-base.md
> +++ b/meta-arm-bsp/documentation/fvp-base.md
> @@ -1,4 +1,4 @@
> -# Armv8-A Base Platform FVP Support in meta-arm-platforms
> +# Armv8-A Base Platform FVP Support in meta-arm-bsp
>
> ## Howto Build and Run
>
> diff --git a/meta-arm-bsp/documentation/juno.md b/meta-arm-bsp/documentation/juno.md
> index cc5a272..69e56bc 100644
> --- a/meta-arm-bsp/documentation/juno.md
> +++ b/meta-arm-bsp/documentation/juno.md
> @@ -1,4 +1,4 @@
> -# Juno Development Platform Support in meta-arm-platforms
> +# Juno Development Platform Support in meta-arm-bsp
>
> ## Howto Build and Run
>
> --
> 2.17.1
>
>
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [meta-arm] [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms
2020-10-03 8:24 ` [meta-arm] [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Ross Burton
@ 2020-10-05 13:09 ` Jon Mason
0 siblings, 0 replies; 9+ messages in thread
From: Jon Mason @ 2020-10-05 13:09 UTC (permalink / raw)
To: Ross Burton; +Cc: Jon Mason, meta-arm
On Sat, Oct 03, 2020 at 09:24:04AM +0100, Ross Burton wrote:
> +1 to the whole series.
>
> Ross
Pulled in to master.
Thanks,
Jon
>
> On Fri, 2 Oct 2020 at 15:49, Jon Mason <jon.mason@arm.com> wrote:
> >
> > meta-arm-platforms does not exist. Change to meta-arm-bsp.
> >
> > Change-Id: Iacf74f2ec2d5cd2ddaa3a952e9190e71822bd9f5
> > Signed-off-by: Jon Mason <jon.mason@arm.com>
> > ---
> > meta-arm-bsp/documentation/a5ds.md | 2 +-
> > meta-arm-bsp/documentation/foundation-armv8.md | 2 +-
> > meta-arm-bsp/documentation/fvp-base-arm32.md | 2 +-
> > meta-arm-bsp/documentation/fvp-base.md | 2 +-
> > meta-arm-bsp/documentation/juno.md | 2 +-
> > 5 files changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/meta-arm-bsp/documentation/a5ds.md b/meta-arm-bsp/documentation/a5ds.md
> > index 9f88abc..38c719a 100644
> > --- a/meta-arm-bsp/documentation/a5ds.md
> > +++ b/meta-arm-bsp/documentation/a5ds.md
> > @@ -1,4 +1,4 @@
> > -# Cortex-A5 DesignStart A5DS Platform Support in meta-arm-platforms
> > +# Cortex-A5 DesignStart A5DS Platform Support in meta-arm-bsp
> >
> > ## Howto Build and Run
> >
> > diff --git a/meta-arm-bsp/documentation/foundation-armv8.md b/meta-arm-bsp/documentation/foundation-armv8.md
> > index 7e73da5..dacdce3 100644
> > --- a/meta-arm-bsp/documentation/foundation-armv8.md
> > +++ b/meta-arm-bsp/documentation/foundation-armv8.md
> > @@ -1,4 +1,4 @@
> > -# Armv8-A Base Platform Support in meta-arm-platforms
> > +# Armv8-A Base Platform Support in meta-arm-bsp
> >
> > ## Howto Build and Run
> >
> > diff --git a/meta-arm-bsp/documentation/fvp-base-arm32.md b/meta-arm-bsp/documentation/fvp-base-arm32.md
> > index 363e6b2..52ca1a4 100644
> > --- a/meta-arm-bsp/documentation/fvp-base-arm32.md
> > +++ b/meta-arm-bsp/documentation/fvp-base-arm32.md
> > @@ -1,4 +1,4 @@
> > -# Armv7-A Base Platform FVP Support in meta-arm-platforms
> > +# Armv7-A Base Platform FVP Support in meta-arm-bsp
> >
> > ## How to build and run
> >
> > diff --git a/meta-arm-bsp/documentation/fvp-base.md b/meta-arm-bsp/documentation/fvp-base.md
> > index 58604e1..17c28c2 100644
> > --- a/meta-arm-bsp/documentation/fvp-base.md
> > +++ b/meta-arm-bsp/documentation/fvp-base.md
> > @@ -1,4 +1,4 @@
> > -# Armv8-A Base Platform FVP Support in meta-arm-platforms
> > +# Armv8-A Base Platform FVP Support in meta-arm-bsp
> >
> > ## Howto Build and Run
> >
> > diff --git a/meta-arm-bsp/documentation/juno.md b/meta-arm-bsp/documentation/juno.md
> > index cc5a272..69e56bc 100644
> > --- a/meta-arm-bsp/documentation/juno.md
> > +++ b/meta-arm-bsp/documentation/juno.md
> > @@ -1,4 +1,4 @@
> > -# Juno Development Platform Support in meta-arm-platforms
> > +# Juno Development Platform Support in meta-arm-bsp
> >
> > ## Howto Build and Run
> >
> > --
> > 2.17.1
> >
> >
> >
> >
>
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-10-05 13:09 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-02 14:03 [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Jon Mason
2020-10-02 14:04 ` [PATCH 2/7] gem5: remove reference " Jon Mason
2020-10-02 14:04 ` [PATCH 3/7] arm-bsp: Add cortexa tunes Jon Mason
2020-10-02 14:04 ` [PATCH 4/7] arm-bsp: Add cortexm tunes Jon Mason
2020-10-02 14:04 ` [PATCH 5/7] arm-bsp: rename musca_b1 and musca_s1 Jon Mason
2020-10-02 14:04 ` [PATCH 6/7] arm-bsp: remove armv8m Jon Mason
2020-10-02 14:04 ` [PATCH 7/7] arm-bsp: musca-b1: Add Zephyr support Jon Mason
2020-10-03 8:24 ` [meta-arm] [PATCH 1/7] arm-bsp: Remove references to meta-arm-platforms Ross Burton
2020-10-05 13:09 ` Jon Mason
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.