* [Intel-gfx] [PATCH v5 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch @ 2020-10-07 19:52 José Roberto de Souza 2020-10-07 19:52 ` [Intel-gfx] [PATCH v5 2/3] drm/i915/display: Check PSR parameter and flag only in state compute phase José Roberto de Souza ` (5 more replies) 0 siblings, 6 replies; 9+ messages in thread From: José Roberto de Souza @ 2020-10-07 19:52 UTC (permalink / raw) To: intel-gfx For platforms without selective fetch this register is reserved so do not write 0 to it. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 8a9d0bdde1bf..4e09ae61d4aa 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -942,7 +942,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, intel_de_write(dev_priv, EXITLINE(cpu_transcoder), val); } - if (HAS_PSR_HW_TRACKING(dev_priv)) + if (HAS_PSR_HW_TRACKING(dev_priv) && HAS_PSR2_SEL_FETCH(dev_priv)) intel_de_rmw(dev_priv, CHICKEN_PAR1_1, IGNORE_PSR2_HW_TRACKING, dev_priv->psr.psr2_sel_fetch_enabled ? IGNORE_PSR2_HW_TRACKING : 0); -- 2.28.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH v5 2/3] drm/i915/display: Check PSR parameter and flag only in state compute phase 2020-10-07 19:52 [Intel-gfx] [PATCH v5 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch José Roberto de Souza @ 2020-10-07 19:52 ` José Roberto de Souza 2020-10-07 19:52 ` [Intel-gfx] [PATCH v5 3/3] drm/i915/display: Program PSR2 selective fetch registers José Roberto de Souza ` (4 subsequent siblings) 5 siblings, 0 replies; 9+ messages in thread From: José Roberto de Souza @ 2020-10-07 19:52 UTC (permalink / raw) To: intel-gfx Due to the debugfs flag, has_psr2 in CRTC state could have a different value than psr.psr2_enabled and it was causing PSR2 subfeatures(DC3CO and selective fetch) to be set to not a expected state. So here only taking in consideration the parameter and debugfs flag when computing PSR state, this way the CRTC state will also have the correct state. intel_psr_fastset_force() was already broken as intel_psr_compute_config() was already only enabling PSR when psr_global_enabled() and all other PSR requirements are met. So some changes was required in this function, now it iterates over all connectors, if it is a eDP connector and is active force a modeset in the CRTC driving this connector, what will cause the new PSR state to be set based on the debugfs flag. v2: - end connector iterator in error cases Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 73 +++++++++++++----------- 1 file changed, 41 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 4e09ae61d4aa..02f74b0ddec1 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -91,19 +91,14 @@ static bool psr_global_enabled(struct drm_i915_private *i915) } } -static bool intel_psr2_enabled(struct drm_i915_private *dev_priv, - const struct intel_crtc_state *crtc_state) +static bool psr2_global_enabled(struct drm_i915_private *dev_priv) { - /* Cannot enable DSC and PSR2 simultaneously */ - drm_WARN_ON(&dev_priv->drm, crtc_state->dsc.compression_enable && - crtc_state->has_psr2); - switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) { case I915_PSR_DEBUG_DISABLE: case I915_PSR_DEBUG_FORCE_PSR1: return false; default: - return crtc_state->has_psr2; + return true; } } @@ -729,6 +724,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false; } + if (!psr2_global_enabled(dev_priv)) { + drm_dbg_kms(&dev_priv->drm, "PSR2 disabled by flag\n"); + return false; + } + /* * DSC and PSR2 cannot be enabled simultaneously. If a requested * resolution requires DSC to be enabled, priority is given to DSC @@ -817,8 +817,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, if (intel_dp != dev_priv->psr.dp) return; - if (!psr_global_enabled(dev_priv)) + if (!psr_global_enabled(dev_priv)) { + drm_dbg_kms(&dev_priv->drm, "PSR disabled by flag\n"); return; + } + /* * HSW spec explicitly says PSR is tied to port A. * BDW+ platforms have a instance of PSR registers per transcoder but @@ -959,7 +962,7 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv, drm_WARN_ON(&dev_priv->drm, dev_priv->psr.enabled); - dev_priv->psr.psr2_enabled = intel_psr2_enabled(dev_priv, crtc_state); + dev_priv->psr.psr2_enabled = crtc_state->has_psr2; dev_priv->psr.busy_frontbuffer_bits = 0; dev_priv->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; dev_priv->psr.dc3co_enabled = !!crtc_state->dc3co_exitline; @@ -1029,15 +1032,7 @@ void intel_psr_enable(struct intel_dp *intel_dp, drm_WARN_ON(&dev_priv->drm, dev_priv->drrs.dp); mutex_lock(&dev_priv->psr.lock); - - if (!psr_global_enabled(dev_priv)) { - drm_dbg_kms(&dev_priv->drm, "PSR disabled by flag\n"); - goto unlock; - } - intel_psr_enable_locked(dev_priv, crtc_state, conn_state); - -unlock: mutex_unlock(&dev_priv->psr.lock); } @@ -1222,8 +1217,8 @@ void intel_psr_update(struct intel_dp *intel_dp, mutex_lock(&dev_priv->psr.lock); - enable = crtc_state->has_psr && psr_global_enabled(dev_priv); - psr2_enable = intel_psr2_enabled(dev_priv, crtc_state); + enable = crtc_state->has_psr; + psr2_enable = crtc_state->has_psr2; if (enable == psr->enabled && psr2_enable == psr->psr2_enabled) { /* Force a PSR exit when enabling CRC to avoid CRC timeouts */ @@ -1320,11 +1315,12 @@ static bool __psr_wait_for_idle_locked(struct drm_i915_private *dev_priv) static int intel_psr_fastset_force(struct drm_i915_private *dev_priv) { + struct drm_connector_list_iter conn_iter; struct drm_device *dev = &dev_priv->drm; struct drm_modeset_acquire_ctx ctx; struct drm_atomic_state *state; - struct intel_crtc *crtc; - int err; + struct drm_connector *conn; + int err = 0; state = drm_atomic_state_alloc(dev); if (!state) @@ -1334,25 +1330,38 @@ static int intel_psr_fastset_force(struct drm_i915_private *dev_priv) state->acquire_ctx = &ctx; retry: - for_each_intel_crtc(dev, crtc) { - struct intel_crtc_state *crtc_state = - intel_atomic_get_crtc_state(state, crtc); - if (IS_ERR(crtc_state)) { - err = PTR_ERR(crtc_state); - goto error; + drm_connector_list_iter_begin(dev, &conn_iter); + drm_for_each_connector_iter(conn, &conn_iter) { + struct drm_connector_state *conn_state; + struct drm_crtc_state *crtc_state; + + if (conn->connector_type != DRM_MODE_CONNECTOR_eDP) + continue; + + conn_state = drm_atomic_get_connector_state(state, conn); + if (IS_ERR(conn_state)) { + err = PTR_ERR(conn_state); + break; } - if (crtc_state->hw.active && crtc_state->has_psr) { - /* Mark mode as changed to trigger a pipe->update() */ - crtc_state->uapi.mode_changed = true; + if (!conn_state->crtc) + continue; + + crtc_state = drm_atomic_get_crtc_state(state, conn_state->crtc); + if (IS_ERR(crtc_state)) { + err = PTR_ERR(crtc_state); break; } + + /* Mark mode as changed to trigger a pipe->update() */ + crtc_state->mode_changed = true; } + drm_connector_list_iter_end(&conn_iter); - err = drm_atomic_commit(state); + if (err == 0) + err = drm_atomic_commit(state); -error: if (err == -EDEADLK) { drm_atomic_state_clear(state); err = drm_modeset_backoff(&ctx); -- 2.28.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH v5 3/3] drm/i915/display: Program PSR2 selective fetch registers 2020-10-07 19:52 [Intel-gfx] [PATCH v5 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch José Roberto de Souza 2020-10-07 19:52 ` [Intel-gfx] [PATCH v5 2/3] drm/i915/display: Check PSR parameter and flag only in state compute phase José Roberto de Souza @ 2020-10-07 19:52 ` José Roberto de Souza 2020-10-08 11:07 ` Mun, Gwan-gyeong 2020-10-08 12:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch Patchwork ` (3 subsequent siblings) 5 siblings, 1 reply; 9+ messages in thread From: José Roberto de Souza @ 2020-10-07 19:52 UTC (permalink / raw) To: intel-gfx Another step towards PSR2 selective fetch, here programming plane selective fetch registers and MAN_TRK_CTL enabling selective fetch but for now it is fetching the whole area of the planes. The damaged area calculation will come as next and final step. v2: - removed warn on when no plane is visible in state - removed calculations using plane damaged area in intel_psr2_program_plane_sel_fetch() v3: - do not shift 16 positions the plane dst coordinates, only src is shifted v4: - only setting PLANE_SEL_FETCH_CTL_ENABLE and MCURSOR_MODE in PLANE_SEL_FETCH_CTL v5: - not masking bits for cursor BSpec: 55229 Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 10 +- drivers/gpu/drm/i915/display/intel_psr.c | 117 ++++++++++++++++++- drivers/gpu/drm/i915/display/intel_psr.h | 10 +- drivers/gpu/drm/i915/display/intel_sprite.c | 3 + 4 files changed, 131 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 907e1d155443..8b80e03694e2 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -11872,6 +11872,9 @@ static void i9xx_update_cursor(struct intel_plane *plane, if (INTEL_GEN(dev_priv) >= 9) skl_write_cursor_wm(plane, crtc_state); + if (!needs_modeset(crtc_state)) + intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, 0); + if (plane->cursor.base != base || plane->cursor.size != fbc_ctl || plane->cursor.cntl != cntl) { @@ -12883,8 +12886,11 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, } - if (!mode_changed) - intel_psr2_sel_fetch_update(state, crtc); + if (!mode_changed) { + ret = intel_psr2_sel_fetch_update(state, crtc); + if (ret) + return ret; + } return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 02f74b0ddec1..a591a475f148 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1166,6 +1166,38 @@ static void psr_force_hw_tracking_exit(struct drm_i915_private *dev_priv) intel_psr_exit(dev_priv); } +void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, + const struct intel_crtc_state *crtc_state, + const struct intel_plane_state *plane_state, + int color_plane) +{ + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); + enum pipe pipe = plane->pipe; + u32 val; + + if (!crtc_state->enable_psr2_sel_fetch) + return; + + val = plane_state ? plane_state->ctl : 0; + val &= plane->id == PLANE_CURSOR ? val : PLANE_SEL_FETCH_CTL_ENABLE; + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), val); + if (!val || plane->id == PLANE_CURSOR) + return; + + val = plane_state->uapi.dst.y1 << 16 | plane_state->uapi.dst.x1; + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_POS(pipe, plane->id), val); + + val = plane_state->color_plane[color_plane].y << 16; + val |= plane_state->color_plane[color_plane].x; + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_OFFSET(pipe, plane->id), + val); + + /* Sizes are 0 based */ + val = ((drm_rect_height(&plane_state->uapi.src) >> 16) - 1) << 16; + val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1; + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_SIZE(pipe, plane->id), val); +} + void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -1180,16 +1212,91 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st crtc_state->psr2_man_track_ctl); } -void intel_psr2_sel_fetch_update(struct intel_atomic_state *state, - struct intel_crtc *crtc) +static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, + struct drm_rect *clip, bool full_update) +{ + u32 val = PSR2_MAN_TRK_CTL_ENABLE; + + if (full_update) { + val |= PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME; + goto exit; + } + + if (clip->y1 == -1) + goto exit; + + val |= PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE; + val |= PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 / 4 + 1); + val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(DIV_ROUND_UP(clip->y2, 4) + 1); +exit: + crtc_state->psr2_man_track_ctl = val; +} + +static void clip_area_update(struct drm_rect *overlap_damage_area, + struct drm_rect *damage_area) +{ + if (overlap_damage_area->y1 == -1) { + overlap_damage_area->y1 = damage_area->y1; + overlap_damage_area->y2 = damage_area->y2; + return; + } + + if (damage_area->y1 < overlap_damage_area->y1) + overlap_damage_area->y1 = damage_area->y1; + + if (damage_area->y2 > overlap_damage_area->y2) + overlap_damage_area->y2 = damage_area->y2; +} + +int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, + struct intel_crtc *crtc) { struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + struct intel_plane_state *new_plane_state, *old_plane_state; + struct drm_rect pipe_clip = { .y1 = -1 }; + struct intel_plane *plane; + bool full_update = false; + int i, ret; if (!crtc_state->enable_psr2_sel_fetch) - return; + return 0; + + ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); + if (ret) + return ret; + + for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state, + new_plane_state, i) { + struct drm_rect temp; + + if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc) + continue; - crtc_state->psr2_man_track_ctl = PSR2_MAN_TRK_CTL_ENABLE | - PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME; + /* + * TODO: Not clear how to handle planes with negative position, + * also planes are not updated if they have a negative X + * position so for now doing a full update in this cases + */ + if (new_plane_state->uapi.dst.y1 < 0 || + new_plane_state->uapi.dst.x1 < 0) { + full_update = true; + break; + } + + if (!new_plane_state->uapi.visible) + continue; + + /* + * For now doing a selective fetch in the whole plane area, + * optimizations will come in the future. + */ + temp.y1 = new_plane_state->uapi.dst.y1; + temp.y2 = new_plane_state->uapi.dst.y2; + clip_area_update(&pipe_clip, &temp); + } + + psr2_man_trk_ctl_calc(crtc_state, &pipe_clip, full_update); + return 0; } /** diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 6a83c8e682e6..3eca9dcec3c0 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -15,6 +15,8 @@ struct intel_crtc_state; struct intel_dp; struct intel_crtc; struct intel_atomic_state; +struct intel_plane_state; +struct intel_plane; #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) void intel_psr_init_dpcd(struct intel_dp *intel_dp); @@ -45,8 +47,12 @@ void intel_psr_atomic_check(struct drm_connector *connector, struct drm_connector_state *old_state, struct drm_connector_state *new_state); void intel_psr_set_force_mode_changed(struct intel_dp *intel_dp); -void intel_psr2_sel_fetch_update(struct intel_atomic_state *state, - struct intel_crtc *crtc); +int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, + struct intel_crtc *crtc); void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state); +void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, + const struct intel_crtc_state *crtc_state, + const struct intel_plane_state *plane_state, + int color_plane); #endif /* __INTEL_PSR_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index 2da11ab6343c..dd90de305e3d 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -728,6 +728,9 @@ skl_program_plane(struct intel_plane *plane, intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id), (plane_state->color_plane[1].y << 16) | plane_state->color_plane[1].x); + if (!drm_atomic_crtc_needs_modeset(&crtc_state->uapi)) + intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane); + /* * The control register self-arms if the plane was previously * disabled. Try to make the plane enable atomic by writing -- 2.28.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH v5 3/3] drm/i915/display: Program PSR2 selective fetch registers 2020-10-07 19:52 ` [Intel-gfx] [PATCH v5 3/3] drm/i915/display: Program PSR2 selective fetch registers José Roberto de Souza @ 2020-10-08 11:07 ` Mun, Gwan-gyeong 0 siblings, 0 replies; 9+ messages in thread From: Mun, Gwan-gyeong @ 2020-10-08 11:07 UTC (permalink / raw) To: intel-gfx, Souza, Jose Looks good to me. Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> On Wed, 2020-10-07 at 12:52 -0700, José Roberto de Souza wrote: > Another step towards PSR2 selective fetch, here programming plane > selective fetch registers and MAN_TRK_CTL enabling selective fetch > but > for now it is fetching the whole area of the planes. > The damaged area calculation will come as next and final step. > > v2: > - removed warn on when no plane is visible in state > - removed calculations using plane damaged area in > intel_psr2_program_plane_sel_fetch() > > v3: > - do not shift 16 positions the plane dst coordinates, only src is > shifted > > v4: > - only setting PLANE_SEL_FETCH_CTL_ENABLE and MCURSOR_MODE in > PLANE_SEL_FETCH_CTL > > v5: > - not masking bits for cursor > > BSpec: 55229 > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 10 +- > drivers/gpu/drm/i915/display/intel_psr.c | 117 > ++++++++++++++++++- > drivers/gpu/drm/i915/display/intel_psr.h | 10 +- > drivers/gpu/drm/i915/display/intel_sprite.c | 3 + > 4 files changed, 131 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 907e1d155443..8b80e03694e2 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -11872,6 +11872,9 @@ static void i9xx_update_cursor(struct > intel_plane *plane, > if (INTEL_GEN(dev_priv) >= 9) > skl_write_cursor_wm(plane, crtc_state); > > + if (!needs_modeset(crtc_state)) > + intel_psr2_program_plane_sel_fetch(plane, crtc_state, > plane_state, 0); > + > if (plane->cursor.base != base || > plane->cursor.size != fbc_ctl || > plane->cursor.cntl != cntl) { > @@ -12883,8 +12886,11 @@ static int intel_crtc_atomic_check(struct > intel_atomic_state *state, > > } > > - if (!mode_changed) > - intel_psr2_sel_fetch_update(state, crtc); > + if (!mode_changed) { > + ret = intel_psr2_sel_fetch_update(state, crtc); > + if (ret) > + return ret; > + } > > return 0; > } > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 02f74b0ddec1..a591a475f148 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1166,6 +1166,38 @@ static void psr_force_hw_tracking_exit(struct > drm_i915_private *dev_priv) > intel_psr_exit(dev_priv); > } > > +void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, > + const struct intel_crtc_state > *crtc_state, > + const struct intel_plane_state > *plane_state, > + int color_plane) > +{ > + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > + enum pipe pipe = plane->pipe; > + u32 val; > + > + if (!crtc_state->enable_psr2_sel_fetch) > + return; > + > + val = plane_state ? plane_state->ctl : 0; > + val &= plane->id == PLANE_CURSOR ? val : > PLANE_SEL_FETCH_CTL_ENABLE; > + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane- > >id), val); > + if (!val || plane->id == PLANE_CURSOR) > + return; > + > + val = plane_state->uapi.dst.y1 << 16 | plane_state- > >uapi.dst.x1; > + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_POS(pipe, plane- > >id), val); > + > + val = plane_state->color_plane[color_plane].y << 16; > + val |= plane_state->color_plane[color_plane].x; > + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_OFFSET(pipe, plane- > >id), > + val); > + > + /* Sizes are 0 based */ > + val = ((drm_rect_height(&plane_state->uapi.src) >> 16) - 1) << > 16; > + val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1; > + intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_SIZE(pipe, plane- > >id), val); > +} > + > void intel_psr2_program_trans_man_trk_ctl(const struct > intel_crtc_state *crtc_state) > { > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > @@ -1180,16 +1212,91 @@ void > intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state > *crtc_st > crtc_state->psr2_man_track_ctl); > } > > -void intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > - struct intel_crtc *crtc) > +static void psr2_man_trk_ctl_calc(struct intel_crtc_state > *crtc_state, > + struct drm_rect *clip, bool > full_update) > +{ > + u32 val = PSR2_MAN_TRK_CTL_ENABLE; > + > + if (full_update) { > + val |= PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME; > + goto exit; > + } > + > + if (clip->y1 == -1) > + goto exit; > + > + val |= PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE; > + val |= PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 / 4 + 1); > + val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(DIV_ROUND_UP(clip- > >y2, 4) + 1); > +exit: > + crtc_state->psr2_man_track_ctl = val; > +} > + > +static void clip_area_update(struct drm_rect *overlap_damage_area, > + struct drm_rect *damage_area) > +{ > + if (overlap_damage_area->y1 == -1) { > + overlap_damage_area->y1 = damage_area->y1; > + overlap_damage_area->y2 = damage_area->y2; > + return; > + } > + > + if (damage_area->y1 < overlap_damage_area->y1) > + overlap_damage_area->y1 = damage_area->y1; > + > + if (damage_area->y2 > overlap_damage_area->y2) > + overlap_damage_area->y2 = damage_area->y2; > +} > + > +int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > + struct intel_crtc *crtc) > { > struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > + struct intel_plane_state *new_plane_state, *old_plane_state; > + struct drm_rect pipe_clip = { .y1 = -1 }; > + struct intel_plane *plane; > + bool full_update = false; > + int i, ret; > > if (!crtc_state->enable_psr2_sel_fetch) > - return; > + return 0; > + > + ret = drm_atomic_add_affected_planes(&state->base, &crtc- > >base); > + if (ret) > + return ret; > + > + for_each_oldnew_intel_plane_in_state(state, plane, > old_plane_state, > + new_plane_state, i) { > + struct drm_rect temp; > + > + if (new_plane_state->uapi.crtc != crtc_state- > >uapi.crtc) > + continue; > > - crtc_state->psr2_man_track_ctl = PSR2_MAN_TRK_CTL_ENABLE | > - PSR2_MAN_TRK_CTL_SF_SINGLE_FUL > L_FRAME; > + /* > + * TODO: Not clear how to handle planes with negative > position, > + * also planes are not updated if they have a negative > X > + * position so for now doing a full update in this > cases > + */ > + if (new_plane_state->uapi.dst.y1 < 0 || > + new_plane_state->uapi.dst.x1 < 0) { > + full_update = true; > + break; > + } > + > + if (!new_plane_state->uapi.visible) > + continue; > + > + /* > + * For now doing a selective fetch in the whole plane > area, > + * optimizations will come in the future. > + */ > + temp.y1 = new_plane_state->uapi.dst.y1; > + temp.y2 = new_plane_state->uapi.dst.y2; > + clip_area_update(&pipe_clip, &temp); > + } > + > + psr2_man_trk_ctl_calc(crtc_state, &pipe_clip, full_update); > + return 0; > } > > /** > diff --git a/drivers/gpu/drm/i915/display/intel_psr.h > b/drivers/gpu/drm/i915/display/intel_psr.h > index 6a83c8e682e6..3eca9dcec3c0 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.h > +++ b/drivers/gpu/drm/i915/display/intel_psr.h > @@ -15,6 +15,8 @@ struct intel_crtc_state; > struct intel_dp; > struct intel_crtc; > struct intel_atomic_state; > +struct intel_plane_state; > +struct intel_plane; > > #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv- > >psr.sink_support) > void intel_psr_init_dpcd(struct intel_dp *intel_dp); > @@ -45,8 +47,12 @@ void intel_psr_atomic_check(struct drm_connector > *connector, > struct drm_connector_state *old_state, > struct drm_connector_state *new_state); > void intel_psr_set_force_mode_changed(struct intel_dp *intel_dp); > -void intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > - struct intel_crtc *crtc); > +int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > + struct intel_crtc *crtc); > void intel_psr2_program_trans_man_trk_ctl(const struct > intel_crtc_state *crtc_state); > +void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, > + const struct intel_crtc_state > *crtc_state, > + const struct intel_plane_state > *plane_state, > + int color_plane); > > #endif /* __INTEL_PSR_H__ */ > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c > b/drivers/gpu/drm/i915/display/intel_sprite.c > index 2da11ab6343c..dd90de305e3d 100644 > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > @@ -728,6 +728,9 @@ skl_program_plane(struct intel_plane *plane, > intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, > plane_id), > (plane_state->color_plane[1].y << 16) > | plane_state->color_plane[1].x); > > + if (!drm_atomic_crtc_needs_modeset(&crtc_state->uapi)) > + intel_psr2_program_plane_sel_fetch(plane, crtc_state, > plane_state, color_plane); > + > /* > * The control register self-arms if the plane was previously > * disabled. Try to make the plane enable atomic by writing _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch 2020-10-07 19:52 [Intel-gfx] [PATCH v5 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch José Roberto de Souza 2020-10-07 19:52 ` [Intel-gfx] [PATCH v5 2/3] drm/i915/display: Check PSR parameter and flag only in state compute phase José Roberto de Souza 2020-10-07 19:52 ` [Intel-gfx] [PATCH v5 3/3] drm/i915/display: Program PSR2 selective fetch registers José Roberto de Souza @ 2020-10-08 12:26 ` Patchwork 2020-10-08 17:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2) Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2020-10-08 12:26 UTC (permalink / raw) To: Souza, Jose; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 3442 bytes --] == Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch URL : https://patchwork.freedesktop.org/series/82453/ State : success == Summary == CI Bug Log - changes from CI_DRM_9111 -> Patchwork_18651 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/index.html Known issues ------------ Here are the changes found in Patchwork_18651 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic: - fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#1982]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html #### Possible fixes #### * igt@i915_module_load@reload: - {fi-tgl-dsi}: [DMESG-WARN][3] ([i915#1982] / [k.org#205379]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-tgl-dsi/igt@i915_module_load@reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/fi-tgl-dsi/igt@i915_module_load@reload.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-bsw-kefka: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html - {fi-kbl-7560u}: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9111/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411 [k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379 Participating hosts (15 -> 12) ------------------------------ Missing (3): fi-byt-clapper fi-byt-squawks fi-bsw-cyan Build changes ------------- * Linux: CI_DRM_9111 -> Patchwork_18651 CI-20190529: 20190529 CI_DRM_9111: 4ebfe1a6dfa98f91aeec86210071e9d9034ffbef @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5804: a15f8da169c7ab32db77aca7ae2b26c616c9edef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18651: 6f7010709e3f520533f76630867209ab0ce47831 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 6f7010709e3f drm/i915/display: Program PSR2 selective fetch registers 24a43e1b58bc drm/i915/display: Check PSR parameter and flag only in state compute phase 68815aafbaa6 drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18651/index.html [-- Attachment #1.2: Type: text/html, Size: 4273 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2) 2020-10-07 19:52 [Intel-gfx] [PATCH v5 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch José Roberto de Souza ` (2 preceding siblings ...) 2020-10-08 12:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch Patchwork @ 2020-10-08 17:00 ` Patchwork 2020-10-08 18:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) Patchwork 2020-10-08 20:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2020-10-08 17:00 UTC (permalink / raw) To: Souza, Jose; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 6744 bytes --] == Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2) URL : https://patchwork.freedesktop.org/series/82453/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18656 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_18656 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18656, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_18656: ### IGT changes ### #### Possible regressions #### * igt@i915_selftest@live@gt_heartbeat: - fi-tgl-u2: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html Known issues ------------ Here are the changes found in Patchwork_18656 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live@execlists: - fi-apl-guc: [PASS][3] -> [INCOMPLETE][4] ([i915#1635]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-apl-guc/igt@i915_selftest@live@execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-apl-guc/igt@i915_selftest@live@execlists.html * igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1: - fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1.html #### Possible fixes #### * {igt@core_hotunplug@unbind-rebind}: - fi-icl-y: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunplug@unbind-rebind.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-icl-y/igt@core_hotunplug@unbind-rebind.html * igt@gem_exec_suspend@basic-s3: - fi-skl-lmem: [INCOMPLETE][9] ([i915#198]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_suspend@basic-s3.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-skl-lmem/igt@gem_exec_suspend@basic-s3.html * igt@kms_busy@basic@flip: - {fi-tgl-dsi}: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12] +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@basic@flip.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-tgl-dsi/igt@kms_busy@basic@flip.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - {fi-kbl-7560u}: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html - fi-icl-u2: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@vgem_basic@unload: - fi-skl-guc: [DMESG-WARN][17] ([i915#2203]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_basic@unload.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-skl-guc/igt@vgem_basic@unload.html #### Warnings #### * igt@kms_force_connector_basic@force-edid: - fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) -> [DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html * igt@kms_force_connector_basic@prune-stale-modes: - fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][22] ([i915#62] / [i915#92]) +4 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (45 -> 39) ------------------------------ Additional (1): fi-cfl-8109u Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * Linux: CI_DRM_9113 -> Patchwork_18656 CI-20190529: 20190529 CI_DRM_9113: 412ff15f2b9a97bd0ab32f562ecb7efc84837881 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5805: 9ce50ffed89a46fa1bc98ee2cfe2271c49801079 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18656: 80f9360325451c1a1bbe713b0bd7a8be042f5d22 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 80f936032545 drm/i915/display: Program PSR2 selective fetch registers 5a80c6b2082d drm/i915/display: Check PSR parameter and flag only in state compute phase f8d82fff2e05 drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18656/index.html [-- Attachment #1.2: Type: text/html, Size: 8372 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) 2020-10-07 19:52 [Intel-gfx] [PATCH v5 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch José Roberto de Souza ` (3 preceding siblings ...) 2020-10-08 17:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2) Patchwork @ 2020-10-08 18:16 ` Patchwork 2020-10-08 20:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 5 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2020-10-08 18:16 UTC (permalink / raw) To: Souza, Jose; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 7221 bytes --] == Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) URL : https://patchwork.freedesktop.org/series/82453/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113 -> Patchwork_18659 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/index.html Known issues ------------ Here are the changes found in Patchwork_18659 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic: - fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] ([i915#1982]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html #### Possible fixes #### * {igt@core_hotunplug@unbind-rebind}: - fi-icl-y: [DMESG-WARN][3] ([i915#1982]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-y/igt@core_hotunplug@unbind-rebind.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-icl-y/igt@core_hotunplug@unbind-rebind.html * igt@gem_exec_suspend@basic-s3: - fi-skl-lmem: [INCOMPLETE][5] ([i915#198]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-lmem/igt@gem_exec_suspend@basic-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-skl-lmem/igt@gem_exec_suspend@basic-s3.html * igt@i915_pm_rpm@basic-pci-d3-state: - fi-bsw-kefka: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html * igt@kms_busy@basic@flip: - {fi-tgl-dsi}: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-tgl-dsi/igt@kms_busy@basic@flip.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-tgl-dsi/igt@kms_busy@basic@flip.html - fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_busy@basic@flip.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@kms_busy@basic@flip.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - {fi-kbl-7560u}: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html - fi-icl-u2: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@vgem_basic@unload: - fi-skl-guc: [DMESG-WARN][17] ([i915#2203]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-skl-guc/igt@vgem_basic@unload.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-skl-guc/igt@vgem_basic@unload.html - fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@vgem_basic@unload.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@vgem_basic@unload.html #### Warnings #### * igt@gem_exec_suspend@basic-s3: - fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][22] ([i915#1982] / [i915#62] / [i915#92] / [i915#95]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@gem_exec_suspend@basic-s3.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@gem_exec_suspend@basic-s3.html * igt@i915_pm_rpm@module-reload: - fi-kbl-x1275: [DMESG-FAIL][23] ([i915#62]) -> [DMESG-FAIL][24] ([i915#62] / [i915#95]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html * igt@kms_force_connector_basic@prune-stale-modes: - fi-kbl-x1275: [DMESG-WARN][25] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][26] ([i915#62] / [i915#92]) +3 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html * igt@prime_vgem@basic-fence-flip: - fi-kbl-x1275: [DMESG-WARN][27] ([i915#62] / [i915#92]) -> [DMESG-WARN][28] ([i915#62] / [i915#92] / [i915#95]) +1 similar issue [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/fi-kbl-x1275/igt@prime_vgem@basic-fence-flip.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/fi-kbl-x1275/igt@prime_vgem@basic-fence-flip.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (45 -> 39) ------------------------------ Additional (1): fi-cfl-8109u Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * Linux: CI_DRM_9113 -> Patchwork_18659 CI-20190529: 20190529 CI_DRM_9113: 412ff15f2b9a97bd0ab32f562ecb7efc84837881 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5805: 9ce50ffed89a46fa1bc98ee2cfe2271c49801079 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18659: 88172d068dc99f82b93eeecdaf88b480d8aa6452 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 88172d068dc9 drm/i915/display: Program PSR2 selective fetch registers 498527479255 drm/i915/display: Check PSR parameter and flag only in state compute phase 3331a2b3fd54 drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/index.html [-- Attachment #1.2: Type: text/html, Size: 9918 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) 2020-10-07 19:52 [Intel-gfx] [PATCH v5 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch José Roberto de Souza ` (4 preceding siblings ...) 2020-10-08 18:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) Patchwork @ 2020-10-08 20:39 ` Patchwork 2020-10-09 22:05 ` Souza, Jose 5 siblings, 1 reply; 9+ messages in thread From: Patchwork @ 2020-10-08 20:39 UTC (permalink / raw) To: Souza, Jose; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 13482 bytes --] == Series Details == Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) URL : https://patchwork.freedesktop.org/series/82453/ State : success == Summary == CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18659_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_18659_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_gttfill@engines@rcs0: - shard-glk: [PASS][1] -> [DMESG-WARN][2] ([i915#118] / [i915#95]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk7/igt@gem_exec_gttfill@engines@rcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk4/igt@gem_exec_gttfill@engines@rcs0.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [PASS][3] -> [SKIP][4] ([i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb7/igt@gem_huc_copy@huc-copy.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-tglb6/igt@gem_huc_copy@huc-copy.html * igt@i915_pm_dc@dc6-psr: - shard-skl: [PASS][5] -> [FAIL][6] ([i915#454]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm_dc@dc6-psr.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl1/igt@i915_pm_dc@dc6-psr.html * igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1: - shard-skl: [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) +4 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl10/igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [PASS][9] -> [DMESG-WARN][10] ([i915#180]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html * igt@kms_flip@flip-vs-suspend@a-dp1: - shard-kbl: [PASS][11] -> [INCOMPLETE][12] ([i915#155]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl7/igt@kms_flip@flip-vs-suspend@a-dp1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-kbl6/igt@kms_flip@flip-vs-suspend@a-dp1.html * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-tglb: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-stridechange.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-stridechange.html - shard-glk: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk5/igt@kms_frontbuffer_tracking@fbc-stridechange.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk8/igt@kms_frontbuffer_tracking@fbc-stridechange.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#1188]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@kms_hdr@bpc-switch-dpms.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#198]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145] / [i915#265]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_psr@psr2_cursor_plane_move: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +2 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-iclb5/igt@kms_psr@psr2_cursor_plane_move.html * igt@kms_setmode@basic: - shard-glk: [PASS][25] -> [FAIL][26] ([i915#31]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk4/igt@kms_setmode@basic.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk3/igt@kms_setmode@basic.html * igt@perf@polling-parameterized: - shard-skl: [PASS][27] -> [FAIL][28] ([i915#1542]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl10/igt@perf@polling-parameterized.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl7/igt@perf@polling-parameterized.html * igt@sysfs_heartbeat_interval@mixed@vcs0: - shard-skl: [PASS][29] -> [FAIL][30] ([i915#1731]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl6/igt@sysfs_heartbeat_interval@mixed@vcs0.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl9/igt@sysfs_heartbeat_interval@mixed@vcs0.html #### Possible fixes #### * {igt@gem_exec_capture@pi@rcs0}: - shard-skl: [INCOMPLETE][31] -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@gem_exec_capture@pi@rcs0.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl4/igt@gem_exec_capture@pi@rcs0.html - shard-glk: [INCOMPLETE][33] -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk1/igt@gem_exec_capture@pi@rcs0.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk2/igt@gem_exec_capture@pi@rcs0.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [FAIL][35] ([i915#1899]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-iclb4/igt@i915_pm_dc@dc6-psr.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-iclb7/igt@i915_pm_dc@dc6-psr.html * igt@i915_pm_rpm@system-suspend: - shard-skl: [INCOMPLETE][37] ([i915#151]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl1/igt@i915_pm_rpm@system-suspend.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl3/igt@i915_pm_rpm@system-suspend.html * igt@i915_selftest@live@gt_heartbeat: - shard-skl: [DMESG-FAIL][39] ([i915#541]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl3/igt@i915_selftest@live@gt_heartbeat.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl8/igt@i915_selftest@live@gt_heartbeat.html * {igt@kms_async_flips@alternate-sync-async-flip}: - shard-kbl: [FAIL][41] ([i915#2521]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl2/igt@kms_async_flips@alternate-sync-async-flip.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-kbl4/igt@kms_async_flips@alternate-sync-async-flip.html * {igt@kms_async_flips@async-flip-with-page-flip-events}: - shard-glk: [FAIL][43] ([i915#2521]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk3/igt@kms_async_flips@async-flip-with-page-flip-events.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk2/igt@kms_async_flips@async-flip-with-page-flip-events.html * igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge: - shard-glk: [DMESG-WARN][45] ([i915#1982]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk1/igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk9/igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge.html * igt@kms_flip_tiling@flip-changes-tiling: - shard-skl: [FAIL][47] ([i915#699]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl4/igt@kms_flip_tiling@flip-changes-tiling.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl1/igt@kms_flip_tiling@flip-changes-tiling.html * igt@kms_frontbuffer_tracking@fbc-farfromfence: - shard-glk: [FAIL][49] ([i915#49]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-glk8/igt@kms_frontbuffer_tracking@fbc-farfromfence.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-glk5/igt@kms_frontbuffer_tracking@fbc-farfromfence.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render: - shard-skl: [FAIL][51] ([i915#49]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [FAIL][53] ([fdo#108145] / [i915#265]) -> [PASS][54] +1 similar issue [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html * igt@kms_plane_cursor@pipe-c-overlay-size-256: - shard-skl: [DMESG-WARN][55] ([i915#1982]) -> [PASS][56] +2 similar issues [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl1/igt@kms_plane_cursor@pipe-c-overlay-size-256.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-skl6/igt@kms_plane_cursor@pipe-c-overlay-size-256.html * igt@kms_psr@psr2_sprite_render: - shard-iclb: [SKIP][57] ([fdo#109441]) -> [PASS][58] +1 similar issue [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-iclb8/igt@kms_psr@psr2_sprite_render.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-iclb2/igt@kms_psr@psr2_sprite_render.html * igt@prime_vgem@sync@rcs0: - shard-iclb: [INCOMPLETE][59] ([i915#409]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-iclb3/igt@prime_vgem@sync@rcs0.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/shard-iclb7/igt@prime_vgem@sync@rcs0.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151 [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155 [i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1899]: https://gitlab.freedesktop.org/drm/intel/issues/1899 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#409]: https://gitlab.freedesktop.org/drm/intel/issues/409 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541 [i915#699]: https://gitlab.freedesktop.org/drm/intel/issues/699 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_9113 -> Patchwork_18659 CI-20190529: 20190529 CI_DRM_9113: 412ff15f2b9a97bd0ab32f562ecb7efc84837881 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5805: 9ce50ffed89a46fa1bc98ee2cfe2271c49801079 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_18659: 88172d068dc99f82b93eeecdaf88b480d8aa6452 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/index.html [-- Attachment #1.2: Type: text/html, Size: 15431 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) 2020-10-08 20:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork @ 2020-10-09 22:05 ` Souza, Jose 0 siblings, 0 replies; 9+ messages in thread From: Souza, Jose @ 2020-10-09 22:05 UTC (permalink / raw) To: intel-gfx On Thu, 2020-10-08 at 20:39 +0000, Patchwork wrote: > Patch Details > Series: series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) URL: > https://patchwork.freedesktop.org/series/82453/ State: success Details: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18659/index.html > CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18659_fullSummarySUCCESS > No regressions found. Pushed to dinq, thanks for the reviews Rodrigo, Ville and GG. > Known issuesHere are the changes found in Patchwork_18659_full that come from known issues: > IGT changesIssues hit * igt@gem_exec_gttfill@engines@rcs0:shard-glk: PASS -> DMESG-WARN (i915#118 / i915#95) > * igt@gem_huc_copy@huc-copy:shard-tglb: PASS -> SKIP (i915#2190) > * igt@i915_pm_dc@dc6-psr:shard-skl: PASS -> FAIL (i915#454) > * igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1:shard-skl: PASS -> DMESG-WARN (i915#1982) +4 similar issues > * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:shard-kbl: PASS -> DMESG-WARN (i915#180) +3 similar issues > * igt@kms_flip@flip-vs-suspend@a-dp1:shard-kbl: PASS -> INCOMPLETE (i915#155) > * igt@kms_frontbuffer_tracking@fbc-stridechange:shard-tglb: PASS -> DMESG-WARN (i915#1982) +4 similar issuesshard-glk: PASS -> DMESG-WARN > (i915#1982) > * igt@kms_hdr@bpc-switch-dpms:shard-skl: PASS -> FAIL (i915#1188) +1 similar issue > * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:shard-skl: PASS -> INCOMPLETE (i915#198) > * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:shard-skl: PASS -> FAIL (fdo#108145 / i915#265) > * igt@kms_psr@psr2_cursor_plane_move:shard-iclb: PASS -> SKIP (fdo#109441) +2 similar issues > * igt@kms_setmode@basic:shard-glk: PASS -> FAIL (i915#31) > * igt@perf@polling-parameterized:shard-skl: PASS -> FAIL (i915#1542) > * igt@sysfs_heartbeat_interval@mixed@vcs0:shard-skl: PASS -> FAIL (i915#1731) > Possible fixes * {igt@gem_exec_capture@pi@rcs0}:shard-skl: INCOMPLETE -> PASSshard-glk: INCOMPLETE -> PASS > * igt@i915_pm_dc@dc6-psr:shard-iclb: FAIL (i915#1899) -> PASS > * igt@i915_pm_rpm@system-suspend:shard-skl: INCOMPLETE (i915#151) -> PASS > * igt@i915_selftest@live@gt_heartbeat:shard-skl: DMESG-FAIL (i915#541) -> PASS > * {igt@kms_async_flips@alternate-sync-async-flip}:shard-kbl: FAIL (i915#2521) -> PASS > * {igt@kms_async_flips@async-flip-with-page-flip-events}:shard-glk: FAIL (i915#2521) -> PASS > * igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge:shard-glk: DMESG-WARN (i915#1982) -> PASS > * igt@kms_flip_tiling@flip-changes-tiling:shard-skl: FAIL (i915#699) -> PASS > * igt@kms_frontbuffer_tracking@fbc-farfromfence:shard-glk: FAIL (i915#49) -> PASS > * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render:shard-skl: FAIL (i915#49) -> PASS > * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:shard-skl: FAIL (fdo#108145 / i915#265) -> PASS +1 similar issue > * igt@kms_plane_cursor@pipe-c-overlay-size-256:shard-skl: DMESG-WARN (i915#1982) -> PASS +2 similar issues > * igt@kms_psr@psr2_sprite_render:shard-iclb: SKIP (fdo#109441) -> PASS +1 similar issue > * igt@prime_vgem@sync@rcs0:shard-iclb: INCOMPLETE (i915#409) -> PASS > {name}: This element is suppressed. This means it is ignored when computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > Participating hosts (11 -> 11)No changes in participating hosts > Build changes * Linux: CI_DRM_9113 -> Patchwork_18659 > CI-20190529: 20190529 > CI_DRM_9113: 412ff15f2b9a97bd0ab32f562ecb7efc84837881 @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_5805: 9ce50ffed89a46fa1bc98ee2cfe2271c49801079 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_18659: 88172d068dc99f82b93eeecdaf88b480d8aa6452 @ git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-10-09 22:05 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-10-07 19:52 [Intel-gfx] [PATCH v5 1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch José Roberto de Souza 2020-10-07 19:52 ` [Intel-gfx] [PATCH v5 2/3] drm/i915/display: Check PSR parameter and flag only in state compute phase José Roberto de Souza 2020-10-07 19:52 ` [Intel-gfx] [PATCH v5 3/3] drm/i915/display: Program PSR2 selective fetch registers José Roberto de Souza 2020-10-08 11:07 ` Mun, Gwan-gyeong 2020-10-08 12:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch Patchwork 2020-10-08 17:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev2) Patchwork 2020-10-08 18:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/3] drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch (rev3) Patchwork 2020-10-08 20:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2020-10-09 22:05 ` Souza, Jose
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