All of lore.kernel.org
 help / color / mirror / Atom feed
From: zhaolichang <zhaolichang@huawei.com>
To: <qemu-trivial@nongnu.org>
Cc: David Edmondson <david.edmondson@oracle.com>,
	zhaolichang <zhaolichang@huawei.com>,
	qemu-devel@nongnu.org, Philippe Mathieu-Daude <f4bug@amsat.org>
Subject: [PATCH V2 13/14] alpha/: fix some comment spelling errors
Date: Fri, 9 Oct 2020 14:44:48 +0800	[thread overview]
Message-ID: <20201009064449.2336-14-zhaolichang@huawei.com> (raw)
In-Reply-To: <20201009064449.2336-1-zhaolichang@huawei.com>

I found that there are many spelling errors in the comments of qemu/target/alpha.
I used spellcheck to check the spelling errors and found some errors in the folder.

Signed-off-by: zhaolichang <zhaolichang@huawei.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
Reviewed-by: Philippe Mathieu-Daude<f4bug@amsat.org>
---
 target/alpha/cpu.h       | 4 ++--
 target/alpha/translate.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index be29bdd530..8a6d47783a 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -190,7 +190,7 @@ enum {
 
    That said, we're only emulating Unix PALcode, and not attempting VMS,
    so we don't need to implement Executive and Supervisor.  QEMU's own
-   PALcode cheats and usees the KSEG mapping for its code+data rather than
+   PALcode cheats and uses the KSEG mapping for its code+data rather than
    physical addresses.  */
 
 #define MMU_KERNEL_IDX   0
@@ -370,7 +370,7 @@ enum {
    The Unix PALcode only uses bit 4.  */
 #define PS_USER_MODE  8u
 
-/* CPUAlphaState->flags constants.  These are layed out so that we
+/* CPUAlphaState->flags constants.  These are laid out so that we
    can set or reset the pieces individually by assigning to the byte,
    or manipulated as a whole.  */
 
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 36be602179..c88ba38bc0 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -2940,7 +2940,7 @@ static void alpha_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
        the first fp insn of the TB.  Alternately we could define a proper
        default for every TB (e.g. QUAL_RM_N or QUAL_RM_D) and make sure
        to reset the FP_STATUS to that default at the end of any TB that
-       changes the default.  We could even (gasp) dynamiclly figure out
+       changes the default.  We could even (gasp) dynamically figure out
        what default would be most efficient given the running program.  */
     ctx->tb_rm = -1;
     /* Similarly for flush-to-zero.  */
-- 
2.26.2.windows.1



  parent reply	other threads:[~2020-10-09  7:05 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-09  6:44 [PATCH V2 00/14] fix some comment spelling errors zhaolichang
2020-10-09  6:44 ` [PATCH V2 01/14] cris/: " zhaolichang
2020-10-09 13:14   ` Eric Blake
2020-10-09  6:44 ` [PATCH V2 02/14] ppc/: " zhaolichang
2020-10-26  9:14   ` Thomas Huth
2020-10-26 10:04     ` Greg Kurz
2020-10-27  2:05     ` David Gibson
2020-10-27  2:07   ` David Gibson
2020-10-09  6:44 ` [PATCH V2 03/14] riscv/: " zhaolichang
2020-10-09  7:15   ` Bin Meng
2020-10-09  6:44 ` [PATCH V2 04/14] rx/: " zhaolichang
2020-10-26 22:14   ` Philippe Mathieu-Daudé
2020-10-09  6:44 ` [PATCH V2 05/14] tricore/: " zhaolichang
2020-10-09  6:44 ` [PATCH V2 06/14] mips/: " zhaolichang
2020-10-09 14:36   ` Philippe Mathieu-Daudé
2020-10-09 15:15     ` Philippe Mathieu-Daudé
2020-10-09  6:44 ` [PATCH V2 07/14] s390x/: " zhaolichang
2020-10-09  7:31   ` Thomas Huth
2020-10-09  6:44 ` [PATCH V2 08/14] m68k/: " zhaolichang
2020-12-12 17:10   ` Laurent Vivier
2020-12-12 17:56     ` Philippe Mathieu-Daudé
2020-12-12 19:58       ` Laurent Vivier
2020-12-12 20:04         ` Philippe Mathieu-Daudé
2020-10-09  6:44 ` [PATCH V2 09/14] sh4/: " zhaolichang
2020-10-25  0:37   ` Philippe Mathieu-Daudé
2020-10-09  6:44 ` [PATCH V2 10/14] i386/: " zhaolichang
2020-10-09  6:44 ` [PATCH V2 11/14] avr/: " zhaolichang
2020-10-09  6:44 ` [PATCH V2 12/14] arm/: " zhaolichang
2020-10-09  6:44 ` zhaolichang [this message]
2020-10-09  6:44 ` [PATCH V2 14/14] target/: " zhaolichang
2020-10-09  7:12 ` [PATCH V2 00/14] " no-reply
     [not found] ` <a5a68476-0ed8-08f9-f993-464317d798bf@huawei.com>
2020-10-20  6:42   ` Philippe Mathieu-Daudé
2020-10-29  2:22     ` Lichang Zhao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201009064449.2336-14-zhaolichang@huawei.com \
    --to=zhaolichang@huawei.com \
    --cc=david.edmondson@oracle.com \
    --cc=f4bug@amsat.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-trivial@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.