* [PATCH 1/3] Drop dunfell support
@ 2020-10-17 2:41 Jon Mason
2020-10-17 2:41 ` [PATCH 2/3] arm-bsp: remove cortex-a tune files Jon Mason
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Jon Mason @ 2020-10-17 2:41 UTC (permalink / raw)
To: meta-arm
Drop dunfell support from the master branch in anticipation of the
gatestgarth release. All dunfell users should reference the dunfell
branch.
Change-Id: I9c5806f698cca42773aaea1fb49e0dfff437eaf4
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
meta-arm-autonomy/conf/layer.conf | 2 +-
meta-arm-bsp/conf/layer.conf | 2 +-
meta-arm-toolchain/conf/layer.conf | 2 +-
meta-arm/conf/layer.conf | 2 +-
meta-gem5/conf/layer.conf | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/meta-arm-autonomy/conf/layer.conf b/meta-arm-autonomy/conf/layer.conf
index 5a439e2..936b6c1 100644
--- a/meta-arm-autonomy/conf/layer.conf
+++ b/meta-arm-autonomy/conf/layer.conf
@@ -16,7 +16,7 @@ LAYERDEPENDS_meta-arm-autonomy = " \
openembedded-layer \
virtualization-layer \
"
-LAYERSERIES_COMPAT_meta-arm-autonomy = "dunfell gatesgarth"
+LAYERSERIES_COMPAT_meta-arm-autonomy = "gatesgarth"
# We don't activate virtualization feature from meta-virtualization as it
# brings in lots of stuff we don't need. We need to disable the sanity check
diff --git a/meta-arm-bsp/conf/layer.conf b/meta-arm-bsp/conf/layer.conf
index 816ff9d..4de1bfa 100644
--- a/meta-arm-bsp/conf/layer.conf
+++ b/meta-arm-bsp/conf/layer.conf
@@ -10,4 +10,4 @@ BBFILE_PATTERN_meta-arm-bsp = "^${LAYERDIR}/"
BBFILE_PRIORITY_meta-arm-bsp = "6"
LAYERDEPENDS_meta-arm-bsp = "core meta-arm meta-kernel"
-LAYERSERIES_COMPAT_meta-arm-bsp = "dunfell gatesgarth"
+LAYERSERIES_COMPAT_meta-arm-bsp = "gatesgarth"
diff --git a/meta-arm-toolchain/conf/layer.conf b/meta-arm-toolchain/conf/layer.conf
index 6ab98af..d0ca75a 100644
--- a/meta-arm-toolchain/conf/layer.conf
+++ b/meta-arm-toolchain/conf/layer.conf
@@ -12,7 +12,7 @@ BBFILE_PRIORITY_arm-toolchain = "30"
LICENSE_PATH += "${LAYERDIR}/custom-licenses"
LAYERDEPENDS_arm-toolchain = "core"
-LAYERSERIES_COMPAT_arm-toolchain = "dunfell gatesgarth"
+LAYERSERIES_COMPAT_arm-toolchain = "gatesgarth"
# do not error out on bbappends for missing recipes
BB_DANGLINGAPPENDS_WARNONLY = "true"
diff --git a/meta-arm/conf/layer.conf b/meta-arm/conf/layer.conf
index d53c40a..9649738 100644
--- a/meta-arm/conf/layer.conf
+++ b/meta-arm/conf/layer.conf
@@ -13,4 +13,4 @@ LAYERDEPENDS_meta-arm = " \
core \
arm-toolchain \
"
-LAYERSERIES_COMPAT_meta-arm = "dunfell gatesgarth"
+LAYERSERIES_COMPAT_meta-arm = "gatesgarth"
diff --git a/meta-gem5/conf/layer.conf b/meta-gem5/conf/layer.conf
index 439444c..58242c3 100644
--- a/meta-gem5/conf/layer.conf
+++ b/meta-gem5/conf/layer.conf
@@ -10,4 +10,4 @@ BBFILE_PATTERN_meta-gem5 = "^${LAYERDIR}/"
BBFILE_PRIORITY_meta-gem5 = "6"
LAYERDEPENDS_meta-gem5 = "core openembedded-layer"
-LAYERSERIES_COMPAT_meta-gem5 = "dunfell gatesgarth"
+LAYERSERIES_COMPAT_meta-gem5 = "gatesgarth"
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/3] arm-bsp: remove cortex-a tune files
2020-10-17 2:41 [PATCH 1/3] Drop dunfell support Jon Mason
@ 2020-10-17 2:41 ` Jon Mason
2020-10-17 2:41 ` [PATCH 3/3] arm-bsp: remove dunfell u-boot support Jon Mason
2020-10-25 13:42 ` [meta-arm] [PATCH 1/3] Drop dunfell support Jon Mason
2 siblings, 0 replies; 4+ messages in thread
From: Jon Mason @ 2020-10-17 2:41 UTC (permalink / raw)
To: meta-arm
Cortex-a tune files have been accepted into openembedded-core. So,
those should be used in place of these. Removing these to prevent any
issues.
Change-Id: Ifca1557a88e50ce6947524222ba7f852fd9a282c
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.../conf/machine/include/tune-cortexa15.inc | 51 -----------------
.../conf/machine/include/tune-cortexa17.inc | 51 -----------------
.../conf/machine/include/tune-cortexa32.inc | 17 ------
.../conf/machine/include/tune-cortexa34.inc | 20 -------
.../conf/machine/include/tune-cortexa35.inc | 17 ------
.../conf/machine/include/tune-cortexa5.inc | 51 -----------------
.../conf/machine/include/tune-cortexa53.inc | 17 ------
.../conf/machine/include/tune-cortexa55.inc | 13 -----
.../include/tune-cortexa57-cortexa53.inc | 14 -----
.../conf/machine/include/tune-cortexa57.inc | 17 ------
.../conf/machine/include/tune-cortexa65.inc | 16 ------
.../conf/machine/include/tune-cortexa65ae.inc | 16 ------
.../conf/machine/include/tune-cortexa7.inc | 51 -----------------
.../include/tune-cortexa72-cortexa53.inc | 19 -------
.../conf/machine/include/tune-cortexa72.inc | 13 -----
.../include/tune-cortexa73-cortexa35.inc | 21 -------
.../include/tune-cortexa73-cortexa53.inc | 19 -------
.../conf/machine/include/tune-cortexa73.inc | 16 ------
.../include/tune-cortexa75-cortexa55.inc | 20 -------
.../conf/machine/include/tune-cortexa75.inc | 16 ------
.../include/tune-cortexa76-cortexa55.inc | 20 -------
.../conf/machine/include/tune-cortexa76.inc | 16 ------
.../conf/machine/include/tune-cortexa76ae.inc | 16 ------
.../conf/machine/include/tune-cortexa77.inc | 16 ------
.../conf/machine/include/tune-cortexa8.inc | 39 -------------
.../conf/machine/include/tune-cortexa9.inc | 55 -------------------
26 files changed, 637 deletions(-)
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa15.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa17.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa32.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa34.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa35.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa5.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa53.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa55.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa57-cortexa53.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa57.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa65.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa65ae.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa7.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa72-cortexa53.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa72.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa35.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa53.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa73.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa75-cortexa55.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa75.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa76-cortexa55.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa76.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa76ae.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa77.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa8.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/tune-cortexa9.inc
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa15.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa15.inc
deleted file mode 100644
index 0457c2d..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa15.inc
+++ /dev/null
@@ -1,51 +0,0 @@
-DEFAULTTUNE ?= "armv7vethf-neon"
-
-require conf/machine/include/arm/arch-armv7ve.inc
-
-TUNEVALID[cortexa15] = "Enable Cortex-A15 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa15', ' -mcpu=cortex-a15', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa15', 'armv7ve:', '', d)}"
-
-# Little Endian base configs
-AVAILTUNES += "cortexa15 cortexa15t cortexa15-neon cortexa15t-neon cortexa15-neon-vfpv4 cortexa15t-neon-vfpv4"
-ARMPKGARCH_tune-cortexa15 = "cortexa15"
-ARMPKGARCH_tune-cortexa15t = "cortexa15"
-ARMPKGARCH_tune-cortexa15-neon = "cortexa15"
-ARMPKGARCH_tune-cortexa15t-neon = "cortexa15"
-ARMPKGARCH_tune-cortexa15-neon-vfpv4 = "cortexa15"
-ARMPKGARCH_tune-cortexa15t-neon-vfpv4 = "cortexa15"
-# mcpu is used so don't use armv7ve as we don't want march
-TUNE_FEATURES_tune-cortexa15 = "arm vfp cortexa15"
-TUNE_FEATURES_tune-cortexa15t = "${TUNE_FEATURES_tune-cortexa15} thumb"
-TUNE_FEATURES_tune-cortexa15-neon = "${TUNE_FEATURES_tune-cortexa15} neon"
-TUNE_FEATURES_tune-cortexa15t-neon = "${TUNE_FEATURES_tune-cortexa15-neon} thumb"
-TUNE_FEATURES_tune-cortexa15-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa15-neon} vfpv4"
-TUNE_FEATURES_tune-cortexa15t-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa15-neon-vfpv4} thumb"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve} cortexa15-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15t = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet} cortexa15-vfp cortexa15t2-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon} cortexa15-vfp cortexa15-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon} cortexa15-vfp cortexa15-neon cortexa15t2-vfp cortexa15t2-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon-vfpv4} cortexa15-vfp cortexa15-neon cortexa15-neon-vfpv4"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15t-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon-vfpv4} cortexa15-vfp cortexa15-neon cortexa15-neon-vfpv4 cortexa15t2-vfp cortexa15t2-neon cortexa15t2-neon-vfpv4"
-
-# HF Tunes
-AVAILTUNES += "cortexa15hf cortexa15thf cortexa15hf-neon cortexa15thf-neon cortexa15hf-neon-vfpv4 cortexa15thf-neon-vfpv4"
-ARMPKGARCH_tune-cortexa15hf = "cortexa15"
-ARMPKGARCH_tune-cortexa15thf = "cortexa15"
-ARMPKGARCH_tune-cortexa15hf-neon = "cortexa15"
-ARMPKGARCH_tune-cortexa15thf-neon = "cortexa15"
-ARMPKGARCH_tune-cortexa15hf-neon-vfpv4 = "cortexa15"
-ARMPKGARCH_tune-cortexa15thf-neon-vfpv4 = "cortexa15"
-# mcpu is used so don't use armv7ve as we don't want march
-TUNE_FEATURES_tune-cortexa15hf = "${TUNE_FEATURES_tune-cortexa15} callconvention-hard"
-TUNE_FEATURES_tune-cortexa15thf = "${TUNE_FEATURES_tune-cortexa15t} callconvention-hard"
-TUNE_FEATURES_tune-cortexa15hf-neon = "${TUNE_FEATURES_tune-cortexa15-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa15thf-neon = "${TUNE_FEATURES_tune-cortexa15t-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa15hf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa15-neon-vfpv4} callconvention-hard"
-TUNE_FEATURES_tune-cortexa15thf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa15t-neon-vfpv4} callconvention-hard"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf} cortexa15hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf} cortexa15hf-vfp cortexa15t2hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon} cortexa15hf-vfp cortexa15hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon} cortexa15hf-vfp cortexa15hf-neon cortexa15t2hf-vfp cortexa15t2hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon-vfpv4} cortexa15hf-vfp cortexa15hf-neon cortexa15hf-neon-vfpv4"
-PACKAGE_EXTRA_ARCHS_tune-cortexa15thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon-vfpv4} cortexa15hf-vfp cortexa15hf-neon cortexa15hf-neon-vfpv4 cortexa15t2hf-vfp cortexa15t2hf-neon cortexa15t2hf-neon-vfpv4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa17.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa17.inc
deleted file mode 100644
index 6a2107f..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa17.inc
+++ /dev/null
@@ -1,51 +0,0 @@
-DEFAULTTUNE ?= "armv7vethf-neon"
-
-require conf/machine/include/arm/arch-armv7ve.inc
-
-TUNEVALID[cortexa17] = "Enable Cortex-A17 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa17', ' -mcpu=cortex-a17', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa17', 'armv7ve:', '', d)}"
-
-# Little Endian base configs
-AVAILTUNES += "cortexa17 cortexa17t cortexa17-neon cortexa17t-neon cortexa17-neon-vfpv4 cortexa17t-neon-vfpv4"
-ARMPKGARCH_tune-cortexa17 = "cortexa17"
-ARMPKGARCH_tune-cortexa17t = "cortexa17"
-ARMPKGARCH_tune-cortexa17-neon = "cortexa17"
-ARMPKGARCH_tune-cortexa17t-neon = "cortexa17"
-ARMPKGARCH_tune-cortexa17-neon-vfpv4 = "cortexa17"
-ARMPKGARCH_tune-cortexa17t-neon-vfpv4 = "cortexa17"
-# mcpu is used so don't use armv7ve as we don't want march
-TUNE_FEATURES_tune-cortexa17 = "arm vfp cortexa17"
-TUNE_FEATURES_tune-cortexa17t = "${TUNE_FEATURES_tune-cortexa17} thumb"
-TUNE_FEATURES_tune-cortexa17-neon = "${TUNE_FEATURES_tune-cortexa17} neon"
-TUNE_FEATURES_tune-cortexa17t-neon = "${TUNE_FEATURES_tune-cortexa17-neon} thumb"
-TUNE_FEATURES_tune-cortexa17-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa17-neon} vfpv4"
-TUNE_FEATURES_tune-cortexa17t-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa17-neon-vfpv4} thumb"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve} cortexa17-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17t = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet} cortexa17-vfp cortexa17t2-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon} cortexa17-vfp cortexa17-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon} cortexa17-vfp cortexa17-neon cortexa17t2-vfp cortexa17t2-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon-vfpv4} cortexa17-vfp cortexa17-neon cortexa17-neon-vfpv4"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17t-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon-vfpv4} cortexa17-vfp cortexa17-neon cortexa17-neon-vfpv4 cortexa17t2-vfp cortexa17t2-neon cortexa17t2-neon-vfpv4"
-
-# HF Tunes
-AVAILTUNES += "cortexa17hf cortexa17thf cortexa17hf-neon cortexa17thf-neon cortexa17hf-neon-vfpv4 cortexa17thf-neon-vfpv4"
-ARMPKGARCH_tune-cortexa17hf = "cortexa17"
-ARMPKGARCH_tune-cortexa17thf = "cortexa17"
-ARMPKGARCH_tune-cortexa17hf-neon = "cortexa17"
-ARMPKGARCH_tune-cortexa17thf-neon = "cortexa17"
-ARMPKGARCH_tune-cortexa17hf-neon-vfpv4 = "cortexa17"
-ARMPKGARCH_tune-cortexa17thf-neon-vfpv4 = "cortexa17"
-# mcpu is used so don't use armv7ve as we don't want march
-TUNE_FEATURES_tune-cortexa17hf = "${TUNE_FEATURES_tune-cortexa17} callconvention-hard"
-TUNE_FEATURES_tune-cortexa17thf = "${TUNE_FEATURES_tune-cortexa17t} callconvention-hard"
-TUNE_FEATURES_tune-cortexa17hf-neon = "${TUNE_FEATURES_tune-cortexa17-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa17thf-neon = "${TUNE_FEATURES_tune-cortexa17t-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa17hf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa17-neon-vfpv4} callconvention-hard"
-TUNE_FEATURES_tune-cortexa17thf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa17t-neon-vfpv4} callconvention-hard"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf} cortexa17hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf} cortexa17hf-vfp cortexa17t2hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon} cortexa17hf-vfp cortexa17hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon} cortexa17hf-vfp cortexa17hf-neon cortexa17t2hf-vfp cortexa17t2hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon-vfpv4} cortexa17hf-vfp cortexa17hf-neon cortexa17hf-neon-vfpv4"
-PACKAGE_EXTRA_ARCHS_tune-cortexa17thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon-vfpv4} cortexa17hf-vfp cortexa17hf-neon cortexa17hf-neon-vfpv4 cortexa17t2hf-vfp cortexa17t2hf-neon cortexa17t2hf-neon-vfpv4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa32.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa32.inc
deleted file mode 100644
index e86de6c..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa32.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-DEFAULTTUNE ?= "cortexa32"
-
-TUNEVALID[cortexa32] = "Enable Cortex-A32 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa32', ' -mcpu=cortex-a32', '', d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa32 cortexa32-crypto"
-ARMPKGARCH_tune-cortexa32 = "cortexa32"
-ARMPKGARCH_tune-cortexa32-crypto = "cortexa32"
-TUNE_FEATURES_tune-cortexa32 = "armv8a cortexa32 crc"
-TUNE_FEATURES_tune-cortexa32-crypto = "${TUNE_FEATURES_tune-cortexa32} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa32 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa32"
-PACKAGE_EXTRA_ARCHS_tune-cortexa32-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa32 cortexa32-crypto"
-BASE_LIB_tune-cortexa32 = "lib"
-BASE_LIB_tune-cortexa32-crypto = "lib"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa34.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa34.inc
deleted file mode 100644
index f7d4c87..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa34.inc
+++ /dev/null
@@ -1,20 +0,0 @@
-#
-# Tune Settings for Cortex-A34
-#
-DEFAULTTUNE ?= "cortexa34"
-
-TUNEVALID[cortexa34] = "Enable Cortex-A34 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa34', ' -mcpu=cortex-a34', '', d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa34 cortexa34-crypto"
-ARMPKGARCH_tune-cortexa34 = "cortexa34"
-ARMPKGARCH_tune-cortexa34-crypto = "cortexa34"
-TUNE_FEATURES_tune-cortexa34 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa34"
-TUNE_FEATURES_tune-cortexa34-crypto = "${TUNE_FEATURES_tune-cortexa34} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa34 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa34"
-PACKAGE_EXTRA_ARCHS_tune-cortexa34-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa34 cortexa34-crypto"
-BASE_LIB_tune-cortexa34 = "lib64"
-BASE_LIB_tune-cortexa34-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa35.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa35.inc
deleted file mode 100644
index cb3ad4c..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa35.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-DEFAULTTUNE ?= "cortexa35"
-
-TUNEVALID[cortexa35] = "Enable Cortex-A35 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa35', ' -mcpu=cortex-a35', '', d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa35 cortexa35-crypto"
-ARMPKGARCH_tune-cortexa35 = "cortexa35"
-ARMPKGARCH_tune-cortexa35-crypto = "cortexa35"
-TUNE_FEATURES_tune-cortexa35 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa35"
-TUNE_FEATURES_tune-cortexa35-crypto = "${TUNE_FEATURES_tune-cortexa35} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa35 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa35"
-PACKAGE_EXTRA_ARCHS_tune-cortexa35-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa35 cortexa35-crypto"
-BASE_LIB_tune-cortexa35 = "lib64"
-BASE_LIB_tune-cortexa35-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa5.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa5.inc
deleted file mode 100644
index 923b758..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa5.inc
+++ /dev/null
@@ -1,51 +0,0 @@
-DEFAULTTUNE ?= "armv7athf-neon"
-
-require conf/machine/include/arm/arch-armv7a.inc
-
-TUNEVALID[cortexa5] = "Enable Cortex-A5 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa5', ' -mcpu=cortex-a5', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa5', 'armv7a:', '', d)}"
-
-# Little Endian base configs
-AVAILTUNES += "cortexa5 cortexa5t cortexa5-neon cortexa5t-neon cortexa5-neon-vfpv4 cortexa5t-neon-vfpv4"
-ARMPKGARCH_tune-cortexa5 = "cortexa5"
-ARMPKGARCH_tune-cortexa5t = "cortexa5"
-ARMPKGARCH_tune-cortexa5-neon = "cortexa5"
-ARMPKGARCH_tune-cortexa5t-neon = "cortexa5"
-ARMPKGARCH_tune-cortexa5-neon-vfpv4 = "cortexa5"
-ARMPKGARCH_tune-cortexa5t-neon-vfpv4 = "cortexa5"
-# mcpu is used so don't use armv7a as we don't want march
-TUNE_FEATURES_tune-cortexa5 = "arm vfp cortexa5"
-TUNE_FEATURES_tune-cortexa5t = "${TUNE_FEATURES_tune-cortexa5} thumb"
-TUNE_FEATURES_tune-cortexa5-neon = "${TUNE_FEATURES_tune-cortexa5} neon"
-TUNE_FEATURES_tune-cortexa5t-neon = "${TUNE_FEATURES_tune-cortexa5-neon} thumb"
-TUNE_FEATURES_tune-cortexa5-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa5-neon} vfpv4"
-TUNE_FEATURES_tune-cortexa5t-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa5-neon-vfpv4} thumb"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa5-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa5-vfp cortexa5t2-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa5-vfp cortexa5-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa5-vfp cortexa5-neon cortexa5t2-vfp cortexa5t2-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon-vfpv4} cortexa5-vfp cortexa5-neon cortexa5-neon-vfpv4"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5t-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon-vfpv4} cortexa5-vfp cortexa5-neon cortexa5-neon-vfpv4 cortexa5t2-vfp cortexa5t2-neon cortexa5t2-neon-vfpv4"
-
-# HF Tunes
-AVAILTUNES += "cortexa5hf cortexa5thf cortexa5hf-neon cortexa5thf-neon cortexa5hf-neon-vfpv4 cortexa5thf-neon-vfpv4"
-ARMPKGARCH_tune-cortexa5hf = "cortexa5"
-ARMPKGARCH_tune-cortexa5thf = "cortexa5"
-ARMPKGARCH_tune-cortexa5hf-neon = "cortexa5"
-ARMPKGARCH_tune-cortexa5thf-neon = "cortexa5"
-ARMPKGARCH_tune-cortexa5hf-neon-vfpv4 = "cortexa5"
-ARMPKGARCH_tune-cortexa5thf-neon-vfpv4 = "cortexa5"
-# mcpu is used so don't use armv7a as we don't want march
-TUNE_FEATURES_tune-cortexa5hf = "${TUNE_FEATURES_tune-cortexa5} callconvention-hard"
-TUNE_FEATURES_tune-cortexa5thf = "${TUNE_FEATURES_tune-cortexa5t} callconvention-hard"
-TUNE_FEATURES_tune-cortexa5hf-neon = "${TUNE_FEATURES_tune-cortexa5-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa5thf-neon = "${TUNE_FEATURES_tune-cortexa5t-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa5hf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa5-neon-vfpv4} callconvention-hard"
-TUNE_FEATURES_tune-cortexa5thf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa5t-neon-vfpv4} callconvention-hard"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa5hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa5hf-vfp cortexa5t2hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa5hf-vfp cortexa5hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa5hf-vfp cortexa5hf-neon cortexa5t2hf-vfp cortexa5t2hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon-vfpv4} cortexa5hf-vfp cortexa5hf-neon cortexa5hf-neon-vfpv4"
-PACKAGE_EXTRA_ARCHS_tune-cortexa5thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon-vfpv4} cortexa5hf-vfp cortexa5hf-neon cortexa5hf-neon-vfpv4 cortexa5t2hf-vfp cortexa5t2hf-neon cortexa5t2hf-neon-vfpv4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa53.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa53.inc
deleted file mode 100644
index 7f8863a..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa53.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-DEFAULTTUNE ?= "cortexa53"
-
-TUNEVALID[cortexa53] = "Enable Cortex-A53 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa53', ' -mcpu=cortex-a53', '', d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa53 cortexa53-crypto"
-ARMPKGARCH_tune-cortexa53 = "cortexa53"
-ARMPKGARCH_tune-cortexa53-crypto = "cortexa53-crypto"
-TUNE_FEATURES_tune-cortexa53 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa53"
-TUNE_FEATURES_tune-cortexa53-crypto = "${TUNE_FEATURES_tune-cortexa53} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa53"
-PACKAGE_EXTRA_ARCHS_tune-cortexa53-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa53 cortexa53-crypto"
-BASE_LIB_tune-cortexa53 = "lib64"
-BASE_LIB_tune-cortexa53-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa55.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa55.inc
deleted file mode 100644
index e962973..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa55.inc
+++ /dev/null
@@ -1,13 +0,0 @@
-DEFAULTTUNE ?= "cortexa55"
-
-TUNEVALID[cortexa55] = "Enable Cortex-A55 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa55', ' -mcpu=cortex-a55', '', d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa55"
-ARMPKGARCH_tune-cortexa55 = "cortexa55"
-TUNE_FEATURES_tune-cortexa55 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa55"
-PACKAGE_EXTRA_ARCHS_tune-cortexa55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa55"
-BASE_LIB_tune-cortexa55 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa57-cortexa53.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa57-cortexa53.inc
deleted file mode 100644
index d329d61..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa57-cortexa53.inc
+++ /dev/null
@@ -1,14 +0,0 @@
-DEFAULTTUNE ?= "cortexa57-cortexa53"
-
-TUNEVALID[cortexa57-cortexa53] = "Enable big.LITTLE Cortex-A57.Cortex-A53 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", " -mcpu=cortex-a57.cortex-a53", "", d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", "cortexa57-cortexa53:", "", d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa57-cortexa53"
-ARMPKGARCH_tune-cortexa57-cortexa53 = "cortexa57-cortexa53"
-TUNE_FEATURES_tune-cortexa57-cortexa53 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa57-cortexa53"
-PACKAGE_EXTRA_ARCHS_tune-cortexa57-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa57-cortexa53"
-BASE_LIB_tune-cortexa57-cortexa53 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa57.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa57.inc
deleted file mode 100644
index 91fa668..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa57.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-DEFAULTTUNE ?= "cortexa57"
-
-TUNEVALID[cortexa57] = "Enable Cortex-A57 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa57', ' -mcpu=cortex-a57', '', d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa57 cortexa57-crypto"
-ARMPKGARCH_tune-cortexa57 = "cortexa57"
-ARMPKGARCH_tune-cortexa57-crypto = "cortexa57-crypto"
-TUNE_FEATURES_tune-cortexa57 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa57"
-TUNE_FEATURES_tune-cortexa57-crypto = "${TUNE_FEATURES_tune-cortexa57} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa57 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa57"
-PACKAGE_EXTRA_ARCHS_tune-cortexa57-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa57 cortexa57-crypto"
-BASE_LIB_tune-cortexa57 = "lib64"
-BASE_LIB_tune-cortexa57-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa65.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa65.inc
deleted file mode 100644
index ecf17fb..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa65.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Tune Settings for Cortex-A65
-#
-DEFAULTTUNE ?= "cortexa65"
-
-TUNEVALID[cortexa65] = "Enable Cortex-A65 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa65', ' -mcpu=cortex-a65', '', d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa65"
-ARMPKGARCH_tune-cortexa65 = "cortexa65"
-TUNE_FEATURES_tune-cortexa65 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa55"
-PACKAGE_EXTRA_ARCHS_tune-cortexa65 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa65"
-BASE_LIB_tune-cortexa65 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa65ae.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa65ae.inc
deleted file mode 100644
index aea47d0..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa65ae.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Tune Settings for Cortex-A65AE
-#
-DEFAULTTUNE ?= "cortexa65ae"
-
-TUNEVALID[cortexa65ae] = "Enable Cortex-A65AE specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa65ae', ' -mcpu=cortex-a65ae', '', d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa65ae"
-ARMPKGARCH_tune-cortexa65ae = "cortexa65ae"
-TUNE_FEATURES_tune-cortexa65ae = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa65ae"
-PACKAGE_EXTRA_ARCHS_tune-cortexa65ae = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa65ae"
-BASE_LIB_tune-cortexa65ae = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa7.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa7.inc
deleted file mode 100644
index 05081dc..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa7.inc
+++ /dev/null
@@ -1,51 +0,0 @@
-DEFAULTTUNE ?= "armv7vethf-neon"
-
-require conf/machine/include/arm/arch-armv7ve.inc
-
-TUNEVALID[cortexa7] = "Enable Cortex-A7 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa7', ' -mcpu=cortex-a7', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa7', 'armv7ve:', '', d)}"
-
-# Little Endian base configs
-AVAILTUNES += "cortexa7 cortexa7t cortexa7-neon cortexa7t-neon cortexa7-neon-vfpv4 cortexa7t-neon-vfpv4"
-ARMPKGARCH_tune-cortexa7 = "cortexa7"
-ARMPKGARCH_tune-cortexa7t = "cortexa7"
-ARMPKGARCH_tune-cortexa7-neon = "cortexa7"
-ARMPKGARCH_tune-cortexa7t-neon = "cortexa7"
-ARMPKGARCH_tune-cortexa7-neon-vfpv4 = "cortexa7"
-ARMPKGARCH_tune-cortexa7t-neon-vfpv4 = "cortexa7"
-# mcpu is used so don't use armv7ve as we don't want march
-TUNE_FEATURES_tune-cortexa7 = "arm vfp cortexa7"
-TUNE_FEATURES_tune-cortexa7t = "${TUNE_FEATURES_tune-cortexa7} thumb"
-TUNE_FEATURES_tune-cortexa7-neon = "${TUNE_FEATURES_tune-cortexa7} neon"
-TUNE_FEATURES_tune-cortexa7t-neon = "${TUNE_FEATURES_tune-cortexa7-neon} thumb"
-TUNE_FEATURES_tune-cortexa7-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa7-neon} vfpv4"
-TUNE_FEATURES_tune-cortexa7t-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa7-neon-vfpv4} thumb"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve} cortexa7-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7t = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet} cortexa7-vfp cortexa7t2-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon} cortexa7-vfp cortexa7-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon} cortexa7-vfp cortexa7-neon cortexa7t2-vfp cortexa7t2-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ve-neon-vfpv4} cortexa7-vfp cortexa7-neon cortexa7-neon-vfpv4"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7t-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vet-neon-vfpv4} cortexa7-vfp cortexa7-neon cortexa7-neon-vfpv4 cortexa7t2-vfp cortexa7t2-neon cortexa7t2-neon-vfpv4"
-
-# HF Tunes
-AVAILTUNES += "cortexa7hf cortexa7thf cortexa7hf-neon cortexa7thf-neon cortexa7hf-neon-vfpv4 cortexa7thf-neon-vfpv4"
-ARMPKGARCH_tune-cortexa7hf = "cortexa7"
-ARMPKGARCH_tune-cortexa7thf = "cortexa7"
-ARMPKGARCH_tune-cortexa7hf-neon = "cortexa7"
-ARMPKGARCH_tune-cortexa7thf-neon = "cortexa7"
-ARMPKGARCH_tune-cortexa7hf-neon-vfpv4 = "cortexa7"
-ARMPKGARCH_tune-cortexa7thf-neon-vfpv4 = "cortexa7"
-# mcpu is used so don't use armv7ve as we don't want march
-TUNE_FEATURES_tune-cortexa7hf = "${TUNE_FEATURES_tune-cortexa7} callconvention-hard"
-TUNE_FEATURES_tune-cortexa7thf = "${TUNE_FEATURES_tune-cortexa7t} callconvention-hard"
-TUNE_FEATURES_tune-cortexa7hf-neon = "${TUNE_FEATURES_tune-cortexa7-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa7thf-neon = "${TUNE_FEATURES_tune-cortexa7t-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa7hf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa7-neon-vfpv4} callconvention-hard"
-TUNE_FEATURES_tune-cortexa7thf-neon-vfpv4 = "${TUNE_FEATURES_tune-cortexa7t-neon-vfpv4} callconvention-hard"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf} cortexa7hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf} cortexa7hf-vfp cortexa7t2hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon} cortexa7hf-vfp cortexa7hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon} cortexa7hf-vfp cortexa7hf-neon cortexa7t2hf-vfp cortexa7t2hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vehf-neon-vfpv4} cortexa7hf-vfp cortexa7hf-neon cortexa7hf-neon-vfpv4"
-PACKAGE_EXTRA_ARCHS_tune-cortexa7thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7vethf-neon-vfpv4} cortexa7hf-vfp cortexa7hf-neon cortexa7hf-neon-vfpv4 cortexa7t2hf-vfp cortexa7t2hf-neon cortexa7t2hf-neon-vfpv4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa72-cortexa53.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa72-cortexa53.inc
deleted file mode 100644
index 98e8eba..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa72-cortexa53.inc
+++ /dev/null
@@ -1,19 +0,0 @@
-DEFAULTTUNE ?= "cortexa72-cortexa53"
-
-TUNEVALID[cortexa72-cortexa53] = "Enable big.LITTLE Cortex-A72.Cortex-A53 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa72-cortexa53", " -mcpu=cortex-a72.cortex-a53", "", d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa72-cortexa53", "cortexa72-cortexa53:", "", d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# cortexa72.cortexa53 implies crc support
-AVAILTUNES += "cortexa72-cortexa53 cortexa72-cortexa53-crypto"
-ARMPKGARCH_tune-cortexa72-cortexa53 = "cortexa72-cortexa53"
-ARMPKGARCH_tune-cortexa72-cortexa53-crypto = "cortexa72-cortexa53-crypto"
-TUNE_FEATURES_tune-cortexa72-cortexa53 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa72-cortexa53"
-TUNE_FEATURES_tune-cortexa72-cortexa53-crypto = "${TUNE_FEATURES_tune-cortexa72-cortexa53} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa72-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa72-cortexa53"
-PACKAGE_EXTRA_ARCHS_tune-cortexa72-cortexa53-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa72-cortexa53 cortexa72-cortexa53-crypto"
-BASE_LIB_tune-cortexa72-cortexa53 = "lib64"
-BASE_LIB_tune-cortexa72-cortexa53-crypto = "lib64"
-
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa72.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa72.inc
deleted file mode 100644
index b3f68ab..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa72.inc
+++ /dev/null
@@ -1,13 +0,0 @@
-DEFAULTTUNE ?= "cortexa72"
-
-TUNEVALID[cortexa72] = "Enable Cortex-A72 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa72', ' -mcpu=cortex-a72', '', d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa72"
-ARMPKGARCH_tune-cortexa72 = "cortexa72"
-TUNE_FEATURES_tune-cortexa72 = "${TUNE_FEATURES_tune-armv8a-crc-crypto} cortexa72"
-PACKAGE_EXTRA_ARCHS_tune-cortexa72 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa72"
-BASE_LIB_tune-cortexa72 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa35.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa35.inc
deleted file mode 100644
index 927296c..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa35.inc
+++ /dev/null
@@ -1,21 +0,0 @@
-#
-# Tune Settings for big.LITTLE Cortex-A73 - Cortex-A35
-#
-DEFAULTTUNE ?= "cortexa73-cortexa35"
-
-TUNEVALID[cortexa73-cortexa35] = "Enable big.LITTLE Cortex-A73.Cortex-A35 specific processor optimizations"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa35", "cortexa73-cortexa35:", "", d)}"
-TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa35", " -mcpu=cortex-a73.cortex-a35", "", d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# cortexa73.cortexa35 implies crc support
-AVAILTUNES += "cortexa73-cortexa35 cortexa73-cortexa35-crypto"
-ARMPKGARCH_tune-cortexa73-cortexa35 = "cortexa73-cortexa35"
-ARMPKGARCH_tune-cortexa73-cortexa35-crypto = "cortexa73-cortexa35-crypto"
-TUNE_FEATURES_tune-cortexa73-cortexa35 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa73-cortexa35"
-TUNE_FEATURES_tune-cortexa73-cortexa35-crypto = "${TUNE_FEATURES_tune-cortexa73-cortexa35} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa35 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa73-cortexa35"
-PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa35-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa73-cortexa35 cortexa73-cortexa35-crypto"
-BASE_LIB_tune-cortexa73-cortexa35 = "lib64"
-BASE_LIB_tune-cortexa73-cortexa35-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa53.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa53.inc
deleted file mode 100644
index 3750f07..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa73-cortexa53.inc
+++ /dev/null
@@ -1,19 +0,0 @@
-DEFAULTTUNE ?= "cortexa73-cortexa53"
-
-TUNEVALID[cortexa73-cortexa53] = "Enable big.LITTLE Cortex-A73.Cortex-A53 specific processor optimizations"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa53", "cortexa73-cortexa53:", "", d)}"
-TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa73-cortexa53", " -mcpu=cortex-a73.cortex-a53", "", d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# cortexa73.cortexa53 implies crc support
-AVAILTUNES += "cortexa73-cortexa53 cortexa73-cortexa53-crypto"
-ARMPKGARCH_tune-cortexa73-cortexa53 = "cortexa73-cortexa53"
-ARMPKGARCH_tune-cortexa73-cortexa53-crypto = "cortexa73-cortexa53-crypto"
-TUNE_FEATURES_tune-cortexa73-cortexa53 = "${TUNE_FEATURES_tune-armv8a-crc} cortexa73-cortexa53"
-TUNE_FEATURES_tune-cortexa73-cortexa53-crypto = "${TUNE_FEATURES_tune-cortexa73-cortexa53} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa73-cortexa53"
-PACKAGE_EXTRA_ARCHS_tune-cortexa73-cortexa53-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa73-cortexa53 cortexa73-cortexa53-crypto"
-BASE_LIB_tune-cortexa73-cortexa53 = "lib64"
-BASE_LIB_tune-cortexa73-cortexa53-crypto = "lib64"
-
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa73.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa73.inc
deleted file mode 100644
index ed2deb9..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa73.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Tune Settings for Cortex-A73
-#
-DEFAULTTUNE ?= "cortexa73"
-
-TUNEVALID[cortexa73] = "Enable Cortex-A73 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa73', ' -mcpu=cortex-a73', '', d)}"
-
-require conf/machine/include/arm/arch-armv8a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa73"
-ARMPKGARCH_tune-cortexa73 = "cortexa73"
-TUNE_FEATURES_tune-cortexa73 = "${TUNE_FEATURES_tune-armv8a-crc-crypto} cortexa73"
-PACKAGE_EXTRA_ARCHS_tune-cortexa73 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa73"
-BASE_LIB_tune-cortexa73 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa75-cortexa55.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa75-cortexa55.inc
deleted file mode 100644
index 9c45fe9..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa75-cortexa55.inc
+++ /dev/null
@@ -1,20 +0,0 @@
-#
-# Tune Settings for big.LITTLE Cortex-A75 - Cortex-A55
-#
-DEFAULTTUNE ?= "cortexa75-cortexa55"
-
-TUNEVALID[cortexa75-cortexa55] = "Enable big.LITTLE Cortex-A75.Cortex-A55 specific processor optimizations"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa75-cortexa55", "cortexa75-cortexa55:", "", d)}"
-TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa75-cortexa55", " -mcpu=cortex-a75.cortex-a55", "", d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-AVAILTUNES += "cortexa75-cortexa55 cortexa75-cortexa55-crypto"
-ARMPKGARCH_tune-cortexa75-cortexa55 = "cortexa75-cortexa55"
-ARMPKGARCH_tune-cortexa75-cortexa55-crypto = "cortexa75-cortexa55-crypto"
-TUNE_FEATURES_tune-cortexa75-cortexa55 = "${TUNE_FEATURES_tune-armv8-2a} cortexa75-cortexa55"
-TUNE_FEATURES_tune-cortexa75-cortexa55-crypto = "${TUNE_FEATURES_tune-cortexa75-cortexa55} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa75-cortexa55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a} cortexa75-cortexa55"
-PACKAGE_EXTRA_ARCHS_tune-cortexa75-cortexa55-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa75-cortexa55 cortexa75-cortexa55-crypto"
-BASE_LIB_tune-cortexa75-cortexa55 = "lib64"
-BASE_LIB_tune-cortexa75-cortexa55-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa75.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa75.inc
deleted file mode 100644
index d019450..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa75.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Tune Settings for Cortex-A75
-#
-DEFAULTTUNE ?= "cortexa75"
-
-TUNEVALID[cortexa75] = "Enable Cortex-A75 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa75', ' -mcpu=cortex-a75', '', d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa75"
-ARMPKGARCH_tune-cortexa75 = "cortexa75"
-TUNE_FEATURES_tune-cortexa75 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa75"
-PACKAGE_EXTRA_ARCHS_tune-cortexa75 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa75"
-BASE_LIB_tune-cortexa75 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa76-cortexa55.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa76-cortexa55.inc
deleted file mode 100644
index cae8ffe..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa76-cortexa55.inc
+++ /dev/null
@@ -1,20 +0,0 @@
-#
-# Tune Settings for big.LITTLE Cortex-A76 - Cortex-A55
-#
-DEFAULTTUNE ?= "cortexa76-cortexa55"
-
-TUNEVALID[cortexa76-cortexa55] = "Enable big.LITTLE Cortex-A76.Cortex-A55 specific processor optimizations"
-MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa76-cortexa55", "cortexa76-cortexa55:", "", d)}"
-TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa76-cortexa55", " -mcpu=cortex-a76.cortex-a55", "", d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-AVAILTUNES += "cortexa76-cortexa55 cortexa76-cortexa55-crypto"
-ARMPKGARCH_tune-cortexa76-cortexa55 = "cortexa76-cortexa55"
-ARMPKGARCH_tune-cortexa76-cortexa55-crypto = "cortexa76-cortexa55-crypto"
-TUNE_FEATURES_tune-cortexa76-cortexa55 = "${TUNE_FEATURES_tune-armv8-2a} cortexa76-cortexa55"
-TUNE_FEATURES_tune-cortexa76-cortexa55-crypto = "${TUNE_FEATURES_tune-cortexa76-cortexa55} crypto"
-PACKAGE_EXTRA_ARCHS_tune-cortexa76-cortexa55 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a} cortexa76-cortexa55"
-PACKAGE_EXTRA_ARCHS_tune-cortexa76-cortexa55-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa76-cortexa55 cortexa76-cortexa55-crypto"
-BASE_LIB_tune-cortexa76-cortexa55 = "lib64"
-BASE_LIB_tune-cortexa76-cortexa55-crypto = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa76.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa76.inc
deleted file mode 100644
index ae3661a..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa76.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Tune Settings for Cortex-A76
-#
-DEFAULTTUNE ?= "cortexa76"
-
-TUNEVALID[cortexa76] = "Enable Cortex-A76 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa76', ' -mcpu=cortex-a76', '', d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa76"
-ARMPKGARCH_tune-cortexa76 = "cortexa76"
-TUNE_FEATURES_tune-cortexa76 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa76"
-PACKAGE_EXTRA_ARCHS_tune-cortexa76 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa76"
-BASE_LIB_tune-cortexa76 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa76ae.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa76ae.inc
deleted file mode 100644
index d368aa1..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa76ae.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Tune Settings for Cortex-A76AE
-#
-DEFAULTTUNE ?= "cortexa76ae"
-
-TUNEVALID[cortexa76ae] = "Enable Cortex-A76AE specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa76ae', ' -mcpu=cortex-a76ae', '', d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa76ae"
-ARMPKGARCH_tune-cortexa76ae = "cortexa76ae"
-TUNE_FEATURES_tune-cortexa65ae = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa76ae"
-PACKAGE_EXTRA_ARCHS_tune-cortexa76ae = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa76ae"
-BASE_LIB_tune-cortexa76ae = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa77.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa77.inc
deleted file mode 100644
index 048fa31..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa77.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Tune Settings for Cortex-A77
-#
-DEFAULTTUNE ?= "cortexa77"
-
-TUNEVALID[cortexa77] = "Enable Cortex-A77 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa77', ' -mcpu=cortex-a77', '', d)}"
-
-require conf/machine/include/arm/arch-armv8-2a.inc
-
-# Little Endian base configs
-AVAILTUNES += "cortexa77"
-ARMPKGARCH_tune-cortexa77 = "cortexa77"
-TUNE_FEATURES_tune-cortexa77 = "${TUNE_FEATURES_tune-armv8-2a-crypto} cortexa77"
-PACKAGE_EXTRA_ARCHS_tune-cortexa77 = "${PACKAGE_EXTRA_ARCHS_tune-armv8-2a-crypto} cortexa77"
-BASE_LIB_tune-cortexa77 = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa8.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa8.inc
deleted file mode 100644
index f27bfb8..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa8.inc
+++ /dev/null
@@ -1,39 +0,0 @@
-DEFAULTTUNE ?= "armv7athf-neon"
-
-require conf/machine/include/arm/arch-armv7a.inc
-
-TUNEVALID[cortexa8] = "Enable Cortex-A8 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa8', ' -mcpu=cortex-a8', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa8', 'armv7a:', '', d)}"
-
-# Little Endian base configs
-AVAILTUNES += "cortexa8 cortexa8t cortexa8-neon cortexa8t-neon"
-ARMPKGARCH_tune-cortexa8 = "cortexa8"
-ARMPKGARCH_tune-cortexa8t = "cortexa8"
-ARMPKGARCH_tune-cortexa8-neon = "cortexa8"
-ARMPKGARCH_tune-cortexa8t-neon = "cortexa8"
-# mcpu is used so don't use armv7a as we don't want march
-TUNE_FEATURES_tune-cortexa8 = "arm vfp cortexa8"
-TUNE_FEATURES_tune-cortexa8t = "${TUNE_FEATURES_tune-cortexa8} thumb"
-TUNE_FEATURES_tune-cortexa8-neon = "${TUNE_FEATURES_tune-cortexa8} neon"
-TUNE_FEATURES_tune-cortexa8t-neon = "${TUNE_FEATURES_tune-cortexa8-neon} thumb"
-PACKAGE_EXTRA_ARCHS_tune-cortexa8 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa8-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa8t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa8-vfp cortexa8t2-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa8-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa8-vfp cortexa8-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa8t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa8-vfp cortexa8-neon cortexa8t2-vfp cortexa8t2-neon"
-
-# HF Tunes
-AVAILTUNES += "cortexa8hf cortexa8thf cortexa8hf-neon cortexa8thf-neon"
-ARMPKGARCH_tune-cortexa8hf = "cortexa8"
-ARMPKGARCH_tune-cortexa8thf = "cortexa8"
-ARMPKGARCH_tune-cortexa8hf-neon = "cortexa8"
-ARMPKGARCH_tune-cortexa8thf-neon = "cortexa8"
-# mcpu is used so don't use armv7a as we don't want march
-TUNE_FEATURES_tune-cortexa8hf = "${TUNE_FEATURES_tune-cortexa8} callconvention-hard"
-TUNE_FEATURES_tune-cortexa8thf = "${TUNE_FEATURES_tune-cortexa8t} callconvention-hard"
-TUNE_FEATURES_tune-cortexa8hf-neon = "${TUNE_FEATURES_tune-cortexa8-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa8thf-neon = "${TUNE_FEATURES_tune-cortexa8t-neon} callconvention-hard"
-PACKAGE_EXTRA_ARCHS_tune-cortexa8hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa8hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa8thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa8hf-vfp cortexa8t2hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa8hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa8hf-vfp cortexa8hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa8thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa8hf-vfp cortexa8hf-neon cortexa8t2hf-vfp cortexa8t2hf-neon"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexa9.inc b/meta-arm-bsp/conf/machine/include/tune-cortexa9.inc
deleted file mode 100644
index 0eb8f3b..0000000
--- a/meta-arm-bsp/conf/machine/include/tune-cortexa9.inc
+++ /dev/null
@@ -1,55 +0,0 @@
-DEFAULTTUNE ?= "armv7athf-neon"
-
-require conf/machine/include/arm/arch-armv7a.inc
-
-TUNEVALID[cortexa9] = "Enable Cortex-A9 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa9', ' -mcpu=cortex-a9', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'cortexa9', 'armv7a:', '', d)}"
-
-# Little Endian base configs
-AVAILTUNES += "cortexa9 cortexa9t cortexa9-neon cortexa9t-neon"
-ARMPKGARCH_tune-cortexa9 = "cortexa9"
-ARMPKGARCH_tune-cortexa9t = "cortexa9"
-ARMPKGARCH_tune-cortexa9-neon = "cortexa9"
-ARMPKGARCH_tune-cortexa9t-neon = "cortexa9"
-# mcpu is used so don't use armv7a as we don't want march
-TUNE_FEATURES_tune-cortexa9 = "arm vfp cortexa9"
-TUNE_FEATURES_tune-cortexa9t = "${TUNE_FEATURES_tune-cortexa9} thumb"
-TUNE_FEATURES_tune-cortexa9-neon = "${TUNE_FEATURES_tune-cortexa9} neon"
-TUNE_FEATURES_tune-cortexa9t-neon = "${TUNE_FEATURES_tune-cortexa9-neon} thumb"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa9-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa9-vfp cortexa9t2-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa9-vfp cortexa9-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa9-vfp cortexa9-neon cortexa9t2-vfp cortexa9t2-neon"
-
-# HF Tunes
-AVAILTUNES += "cortexa9hf cortexa9thf cortexa9hf-neon cortexa9thf-neon"
-ARMPKGARCH_tune-cortexa9hf = "cortexa9"
-ARMPKGARCH_tune-cortexa9thf = "cortexa9"
-ARMPKGARCH_tune-cortexa9hf-neon = "cortexa9"
-ARMPKGARCH_tune-cortexa9thf-neon = "cortexa9"
-# mcpu is used so don't use armv7a as we don't want march
-TUNE_FEATURES_tune-cortexa9hf = "${TUNE_FEATURES_tune-cortexa9} callconvention-hard"
-TUNE_FEATURES_tune-cortexa9thf = "${TUNE_FEATURES_tune-cortexa9t} callconvention-hard"
-TUNE_FEATURES_tune-cortexa9hf-neon = "${TUNE_FEATURES_tune-cortexa9-neon} callconvention-hard"
-TUNE_FEATURES_tune-cortexa9thf-neon = "${TUNE_FEATURES_tune-cortexa9t-neon} callconvention-hard"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa9hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa9hf-vfp cortexa9t2hf-vfp"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa9hf-vfp cortexa9hf-neon"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa9hf-vfp cortexa9hf-neon cortexa9t2hf-vfp cortexa9t2hf-neon"
-
-# VFPv3 Tunes
-AVAILTUNES += "cortexa9-vfpv3 cortexa9t-vfpv3 cortexa9hf-vfpv3 cortexa9thf-vfpv3"
-ARMPKGARCH_tune-cortexa9-vfpv3 = "cortexa9"
-ARMPKGARCH_tune-cortexa9t-vfpv3 = "cortexa9"
-ARMPKGARCH_tune-cortexa9hf-vfpv3 = "cortexa9"
-ARMPKGARCH_tune-cortexa9thf-vfpv3 = "cortexa9"
-# mcpu is used so don't use armv7a as we don't want march
-TUNE_FEATURES_tune-cortexa9-vfpv3 = "${TUNE_FEATURES_tune-cortexa9} vfpv3"
-TUNE_FEATURES_tune-cortexa9t-vfpv3 = "${TUNE_FEATURES_tune-cortexa9t} vfpv3"
-TUNE_FEATURES_tune-cortexa9hf-vfpv3 = "${TUNE_FEATURES_tune-cortexa9hf} vfpv3"
-TUNE_FEATURES_tune-cortexa9thf-vfpv3 = "${TUNE_FEATURES_tune-cortexa9thf} vfpv3"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9-vfpv3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-vfpv3} cortexa9-vfp cortexa9-vfpv3"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9t-vfpv3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-vfpv3} cortexa9-vfp cortexa9-vfpv3 cortexa9t2-vfp cortexa9t2-vfpv3"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9hf-vfpv3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-vfpv3} cortexa9hf-vfp cortexa9hf-vfpv3"
-PACKAGE_EXTRA_ARCHS_tune-cortexa9thf-vfpv3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-vfpv3} cortexa9hf-vfp cortexa9hf-vfpv3 cortexa9t2hf-vfp cortexa9t2hf-vfpv3"
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] arm-bsp: remove dunfell u-boot support
2020-10-17 2:41 [PATCH 1/3] Drop dunfell support Jon Mason
2020-10-17 2:41 ` [PATCH 2/3] arm-bsp: remove cortex-a tune files Jon Mason
@ 2020-10-17 2:41 ` Jon Mason
2020-10-25 13:42 ` [meta-arm] [PATCH 1/3] Drop dunfell support Jon Mason
2 siblings, 0 replies; 4+ messages in thread
From: Jon Mason @ 2020-10-17 2:41 UTC (permalink / raw)
To: meta-arm
u-boot version 2020.01 is not needed with dunfell not supported. Remove
files and adjust the necessary. Also, move tc0 support to match the
other BSPs
Change-Id: Ibc0f93a9eb0ca600a84b1399d77b35e6ae08753b
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.../a5ds/0001-armv7-add-mmio-timer.patch | 105 ------
...-arm-add-designstart-cortex-a5-board.patch | 309 ------------------
...-Add-vexpress_aemv8a_aarch32-variant.patch | 181 ----------
.../fvp-common/u-boot_vexpress_fvp.patch | 13 -
.../juno/u-boot_vexpress_uenv.patch | 37 ---
.../0001-Add-support-for-Total-Compute.patch | 0
.../recipes-bsp/u-boot/u-boot_%.bbappend | 2 +-
.../recipes-bsp/u-boot/u-boot_2020.04.bb | 0
8 files changed, 1 insertion(+), 646 deletions(-)
delete mode 100644 meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/a5ds/0001-armv7-add-mmio-timer.patch
delete mode 100644 meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/a5ds/0002-board-arm-add-designstart-cortex-a5-board.patch
delete mode 100644 meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/fvp-base-arm32/0001-Add-vexpress_aemv8a_aarch32-variant.patch
delete mode 100644 meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/fvp-common/u-boot_vexpress_fvp.patch
delete mode 100644 meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/juno/u-boot_vexpress_uenv.patch
rename meta-arm-bsp/recipes-bsp/u-boot/{files => u-boot-2020.07}/tc0/0001-Add-support-for-Total-Compute.patch (100%)
rename {meta-arm => meta-arm-bsp}/recipes-bsp/u-boot/u-boot_2020.04.bb (100%)
diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/a5ds/0001-armv7-add-mmio-timer.patch b/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/a5ds/0001-armv7-add-mmio-timer.patch
deleted file mode 100644
index fbf8a14..0000000
--- a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/a5ds/0001-armv7-add-mmio-timer.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 8525c72c438b0aa66f1f38db37bd7aacf7e3ce34 Mon Sep 17 00:00:00 2001
-From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Wed, 18 Dec 2019 21:52:34 +0000
-Subject: [PATCH 1/2] armv7: add mmio timer
-
-This timer can be used by u-boot when arch-timer is not available in
-core, for example, Cortex-A5.
-
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
----
- arch/arm/cpu/armv7/Makefile | 1 +
- arch/arm/cpu/armv7/mmio_timer.c | 56 +++++++++++++++++++++++++++++++++
- scripts/config_whitelist.txt | 1 +
- 3 files changed, 58 insertions(+)
- create mode 100644 arch/arm/cpu/armv7/mmio_timer.c
-
-diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
-index 8c955d0d5284..82af9c031277 100644
---- a/arch/arm/cpu/armv7/Makefile
-+++ b/arch/arm/cpu/armv7/Makefile
-@@ -28,6 +28,7 @@ obj-$(CONFIG_ARMV7_PSCI) += psci.o psci-common.o
- obj-$(CONFIG_IPROC) += iproc-common/
- obj-$(CONFIG_KONA) += kona-common/
- obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
-+obj-$(CONFIG_SYS_MMIO_TIMER) += mmio_timer.o
-
- ifneq (,$(filter s5pc1xx exynos,$(SOC)))
- obj-y += s5p-common/
-diff --git a/arch/arm/cpu/armv7/mmio_timer.c b/arch/arm/cpu/armv7/mmio_timer.c
-new file mode 100644
-index 000000000000..1b905db8bb19
---- /dev/null
-+++ b/arch/arm/cpu/armv7/mmio_timer.c
-@@ -0,0 +1,56 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * Copyright (c) 2019, Arm Limited. All rights reserved.
-+ *
-+ */
-+
-+#include <common.h>
-+#include <asm/io.h>
-+#include <div64.h>
-+#include <bootstage.h>
-+
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+#define CNTCTLBASE 0x1a020000UL
-+#define CNTREADBASE 0x1a030000UL
-+
-+static inline uint32_t mmio_read32(uintptr_t addr)
-+{
-+ return *(volatile uint32_t*)addr;
-+}
-+
-+int timer_init(void)
-+{
-+ gd->arch.timer_rate_hz = mmio_read32(CNTCTLBASE);
-+
-+ return 0;
-+}
-+
-+unsigned long long get_ticks(void)
-+{
-+ return ((mmio_read32(CNTCTLBASE + 0x4) << 32) |
-+ mmio_read32(CNTREADBASE));
-+}
-+
-+ulong get_timer(ulong base)
-+{
-+ return lldiv(get_ticks(), gd->arch.timer_rate_hz) - base;
-+}
-+
-+void __udelay(unsigned long usec)
-+{
-+ unsigned long endtime;
-+
-+ endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
-+ 1000UL);
-+
-+ endtime += get_ticks();
-+
-+ while (get_ticks() < endtime)
-+ ;
-+}
-+
-+ulong get_tbclk(void)
-+{
-+ return gd->arch.timer_rate_hz;
-+}
-diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
-index cf1808e051c8..8624714ae7a6 100644
---- a/scripts/config_whitelist.txt
-+++ b/scripts/config_whitelist.txt
-@@ -3138,6 +3138,7 @@ CONFIG_SYS_MMC_U_BOOT_DST
- CONFIG_SYS_MMC_U_BOOT_OFFS
- CONFIG_SYS_MMC_U_BOOT_SIZE
- CONFIG_SYS_MMC_U_BOOT_START
-+CONFIG_SYS_MMIO_TIMER
- CONFIG_SYS_MONITOR_
- CONFIG_SYS_MONITOR_BASE
- CONFIG_SYS_MONITOR_BASE_EARLY
---
-2.25.0
-
diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/a5ds/0002-board-arm-add-designstart-cortex-a5-board.patch b/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/a5ds/0002-board-arm-add-designstart-cortex-a5-board.patch
deleted file mode 100644
index 3c527ae..0000000
--- a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/a5ds/0002-board-arm-add-designstart-cortex-a5-board.patch
+++ /dev/null
@@ -1,309 +0,0 @@
-From 2417d0991f73ee2c83946fcac208a7d6894f4530 Mon Sep 17 00:00:00 2001
-From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Wed, 8 Jan 2020 09:48:11 +0000
-Subject: [PATCH 2/2] board: arm: add designstart cortex-a5 board
-
-Arm added a new board, designstart, with a cortex-a5 chip, add the
-default configuration, initialization and makefile for this system.
-
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
----
- arch/arm/Kconfig | 7 ++
- board/armltd/designstart/Kconfig | 12 +++
- board/armltd/designstart/Makefile | 8 ++
- board/armltd/designstart/designstart.c | 49 ++++++++++
- configs/designstart_ca5_defconfig | 37 ++++++++
- include/configs/designstart_ca5.h | 122 +++++++++++++++++++++++++
- 6 files changed, 235 insertions(+)
- create mode 100644 board/armltd/designstart/Kconfig
- create mode 100644 board/armltd/designstart/Makefile
- create mode 100644 board/armltd/designstart/designstart.c
- create mode 100644 configs/designstart_ca5_defconfig
- create mode 100644 include/configs/designstart_ca5.h
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index f9dab073ea14..2cc9413114de 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -628,6 +628,12 @@ config ARCH_BCM6858
- select OF_CONTROL
- imply CMD_DM
-
-+config TARGET_DESIGNSTART_CA5
-+ bool "Support Designstart Cortex-A5"
-+ select CPU_V7A
-+ select SEMIHOSTING
-+ select PL01X_SERIAL
-+
- config TARGET_VEXPRESS_CA15_TC2
- bool "Support vexpress_ca15_tc2"
- select CPU_V7A
-@@ -1782,6 +1788,7 @@ source "board/Marvell/gplugd/Kconfig"
- source "board/armadeus/apf27/Kconfig"
- source "board/armltd/vexpress/Kconfig"
- source "board/armltd/vexpress64/Kconfig"
-+source "board/armltd/designstart/Kconfig"
- source "board/broadcom/bcm23550_w1d/Kconfig"
- source "board/broadcom/bcm28155_ap/Kconfig"
- source "board/broadcom/bcm963158/Kconfig"
-diff --git a/board/armltd/designstart/Kconfig b/board/armltd/designstart/Kconfig
-new file mode 100644
-index 000000000000..6446fe3f4492
---- /dev/null
-+++ b/board/armltd/designstart/Kconfig
-@@ -0,0 +1,12 @@
-+if TARGET_DESIGNSTART_CA5
-+
-+config SYS_BOARD
-+ default "designstart"
-+
-+config SYS_VENDOR
-+ default "armltd"
-+
-+config SYS_CONFIG_NAME
-+ default "designstart_ca5"
-+
-+endif
-diff --git a/board/armltd/designstart/Makefile b/board/armltd/designstart/Makefile
-new file mode 100644
-index 000000000000..b64c905c7021
---- /dev/null
-+++ b/board/armltd/designstart/Makefile
-@@ -0,0 +1,8 @@
-+# SPDX-License-Identifier: GPL-2.0+
-+#
-+# (C) Copyright 2020 ARM Limited
-+# (C) Copyright 2020 Linaro
-+# Rui Miguel Silva <rui.silva@linaro.org>
-+#
-+
-+obj-y := designstart.o
-diff --git a/board/armltd/designstart/designstart.c b/board/armltd/designstart/designstart.c
-new file mode 100644
-index 000000000000..b0400f110ce2
---- /dev/null
-+++ b/board/armltd/designstart/designstart.c
-@@ -0,0 +1,49 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * (C) Copyright 2020 ARM Limited
-+ * (C) Copyright 2020 Linaro
-+ * Rui Miguel Silva <rui.silva@linaro.org>
-+ */
-+
-+#include <common.h>
-+#include <dm.h>
-+#include <dm/platform_data/serial_pl01x.h>
-+#include <malloc.h>
-+
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+static const struct pl01x_serial_platdata serial_platdata = {
-+ .base = V2M_UART0,
-+ .type = TYPE_PL011,
-+ .clock = CONFIG_PL011_CLOCK,
-+};
-+
-+U_BOOT_DEVICE(designstart_serials) = {
-+ .name = "serial_pl01x",
-+ .platdata = &serial_platdata,
-+};
-+
-+int board_init(void)
-+{
-+ return 0;
-+}
-+
-+int dram_init(void)
-+{
-+ gd->ram_size = PHYS_SDRAM_1_SIZE;
-+
-+ return 0;
-+}
-+
-+int dram_init_banksize(void)
-+{
-+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-+
-+ return 0;
-+}
-+
-+void reset_cpu(ulong addr)
-+{
-+}
-+
-diff --git a/configs/designstart_ca5_defconfig b/configs/designstart_ca5_defconfig
-new file mode 100644
-index 000000000000..a2a756740295
---- /dev/null
-+++ b/configs/designstart_ca5_defconfig
-@@ -0,0 +1,37 @@
-+CONFIG_ARM=y
-+CONFIG_TARGET_DESIGNSTART_CA5=y
-+CONFIG_SYS_TEXT_BASE=0x88000000
-+CONFIG_SYS_MALLOC_F_LEN=0x2000
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_IDENT_STRING=" ca5ds aarch32"
-+CONFIG_BOOTDELAY=1
-+CONFIG_USE_BOOTARGS=y
-+CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1a200000 root=/dev/ram0 rw loglevel=9"
-+# CONFIG_DISPLAY_CPUINFO is not set
-+# CONFIG_DISPLAY_BOARDINFO is not set
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_PROMPT="ca5ds32# "
-+CONFIG_CMD_BOOTZ=y
-+# CONFIG_CMD_CONSOLE is not set
-+# CONFIG_CMD_IMLS is not set
-+# CONFIG_CMD_XIMG is not set
-+# CONFIG_CMD_EDITENV is not set
-+# CONFIG_CMD_ENV_EXISTS is not set
-+CONFIG_CMD_MEMTEST=y
-+CONFIG_MTD_NOR_FLASH=y
-+# CONFIG_CMD_LOADS is not set
-+CONFIG_CMD_ARMFLASH=y
-+# CONFIG_CMD_FPGA is not set
-+# CONFIG_CMD_ITEST is not set
-+# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_DHCP=y
-+# CONFIG_CMD_NFS is not set
-+CONFIG_CMD_MII=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_CACHE=y
-+# CONFIG_CMD_MISC is not set
-+CONFIG_CMD_FAT=y
-+CONFIG_DM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_OF_LIBFDT=y
-+
-diff --git a/include/configs/designstart_ca5.h b/include/configs/designstart_ca5.h
-new file mode 100644
-index 000000000000..79c4b36060d2
---- /dev/null
-+++ b/include/configs/designstart_ca5.h
-@@ -0,0 +1,122 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * (C) Copyright 2020 ARM Limited
-+ * (C) Copyright 2020 Linaro
-+ * Rui Miguel Silva <rui.silva@linaro.org>
-+ *
-+ * Configuration for Cortex-A5 Designstart. Parts were derived from other ARM
-+ * configurations.
-+ */
-+
-+#ifndef __DESISGNSTART_CA5_H
-+#define __DESISGNSTART_CA5_H
-+
-+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
-+#define CONFIG_SKIP_LOWLEVEL_INIT
-+
-+/* Generic Timer Definitions */
-+#define CONFIG_SYS_HZ_CLOCK 7500000
-+#define CONFIG_SYS_HZ 1000
-+#define COUNTER_FREQUENCY CONFIG_SYS_HZ_CLOCK
-+
-+#ifdef CONFIG_DESIGNSTART_MEMORY_MAP_EXTENDED
-+#define V2M_SRAM0 0x00010000
-+#define V2M_SRAM1 0x02200000
-+#define V2M_QSPI 0x0A800000
-+#else
-+#define V2M_SRAM0 0x00000000
-+#define V2M_SRAM1 0x02000000
-+#define V2M_QSPI 0x08000000
-+#endif
-+
-+#define V2M_DEBUG 0x10000000
-+#define V2M_BASE_PERIPH 0x1A000000
-+#define V2M_A5_PERIPH 0x1C000000
-+#define V2M_L2CC_PERIPH 0x1C010000
-+
-+#define V2M_MASTER_EXPANSION0 0x40000000
-+#define V2M_MASTER_EXPANSION1 0x60000000
-+
-+#define V2M_BASE 0x80000000
-+
-+#define V2M_PERIPH_OFFSET(x) (x << 16)
-+
-+#define V2M_SYSID (V2M_BASE_PERIPH)
-+#define V2M_SYCTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(1))
-+#define V2M_COUNTER_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(2))
-+#define V2M_COUNTER_READ (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(3))
-+#define V2M_TIMER_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(4))
-+#define V2M_TIMER0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(5))
-+
-+#define V2M_WATCHDOG_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(16))
-+#define V2M_WATCHDOG_REFRESH (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(17))
-+
-+#define V2M_UART0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(32))
-+#define V2M_UART1 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(33))
-+
-+#define V2M_RTC (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(34))
-+#define V2M_TRNG (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(35))
-+
-+/* PL011 Serial Configuration */
-+#define CONFIG_CONS_INDEX 0
-+#define CONFIG_PL011_CLOCK 7500000
-+
-+/* Physical Memory Map */
-+#define PHYS_SDRAM_1 (V2M_BASE)
-+
-+/* Top 16MB reserved for secure world use */
-+#define DRAM_SEC_SIZE 0x01000000
-+#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
-+
-+/* Size of malloc() pool */
-+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
-+
-+/* Miscellaneous configurable options */
-+#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
-+
-+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-+
-+#define CONFIG_SYS_MMIO_TIMER
-+
-+/* Enable memtest */
-+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
-+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
-+
-+#define CONFIG_EXTRA_ENV_SETTINGS \
-+ "kernel_name=Image\0" \
-+ "kernel_addr=0x80F00000\0" \
-+ "initrd_name=ramdisk.img\0" \
-+ "initrd_addr=0x84000000\0" \
-+ "fdt_name=devtree.dtb\0" \
-+ "fdt_addr=0x83000000\0" \
-+ "fdt_high=0xffffffff\0" \
-+ "initrd_high=0xffffffff\0"
-+
-+#define CONFIG_BOOTCOMMAND "echo copy to RAM...; " \
-+ "cp.b 0x80100000 $kernel_addr 0xB00000; " \
-+ "cp.b 0x80D00000 $initrd_addr 0x800000; " \
-+ "bootz $kernel_addr $initrd_addr $fdt_addr"
-+
-+/* Monitor Command Prompt */
-+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-+#define CONFIG_SYS_MAXARGS 64 /* max command args */
-+
-+#define CONFIG_SYS_FLASH_BASE 0x80000000
-+/* 256 x 256KiB sectors */
-+#define CONFIG_SYS_MAX_FLASH_SECT 256
-+/* Store environment at top of flash */
-+#define CONFIG_ENV_ADDR 0x0A7C0000
-+#define CONFIG_ENV_SECT_SIZE 0x00040000
-+
-+#define CONFIG_SYS_FLASH_CFI 1
-+#define CONFIG_FLASH_CFI_DRIVER 1
-+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
-+#define CONFIG_SYS_MAX_FLASH_BANKS 1
-+
-+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
-+#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
-+#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
-+#define FLASH_MAX_SECTOR_SIZE 0x00040000
-+#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
-+#define CONFIG_ENV_IS_IN_FLASH 1
-+#endif
---
-2.25.0
-
diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/fvp-base-arm32/0001-Add-vexpress_aemv8a_aarch32-variant.patch b/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/fvp-base-arm32/0001-Add-vexpress_aemv8a_aarch32-variant.patch
deleted file mode 100644
index 712f7f0..0000000
--- a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/fvp-base-arm32/0001-Add-vexpress_aemv8a_aarch32-variant.patch
+++ /dev/null
@@ -1,181 +0,0 @@
-From d627bdf9b11964b694aaf464c5c88ad9b339f03f Mon Sep 17 00:00:00 2001
-From: Anders Dellien <anders.dellien@arm.com>
-Date: Thu, 23 Jul 2020 17:32:55 +0100
-Subject: [PATCH] Add vexpress_aemv8a_aarch32 variant
-
-The ARM AEMv8 FVP model can be run in Aarch64 or Aarch32 mode. Aarch32
-support is enable per-CPU when launching the model, eg:
-
--C cluster0.cpu0.CONFIG64=0
-
-This patch adds a new defconfig and some variant specific selections in
-vexpress_armv8a.h.
-
-This patch is co-authored with Soby Mathew <Soby.Mathew@arm.com>.
-
-Upstream-status: Denied
-
-For upstream discussion, please visit
-https://www.mail-archive.com/u-boot@lists.denx.de/msg233429.html
-
-Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
-Signed-off-by: Asha R <asha.r@arm.com>
-Signed-off-by: Anders Dellien <anders.dellien@arm.com>
----
- arch/arm/Kconfig | 5 +++
- board/armltd/vexpress64/Kconfig | 2 +-
- configs/vexpress_aemv8a_aarch32_defconfig | 40 +++++++++++++++++++++++
- include/configs/vexpress_aemv8a.h | 28 +++++++++++-----
- 4 files changed, 65 insertions(+), 10 deletions(-)
- create mode 100644 configs/vexpress_aemv8a_aarch32_defconfig
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 36c9c2fecd..99972cdf65 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1088,6 +1088,11 @@ config TARGET_VEXPRESS64_BASE_FVP
- select PL01X_SERIAL
- select SEMIHOSTING
-
-+config TARGET_VEXPRESS64_BASE_FVP_AARCH32
-+ bool "Support Versatile Express ARMv8a 32-bit FVP BASE model"
-+ select CPU_V7A
-+ select SEMIHOSTING
-+
- config TARGET_VEXPRESS64_JUNO
- bool "Support Versatile Express Juno Development Platform"
- select ARM64
-diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
-index 9014418433..75545e9ea1 100644
---- a/board/armltd/vexpress64/Kconfig
-+++ b/board/armltd/vexpress64/Kconfig
-@@ -1,4 +1,4 @@
--if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_JUNO
-+if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_JUNO || TARGET_VEXPRESS64_BASE_FVP_AARCH32
-
- config SYS_BOARD
- default "vexpress64"
-diff --git a/configs/vexpress_aemv8a_aarch32_defconfig b/configs/vexpress_aemv8a_aarch32_defconfig
-new file mode 100644
-index 0000000000..cf1e8d5cae
---- /dev/null
-+++ b/configs/vexpress_aemv8a_aarch32_defconfig
-@@ -0,0 +1,40 @@
-+CONFIG_ARM=y
-+CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32=y
-+CONFIG_SYS_MALLOC_F_LEN=0x2000
-+CONFIG_IDENT_STRING=" vexpress_aemv8a fvp aarch32"
-+CONFIG_BOOTDELAY=1
-+CONFIG_SYS_TEXT_BASE=0x88000000
-+CONFIG_USE_BOOTARGS=y
-+CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 systemd.log_target=null root=/dev/vda2 rw androidboot.hardware=fvpbase rootwait loglevel=9"
-+# CONFIG_DISPLAY_CPUINFO is not set
-+# CONFIG_DISPLAY_BOARDINFO is not set
-+CONFIG_HUSH_PARSER=y
-+CONFIG_SYS_PROMPT="fvp32# "
-+CONFIG_CMD_BOOTZ=y
-+# CONFIG_CMD_CONSOLE is not set
-+# CONFIG_CMD_IMLS is not set
-+# CONFIG_CMD_XIMG is not set
-+# CONFIG_CMD_EDITENV is not set
-+# CONFIG_CMD_ENV_EXISTS is not set
-+CONFIG_CMD_MEMTEST=y
-+CONFIG_MTD_NOR_FLASH=y
-+# CONFIG_CMD_LOADS is not set
-+CONFIG_CMD_ARMFLASH=y
-+# CONFIG_CMD_FPGA is not set
-+# CONFIG_CMD_ITEST is not set
-+# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_DHCP=y
-+# CONFIG_CMD_NFS is not set
-+CONFIG_CMD_MII=y
-+CONFIG_CMD_PING=y
-+CONFIG_CMD_CACHE=y
-+# CONFIG_CMD_MISC is not set
-+CONFIG_CMD_FAT=y
-+CONFIG_DM=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_OF_LIBFDT=y
-+CONFIG_FLASH_CFI_DRIVER=y
-+CONFIG_SYS_FLASH_CFI=y
-+CONFIG_SYS_ARCH_TIMER=y
-+CONFIG_DM_SERIAL=y
-+CONFIG_PL01X_SERIAL=y
-diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
-index 9a9cec414c..cf0e4a951c 100644
---- a/include/configs/vexpress_aemv8a.h
-+++ b/include/configs/vexpress_aemv8a.h
-@@ -7,7 +7,8 @@
- #ifndef __VEXPRESS_AEMV8A_H
- #define __VEXPRESS_AEMV8A_H
-
--#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
-+#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
-+ defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32)
- #ifndef CONFIG_SEMIHOSTING
- #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
- #endif
-@@ -15,8 +16,17 @@
-
- #define CONFIG_REMAKE_ELF
-
-+#ifdef CONFIG_ARM64
-+#define HIGH_ADDR "0xffffffffffffffff"
-+#define BOOT_TYPE "booti"
-+#else
-+#define HIGH_ADDR "0xffffffff"
-+#define BOOT_TYPE "bootz"
-+#endif
-+
- /* Link Definitions */
--#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
-+#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
-+ defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32)
- /* ATF loads u-boot here for BASE_FVP model */
- #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
- #elif CONFIG_TARGET_VEXPRESS64_JUNO
-@@ -82,7 +92,8 @@
- #define GICR_BASE (0x2f100000)
- #else
-
--#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
-+#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
-+ defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32)
- #define GICD_BASE (0x2f000000)
- #define GICC_BASE (0x2c000000)
- #elif CONFIG_TARGET_VEXPRESS64_JUNO
-@@ -169,7 +180,8 @@
- "booti ${kernel_addr} ${initrd_param} ${fdt_addr}"
-
-
--#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
-+#elif defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
-+ defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_AARCH32)
- #define CONFIG_EXTRA_ENV_SETTINGS \
- "kernel_name=Image\0" \
- "kernel_addr=0x80080000\0" \
-@@ -177,8 +189,8 @@
- "initrd_addr=0x88000000\0" \
- "fdtfile=devtree.dtb\0" \
- "fdt_addr=0x83000000\0" \
-- "fdt_high=0xffffffffffffffff\0" \
-- "initrd_high=0xffffffffffffffff\0"
-+ "fdt_high=" HIGH_ADDR "\0" \
-+ "initrd_high=" HIGH_ADDR "\0"
-
- #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
- "smhload ${fdtfile} ${fdt_addr}; " \
-@@ -186,9 +198,7 @@
- "initrd_end; " \
- "fdt addr ${fdt_addr}; fdt resize; " \
- "fdt chosen ${initrd_addr} ${initrd_end}; " \
-- "booti $kernel_addr - $fdt_addr"
--
--
-+ BOOT_TYPE " $kernel_addr - $fdt_addr"
- #endif
-
- /* Monitor Command Prompt */
---
-2.17.1
-
diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/fvp-common/u-boot_vexpress_fvp.patch b/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/fvp-common/u-boot_vexpress_fvp.patch
deleted file mode 100644
index 19e1a56..0000000
--- a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/fvp-common/u-boot_vexpress_fvp.patch
+++ /dev/null
@@ -1,13 +0,0 @@
-diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
-index c9cec8322c..3a339be6a2 100644
---- a/configs/vexpress_aemv8a_semi_defconfig
-+++ b/configs/vexpress_aemv8a_semi_defconfig
-@@ -9,7 +9,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
- CONFIG_DISTRO_DEFAULTS=y
- CONFIG_BOOTDELAY=1
- CONFIG_USE_BOOTARGS=y
--CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9"
-+CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait loglevel=9"
- # CONFIG_USE_BOOTCOMMAND is not set
- # CONFIG_DISPLAY_CPUINFO is not set
- # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/juno/u-boot_vexpress_uenv.patch b/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/juno/u-boot_vexpress_uenv.patch
deleted file mode 100644
index bb90c17..0000000
--- a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.01/juno/u-boot_vexpress_uenv.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
-index 2354f4e958..3e01f477dc 100644
---- a/include/configs/vexpress_aemv8a.h
-+++ b/include/configs/vexpress_aemv8a.h
-@@ -151,6 +151,32 @@
- "fdt_addr=0x83000000\0" \
- "fdt_high=0xffffffffffffffff\0" \
- "initrd_high=0xffffffffffffffff\0" \
-+ "bootenvfile=uEnv.txt\0" \
-+ "bootcmd=run envboot\0" \
-+ "envboot=if run loadbootenv; then echo Loading env from ${bootenvfile}; run importbootenv; else run default_bootcmd; fi; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd;fi;\0" \
-+ "importbootenv=echo Importing environment from memory, size ${filesize}; env import -t ${loadaddr} ${filesize}\0" \
-+ "loadaddr=0x82000000\0" \
-+ "filesize=0x4000\0" \
-+ "loadbootenv=mw.l ${loadaddr} 0 0x1000; afs load ${bootenvfile} ${loadaddr}\0" \
-+ "default_bootcmd=echo running default boot command; afs load ${kernel_name} ${kernel_addr} ; " \
-+ "if test $? -eq 1; then "\
-+ " echo Loading ${kernel_alt_name} instead of "\
-+ "${kernel_name}; "\
-+ " afs load ${kernel_alt_name} ${kernel_addr};"\
-+ "fi ; "\
-+ "afs load ${fdtfile} ${fdt_addr} ; " \
-+ "if test $? -eq 1; then "\
-+ " echo Loading ${fdt_alt_name} instead of "\
-+ "${fdtfile}; "\
-+ " afs load ${fdt_alt_name} ${fdt_addr}; "\
-+ "fi ; "\
-+ "fdt addr ${fdt_addr}; fdt resize; " \
-+ "if afs load ${initrd_name} ${initrd_addr} ; "\
-+ "then "\
-+ " setenv initrd_param ${initrd_addr}; "\
-+ " else setenv initrd_param -; "\
-+ "fi ; " \
-+ "booti ${kernel_addr} ${initrd_param} ${fdt_addr}\0"
-
- /* Copy the kernel and FDT to DRAM memory and boot */
- #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \
diff --git a/meta-arm-bsp/recipes-bsp/u-boot/files/tc0/0001-Add-support-for-Total-Compute.patch b/meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.07/tc0/0001-Add-support-for-Total-Compute.patch
similarity index 100%
rename from meta-arm-bsp/recipes-bsp/u-boot/files/tc0/0001-Add-support-for-Total-Compute.patch
rename to meta-arm-bsp/recipes-bsp/u-boot/u-boot-2020.07/tc0/0001-Add-support-for-Total-Compute.patch
diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend b/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend
index 205c3c4..303f18e 100644
--- a/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend
+++ b/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend
@@ -1,7 +1,7 @@
# Machine specific u-boot
THIS_DIR := "${THISDIR}"
-FILESEXTRAPATHS_prepend = "${THIS_DIR}/files/:${THIS_DIR}/${BP}:"
+FILESEXTRAPATHS_prepend = "${THIS_DIR}/${BP}:"
FILESEXTRAPATHS_prepend_fvp-base = "${THIS_DIR}/${BP}/fvp-common:"
FILESEXTRAPATHS_prepend_foundation-armv8 = "${THIS_DIR}/${BP}/fvp-common:"
diff --git a/meta-arm/recipes-bsp/u-boot/u-boot_2020.04.bb b/meta-arm-bsp/recipes-bsp/u-boot/u-boot_2020.04.bb
similarity index 100%
rename from meta-arm/recipes-bsp/u-boot/u-boot_2020.04.bb
rename to meta-arm-bsp/recipes-bsp/u-boot/u-boot_2020.04.bb
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [meta-arm] [PATCH 1/3] Drop dunfell support
2020-10-17 2:41 [PATCH 1/3] Drop dunfell support Jon Mason
2020-10-17 2:41 ` [PATCH 2/3] arm-bsp: remove cortex-a tune files Jon Mason
2020-10-17 2:41 ` [PATCH 3/3] arm-bsp: remove dunfell u-boot support Jon Mason
@ 2020-10-25 13:42 ` Jon Mason
2 siblings, 0 replies; 4+ messages in thread
From: Jon Mason @ 2020-10-25 13:42 UTC (permalink / raw)
To: Jon Mason; +Cc: meta-arm
On Fri, Oct 16, 2020 at 10:41:24PM -0400, Jon Mason wrote:
> Drop dunfell support from the master branch in anticipation of the
> gatestgarth release. All dunfell users should reference the dunfell
> branch.
>
> Change-Id: I9c5806f698cca42773aaea1fb49e0dfff437eaf4
> Signed-off-by: Jon Mason <jon.mason@arm.com>
Series applied to master
Thanks,
Jon
> ---
> meta-arm-autonomy/conf/layer.conf | 2 +-
> meta-arm-bsp/conf/layer.conf | 2 +-
> meta-arm-toolchain/conf/layer.conf | 2 +-
> meta-arm/conf/layer.conf | 2 +-
> meta-gem5/conf/layer.conf | 2 +-
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/meta-arm-autonomy/conf/layer.conf b/meta-arm-autonomy/conf/layer.conf
> index 5a439e2..936b6c1 100644
> --- a/meta-arm-autonomy/conf/layer.conf
> +++ b/meta-arm-autonomy/conf/layer.conf
> @@ -16,7 +16,7 @@ LAYERDEPENDS_meta-arm-autonomy = " \
> openembedded-layer \
> virtualization-layer \
> "
> -LAYERSERIES_COMPAT_meta-arm-autonomy = "dunfell gatesgarth"
> +LAYERSERIES_COMPAT_meta-arm-autonomy = "gatesgarth"
>
> # We don't activate virtualization feature from meta-virtualization as it
> # brings in lots of stuff we don't need. We need to disable the sanity check
> diff --git a/meta-arm-bsp/conf/layer.conf b/meta-arm-bsp/conf/layer.conf
> index 816ff9d..4de1bfa 100644
> --- a/meta-arm-bsp/conf/layer.conf
> +++ b/meta-arm-bsp/conf/layer.conf
> @@ -10,4 +10,4 @@ BBFILE_PATTERN_meta-arm-bsp = "^${LAYERDIR}/"
> BBFILE_PRIORITY_meta-arm-bsp = "6"
>
> LAYERDEPENDS_meta-arm-bsp = "core meta-arm meta-kernel"
> -LAYERSERIES_COMPAT_meta-arm-bsp = "dunfell gatesgarth"
> +LAYERSERIES_COMPAT_meta-arm-bsp = "gatesgarth"
> diff --git a/meta-arm-toolchain/conf/layer.conf b/meta-arm-toolchain/conf/layer.conf
> index 6ab98af..d0ca75a 100644
> --- a/meta-arm-toolchain/conf/layer.conf
> +++ b/meta-arm-toolchain/conf/layer.conf
> @@ -12,7 +12,7 @@ BBFILE_PRIORITY_arm-toolchain = "30"
> LICENSE_PATH += "${LAYERDIR}/custom-licenses"
>
> LAYERDEPENDS_arm-toolchain = "core"
> -LAYERSERIES_COMPAT_arm-toolchain = "dunfell gatesgarth"
> +LAYERSERIES_COMPAT_arm-toolchain = "gatesgarth"
>
> # do not error out on bbappends for missing recipes
> BB_DANGLINGAPPENDS_WARNONLY = "true"
> diff --git a/meta-arm/conf/layer.conf b/meta-arm/conf/layer.conf
> index d53c40a..9649738 100644
> --- a/meta-arm/conf/layer.conf
> +++ b/meta-arm/conf/layer.conf
> @@ -13,4 +13,4 @@ LAYERDEPENDS_meta-arm = " \
> core \
> arm-toolchain \
> "
> -LAYERSERIES_COMPAT_meta-arm = "dunfell gatesgarth"
> +LAYERSERIES_COMPAT_meta-arm = "gatesgarth"
> diff --git a/meta-gem5/conf/layer.conf b/meta-gem5/conf/layer.conf
> index 439444c..58242c3 100644
> --- a/meta-gem5/conf/layer.conf
> +++ b/meta-gem5/conf/layer.conf
> @@ -10,4 +10,4 @@ BBFILE_PATTERN_meta-gem5 = "^${LAYERDIR}/"
> BBFILE_PRIORITY_meta-gem5 = "6"
>
> LAYERDEPENDS_meta-gem5 = "core openembedded-layer"
> -LAYERSERIES_COMPAT_meta-gem5 = "dunfell gatesgarth"
> +LAYERSERIES_COMPAT_meta-gem5 = "gatesgarth"
> --
> 2.17.1
>
>
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-10-25 13:42 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-17 2:41 [PATCH 1/3] Drop dunfell support Jon Mason
2020-10-17 2:41 ` [PATCH 2/3] arm-bsp: remove cortex-a tune files Jon Mason
2020-10-17 2:41 ` [PATCH 3/3] arm-bsp: remove dunfell u-boot support Jon Mason
2020-10-25 13:42 ` [meta-arm] [PATCH 1/3] Drop dunfell support Jon Mason
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.