* [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
@ 2020-10-19 17:45 ` Adam Ford
0 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: aford, Adam Ford, Rob Herring, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Catalin Marinas, Will Deacon, devicetree, linux-kernel
The driver exists for the Enhanced Asynchronous Sample Rate Converter
(EASRC) Controller, but there isn't a device tree entry for it.
On the vendor kernel, they put this on a spba-bus for SDMA support.
Add the the node for the spba-bus with the easrc node inside.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 746faf1cf2fb..7d34281332e1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -246,6 +246,34 @@ aips1: bus@30000000 {
#size-cells = <1>;
ranges;
+ spba-bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ easrc: easrc@300C0000 {
+ compatible = "fsl,imx8mn-easrc";
+ reg = <0x300C0000 0x10000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
+ clock-names = "mem";
+ dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+ <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+ <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+ <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+ dma-names = "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx";
+ fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
+ fsl,asrc-rate = <8000>;
+ fsl,asrc-width = <16>;
+ status = "disabled";
+ };
+ };
+
gpio1: gpio@30200000 {
compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
reg = <0x30200000 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
@ 2020-10-19 17:45 ` Adam Ford
0 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: devicetree, Fabio Estevam, Will Deacon, Adam Ford, Sascha Hauer,
aford, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Catalin Marinas, Shawn Guo
The driver exists for the Enhanced Asynchronous Sample Rate Converter
(EASRC) Controller, but there isn't a device tree entry for it.
On the vendor kernel, they put this on a spba-bus for SDMA support.
Add the the node for the spba-bus with the easrc node inside.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 746faf1cf2fb..7d34281332e1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -246,6 +246,34 @@ aips1: bus@30000000 {
#size-cells = <1>;
ranges;
+ spba-bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ easrc: easrc@300C0000 {
+ compatible = "fsl,imx8mn-easrc";
+ reg = <0x300C0000 0x10000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
+ clock-names = "mem";
+ dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+ <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+ <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+ <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+ dma-names = "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx";
+ fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
+ fsl,asrc-rate = <8000>;
+ fsl,asrc-width = <16>;
+ status = "disabled";
+ };
+ };
+
gpio1: gpio@30200000 {
compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
reg = <0x30200000 0x10000>;
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 2/5] arm64: defconfig: Enable ASRC and EASRC
2020-10-19 17:45 ` Adam Ford
@ 2020-10-19 17:45 ` Adam Ford
-1 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: aford, Adam Ford, Rob Herring, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Catalin Marinas, Will Deacon, devicetree, linux-kernel
The i.MX8M Nano supports the EASRC driver, and it requires ASRC.
Enable both of them as modules.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 20362359b212..804ec4dae674 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -674,7 +674,9 @@ CONFIG_SND_HDA_CODEC_HDMI=m
CONFIG_SND_SOC=y
CONFIG_SND_BCM2835_SOC_I2S=m
CONFIG_SND_SOC_FSL_SAI=m
+CONFIG_SND_SOC_FSL_ASRC=m
CONFIG_SND_SOC_FSL_MICFIL=m
+CONFIG_SND_SOC_FSL_EASRC=m
CONFIG_SND_IMX_SOC=m
CONFIG_SND_SOC_IMX_SPDIF=m
CONFIG_SND_SOC_IMX_AUDMIX=m
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 2/5] arm64: defconfig: Enable ASRC and EASRC
@ 2020-10-19 17:45 ` Adam Ford
0 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: devicetree, Fabio Estevam, Will Deacon, Adam Ford, Sascha Hauer,
aford, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Catalin Marinas, Shawn Guo
The i.MX8M Nano supports the EASRC driver, and it requires ASRC.
Enable both of them as modules.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 20362359b212..804ec4dae674 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -674,7 +674,9 @@ CONFIG_SND_HDA_CODEC_HDMI=m
CONFIG_SND_SOC=y
CONFIG_SND_BCM2835_SOC_I2S=m
CONFIG_SND_SOC_FSL_SAI=m
+CONFIG_SND_SOC_FSL_ASRC=m
CONFIG_SND_SOC_FSL_MICFIL=m
+CONFIG_SND_SOC_FSL_EASRC=m
CONFIG_SND_IMX_SOC=m
CONFIG_SND_SOC_IMX_SPDIF=m
CONFIG_SND_SOC_IMX_AUDMIX=m
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 3/5] arm64: dts: imx8mn: Add SAI nodes
2020-10-19 17:45 ` Adam Ford
@ 2020-10-19 17:45 ` Adam Ford
-1 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: aford, Adam Ford, Rob Herring, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Catalin Marinas, Will Deacon, devicetree, linux-kernel
The i.MX8M Nano has several SAI nodes available to it.
Enable them.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 7d34281332e1..9e2c0b6a7e32 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -253,6 +253,83 @@ spba-bus@30000000 {
reg = <0x30000000 0x100000>;
ranges;
+ sai2: sai@30020000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30020000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI2_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai3: sai@30030000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30030000 0x10000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI3_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai5: sai@30050000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30050000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI5_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
+ dma-names = "rx", "tx";
+ fsl,shared-interrupt;
+ fsl,dataline = <0 0xf 0xf>;
+ status = "disabled";
+ };
+
+ sai6: sai@30060000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30060000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI6_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai7: sai@300b0000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x300b0000 0x10000>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI7_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI7_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 12 2 0>, <&sdma2 13 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
easrc: easrc@300C0000 {
compatible = "fsl,imx8mn-easrc";
reg = <0x300C0000 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 3/5] arm64: dts: imx8mn: Add SAI nodes
@ 2020-10-19 17:45 ` Adam Ford
0 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: devicetree, Fabio Estevam, Will Deacon, Adam Ford, Sascha Hauer,
aford, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Catalin Marinas, Shawn Guo
The i.MX8M Nano has several SAI nodes available to it.
Enable them.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 7d34281332e1..9e2c0b6a7e32 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -253,6 +253,83 @@ spba-bus@30000000 {
reg = <0x30000000 0x100000>;
ranges;
+ sai2: sai@30020000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30020000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI2_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai3: sai@30030000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30030000 0x10000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI3_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai5: sai@30050000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30050000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI5_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
+ dma-names = "rx", "tx";
+ fsl,shared-interrupt;
+ fsl,dataline = <0 0xf 0xf>;
+ status = "disabled";
+ };
+
+ sai6: sai@30060000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x30060000 0x10000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI6_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ sai7: sai@300b0000 {
+ compatible = "fsl,imx8mq-sai",
+ "fsl,imx6sx-sai";
+ reg = <0x300b0000 0x10000>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_SAI7_IPG>,
+ <&clk IMX8MN_CLK_DUMMY>,
+ <&clk IMX8MN_CLK_SAI7_ROOT>,
+ <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 12 2 0>, <&sdma2 13 2 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
easrc: easrc@300C0000 {
compatible = "fsl,imx8mn-easrc";
reg = <0x300C0000 0x10000>;
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 4/5] arm64: dts: imx8mn: Add support for micfil
2020-10-19 17:45 ` Adam Ford
@ 2020-10-19 17:45 ` Adam Ford
-1 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: aford, Adam Ford, Rob Herring, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Catalin Marinas, Will Deacon, devicetree, linux-kernel
The i.MX8M Nano has supports the MICFIL digital interface.
It's a 16-bit audio signal from a PDM microphone bitstream.
The driver is already in the kernel, but the node is missing.
Add the micfil node.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9e2c0b6a7e32..3ab9486736ca 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -315,6 +315,25 @@ sai6: sai@30060000 {
status = "disabled";
};
+ micfil: micfil@30080000 {
+ compatible = "fsl,imx8mm-micfil";
+ reg = <0x30080000 0x10000>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_PDM_IPG>,
+ <&clk IMX8MN_CLK_PDM_ROOT>,
+ <&clk IMX8MN_AUDIO_PLL1_OUT>,
+ <&clk IMX8MN_AUDIO_PLL2_OUT>,
+ <&clk IMX8MN_CLK_EXT3>;
+ clock-names = "ipg_clk", "ipg_clk_app",
+ "pll8k", "pll11k", "clkext3";
+ dmas = <&sdma2 24 25 0x80000000>;
+ dma-names = "rx";
+ status = "disabled";
+ };
+
sai7: sai@300b0000 {
compatible = "fsl,imx8mq-sai",
"fsl,imx6sx-sai";
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 4/5] arm64: dts: imx8mn: Add support for micfil
@ 2020-10-19 17:45 ` Adam Ford
0 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: devicetree, Fabio Estevam, Will Deacon, Adam Ford, Sascha Hauer,
aford, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Catalin Marinas, Shawn Guo
The i.MX8M Nano has supports the MICFIL digital interface.
It's a 16-bit audio signal from a PDM microphone bitstream.
The driver is already in the kernel, but the node is missing.
Add the micfil node.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9e2c0b6a7e32..3ab9486736ca 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -315,6 +315,25 @@ sai6: sai@30060000 {
status = "disabled";
};
+ micfil: micfil@30080000 {
+ compatible = "fsl,imx8mm-micfil";
+ reg = <0x30080000 0x10000>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_PDM_IPG>,
+ <&clk IMX8MN_CLK_PDM_ROOT>,
+ <&clk IMX8MN_AUDIO_PLL1_OUT>,
+ <&clk IMX8MN_AUDIO_PLL2_OUT>,
+ <&clk IMX8MN_CLK_EXT3>;
+ clock-names = "ipg_clk", "ipg_clk_app",
+ "pll8k", "pll11k", "clkext3";
+ dmas = <&sdma2 24 25 0x80000000>;
+ dma-names = "rx";
+ status = "disabled";
+ };
+
sai7: sai@300b0000 {
compatible = "fsl,imx8mq-sai",
"fsl,imx6sx-sai";
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 5/5] arm64: dts: imx8mn: Add node for SPDIF
2020-10-19 17:45 ` Adam Ford
@ 2020-10-19 17:45 ` Adam Ford
-1 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: aford, Adam Ford, Rob Herring, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Catalin Marinas, Will Deacon, devicetree, linux-kernel
The i.MX8M Nano can support SPDIF which is compatible to the
IP used on the i.MX35.
Add the node.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 3ab9486736ca..4b32c5aa355d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -334,6 +334,30 @@ micfil: micfil@30080000 {
status = "disabled";
};
+ spdif1: spdif@30090000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x30090000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_AUDIO_AHB>, /* core */
+ <&clk IMX8MN_CLK_24M>, /* rxtx0 */
+ <&clk IMX8MN_CLK_SPDIF1>, /* rxtx1 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MN_CLK_AUDIO_AHB>, /* rxtx5 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MN_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
sai7: sai@300b0000 {
compatible = "fsl,imx8mq-sai",
"fsl,imx6sx-sai";
--
2.25.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 5/5] arm64: dts: imx8mn: Add node for SPDIF
@ 2020-10-19 17:45 ` Adam Ford
0 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-10-19 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: devicetree, Fabio Estevam, Will Deacon, Adam Ford, Sascha Hauer,
aford, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Catalin Marinas, Shawn Guo
The i.MX8M Nano can support SPDIF which is compatible to the
IP used on the i.MX35.
Add the node.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 3ab9486736ca..4b32c5aa355d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -334,6 +334,30 @@ micfil: micfil@30080000 {
status = "disabled";
};
+ spdif1: spdif@30090000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x30090000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_AUDIO_AHB>, /* core */
+ <&clk IMX8MN_CLK_24M>, /* rxtx0 */
+ <&clk IMX8MN_CLK_SPDIF1>, /* rxtx1 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx2 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx3 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx4 */
+ <&clk IMX8MN_CLK_AUDIO_AHB>, /* rxtx5 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx6 */
+ <&clk IMX8MN_CLK_DUMMY>, /* rxtx7 */
+ <&clk IMX8MN_CLK_DUMMY>; /* spba */
+ clock-names = "core", "rxtx0",
+ "rxtx1", "rxtx2",
+ "rxtx3", "rxtx4",
+ "rxtx5", "rxtx6",
+ "rxtx7", "spba";
+ dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
sai7: sai@300b0000 {
compatible = "fsl,imx8mq-sai",
"fsl,imx6sx-sai";
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 2/5] arm64: defconfig: Enable ASRC and EASRC
2020-10-19 17:45 ` Adam Ford
@ 2020-11-01 1:02 ` Shawn Guo
-1 siblings, 0 replies; 16+ messages in thread
From: Shawn Guo @ 2020-11-01 1:02 UTC (permalink / raw)
To: Adam Ford
Cc: linux-arm-kernel, aford, Rob Herring, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Catalin Marinas, Will Deacon, devicetree, linux-kernel
On Mon, Oct 19, 2020 at 12:45:25PM -0500, Adam Ford wrote:
> The i.MX8M Nano supports the EASRC driver, and it requires ASRC.
> Enable both of them as modules.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/5] arm64: defconfig: Enable ASRC and EASRC
@ 2020-11-01 1:02 ` Shawn Guo
0 siblings, 0 replies; 16+ messages in thread
From: Shawn Guo @ 2020-11-01 1:02 UTC (permalink / raw)
To: Adam Ford
Cc: devicetree, Will Deacon, Catalin Marinas, Sascha Hauer, aford,
linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
On Mon, Oct 19, 2020 at 12:45:25PM -0500, Adam Ford wrote:
> The i.MX8M Nano supports the EASRC driver, and it requires ASRC.
> Enable both of them as modules.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
Applied, thanks.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
2020-10-19 17:45 ` Adam Ford
@ 2020-11-01 2:03 ` Shawn Guo
-1 siblings, 0 replies; 16+ messages in thread
From: Shawn Guo @ 2020-11-01 2:03 UTC (permalink / raw)
To: Adam Ford
Cc: linux-arm-kernel, aford, Rob Herring, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Catalin Marinas, Will Deacon, devicetree, linux-kernel
On Mon, Oct 19, 2020 at 12:45:24PM -0500, Adam Ford wrote:
> The driver exists for the Enhanced Asynchronous Sample Rate Converter
> (EASRC) Controller, but there isn't a device tree entry for it.
>
> On the vendor kernel, they put this on a spba-bus for SDMA support.
>
> Add the the node for the spba-bus with the easrc node inside.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 746faf1cf2fb..7d34281332e1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -246,6 +246,34 @@ aips1: bus@30000000 {
> #size-cells = <1>;
> ranges;
>
> + spba-bus@30000000 {
spba: bus@30000000
> + compatible = "fsl,spba-bus", "simple-bus";
"fsl,spba-bus" is undocumented. Document it or drop it.
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x30000000 0x100000>;
> + ranges;
> +
> + easrc: easrc@300C0000 {
> + compatible = "fsl,imx8mn-easrc";
> + reg = <0x300C0000 0x10000>;
> + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> + clock-names = "mem";
> + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> + <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> + <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> + <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> + dma-names = "ctx0_rx", "ctx0_tx",
> + "ctx1_rx", "ctx1_tx",
> + "ctx2_rx", "ctx2_tx",
> + "ctx3_rx", "ctx3_tx";
> + fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
Undocumented property?
Shawn
> + fsl,asrc-rate = <8000>;
> + fsl,asrc-width = <16>;
> + status = "disabled";
> + };
> + };
> +
> gpio1: gpio@30200000 {
> compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> reg = <0x30200000 0x10000>;
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
@ 2020-11-01 2:03 ` Shawn Guo
0 siblings, 0 replies; 16+ messages in thread
From: Shawn Guo @ 2020-11-01 2:03 UTC (permalink / raw)
To: Adam Ford
Cc: devicetree, Will Deacon, Catalin Marinas, Sascha Hauer, aford,
linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
On Mon, Oct 19, 2020 at 12:45:24PM -0500, Adam Ford wrote:
> The driver exists for the Enhanced Asynchronous Sample Rate Converter
> (EASRC) Controller, but there isn't a device tree entry for it.
>
> On the vendor kernel, they put this on a spba-bus for SDMA support.
>
> Add the the node for the spba-bus with the easrc node inside.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 746faf1cf2fb..7d34281332e1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -246,6 +246,34 @@ aips1: bus@30000000 {
> #size-cells = <1>;
> ranges;
>
> + spba-bus@30000000 {
spba: bus@30000000
> + compatible = "fsl,spba-bus", "simple-bus";
"fsl,spba-bus" is undocumented. Document it or drop it.
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x30000000 0x100000>;
> + ranges;
> +
> + easrc: easrc@300C0000 {
> + compatible = "fsl,imx8mn-easrc";
> + reg = <0x300C0000 0x10000>;
> + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> + clock-names = "mem";
> + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> + <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> + <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> + <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> + dma-names = "ctx0_rx", "ctx0_tx",
> + "ctx1_rx", "ctx1_tx",
> + "ctx2_rx", "ctx2_tx",
> + "ctx3_rx", "ctx3_tx";
> + fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
Undocumented property?
Shawn
> + fsl,asrc-rate = <8000>;
> + fsl,asrc-width = <16>;
> + status = "disabled";
> + };
> + };
> +
> gpio1: gpio@30200000 {
> compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> reg = <0x30200000 0x10000>;
> --
> 2.25.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
2020-11-01 2:03 ` Shawn Guo
@ 2020-11-01 13:18 ` Adam Ford
-1 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-11-01 13:18 UTC (permalink / raw)
To: Shawn Guo
Cc: arm-soc, Adam Ford-BE, Rob Herring, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Catalin Marinas, Will Deacon, devicetree,
Linux Kernel Mailing List
On Sat, Oct 31, 2020 at 9:03 PM Shawn Guo <shawnguo@kernel.org> wrote:
>
> On Mon, Oct 19, 2020 at 12:45:24PM -0500, Adam Ford wrote:
> > The driver exists for the Enhanced Asynchronous Sample Rate Converter
> > (EASRC) Controller, but there isn't a device tree entry for it.
> >
> > On the vendor kernel, they put this on a spba-bus for SDMA support.
> >
> > Add the the node for the spba-bus with the easrc node inside.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 746faf1cf2fb..7d34281332e1 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -246,6 +246,34 @@ aips1: bus@30000000 {
> > #size-cells = <1>;
> > ranges;
> >
> > + spba-bus@30000000 {
>
> spba: bus@30000000
Go ahead and disregard my V2. I'll submit a V3. I sent the V2 before
I got this feedback.
>
> > + compatible = "fsl,spba-bus", "simple-bus";
>
> "fsl,spba-bus" is undocumented. Document it or drop it.
I just submitted a patch to document this bus. It's used on a bunch
of imx boards, so I think it's important to document it.
I assigned you as the maintainer of the binding doc since you're
listed as the maintainer of the SDMA driver which is what's using
the compatible flag. I hope that is the correct thing to do.
>
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + reg = <0x30000000 0x100000>;
> > + ranges;
> > +
> > + easrc: easrc@300C0000 {
> > + compatible = "fsl,imx8mn-easrc";
> > + reg = <0x300C0000 0x10000>;
> > + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> > + clock-names = "mem";
> > + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> > + <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> > + <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> > + <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> > + dma-names = "ctx0_rx", "ctx0_tx",
> > + "ctx1_rx", "ctx1_tx",
> > + "ctx2_rx", "ctx2_tx",
> > + "ctx3_rx", "ctx3_tx";
> > + fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
>
> Undocumented property?
That's my fault. I accidentally copied the device tree entry from the
vendor kernel instead of using the naming from the device tree binding
document.
I fixed this in my V2, but I need to send a V3 anyway.
adam
>
> Shawn
>
> > + fsl,asrc-rate = <8000>;
> > + fsl,asrc-width = <16>;
> > + status = "disabled";
> > + };
> > + };
> > +
> > gpio1: gpio@30200000 {
> > compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> > reg = <0x30200000 0x10000>;
> > --
> > 2.25.1
> >
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
@ 2020-11-01 13:18 ` Adam Ford
0 siblings, 0 replies; 16+ messages in thread
From: Adam Ford @ 2020-11-01 13:18 UTC (permalink / raw)
To: Shawn Guo
Cc: devicetree, Will Deacon, Catalin Marinas, Sascha Hauer,
Adam Ford-BE, Linux Kernel Mailing List, Rob Herring,
NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam, arm-soc
On Sat, Oct 31, 2020 at 9:03 PM Shawn Guo <shawnguo@kernel.org> wrote:
>
> On Mon, Oct 19, 2020 at 12:45:24PM -0500, Adam Ford wrote:
> > The driver exists for the Enhanced Asynchronous Sample Rate Converter
> > (EASRC) Controller, but there isn't a device tree entry for it.
> >
> > On the vendor kernel, they put this on a spba-bus for SDMA support.
> >
> > Add the the node for the spba-bus with the easrc node inside.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 746faf1cf2fb..7d34281332e1 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -246,6 +246,34 @@ aips1: bus@30000000 {
> > #size-cells = <1>;
> > ranges;
> >
> > + spba-bus@30000000 {
>
> spba: bus@30000000
Go ahead and disregard my V2. I'll submit a V3. I sent the V2 before
I got this feedback.
>
> > + compatible = "fsl,spba-bus", "simple-bus";
>
> "fsl,spba-bus" is undocumented. Document it or drop it.
I just submitted a patch to document this bus. It's used on a bunch
of imx boards, so I think it's important to document it.
I assigned you as the maintainer of the binding doc since you're
listed as the maintainer of the SDMA driver which is what's using
the compatible flag. I hope that is the correct thing to do.
>
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + reg = <0x30000000 0x100000>;
> > + ranges;
> > +
> > + easrc: easrc@300C0000 {
> > + compatible = "fsl,imx8mn-easrc";
> > + reg = <0x300C0000 0x10000>;
> > + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> > + clock-names = "mem";
> > + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> > + <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> > + <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> > + <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> > + dma-names = "ctx0_rx", "ctx0_tx",
> > + "ctx1_rx", "ctx1_tx",
> > + "ctx2_rx", "ctx2_tx",
> > + "ctx3_rx", "ctx3_tx";
> > + fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
>
> Undocumented property?
That's my fault. I accidentally copied the device tree entry from the
vendor kernel instead of using the naming from the device tree binding
document.
I fixed this in my V2, but I need to send a V3 anyway.
adam
>
> Shawn
>
> > + fsl,asrc-rate = <8000>;
> > + fsl,asrc-width = <16>;
> > + status = "disabled";
> > + };
> > + };
> > +
> > gpio1: gpio@30200000 {
> > compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> > reg = <0x30200000 0x10000>;
> > --
> > 2.25.1
> >
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2020-11-01 13:19 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-19 17:45 [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter Adam Ford
2020-10-19 17:45 ` Adam Ford
2020-10-19 17:45 ` [PATCH 2/5] arm64: defconfig: Enable ASRC and EASRC Adam Ford
2020-10-19 17:45 ` Adam Ford
2020-11-01 1:02 ` Shawn Guo
2020-11-01 1:02 ` Shawn Guo
2020-10-19 17:45 ` [PATCH 3/5] arm64: dts: imx8mn: Add SAI nodes Adam Ford
2020-10-19 17:45 ` Adam Ford
2020-10-19 17:45 ` [PATCH 4/5] arm64: dts: imx8mn: Add support for micfil Adam Ford
2020-10-19 17:45 ` Adam Ford
2020-10-19 17:45 ` [PATCH 5/5] arm64: dts: imx8mn: Add node for SPDIF Adam Ford
2020-10-19 17:45 ` Adam Ford
2020-11-01 2:03 ` [PATCH 1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter Shawn Guo
2020-11-01 2:03 ` Shawn Guo
2020-11-01 13:18 ` Adam Ford
2020-11-01 13:18 ` Adam Ford
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