* [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii @ 2020-10-27 2:40 Evan Quan 2020-10-27 2:40 ` [PATCH 2/2] drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running Evan Quan ` (2 more replies) 0 siblings, 3 replies; 10+ messages in thread From: Evan Quan @ 2020-10-27 2:40 UTC (permalink / raw) To: amd-gfx; +Cc: Alexander.Deucher, sandy.8925, Evan Quan Which can be used for S4(hibernation) support. Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34 Signed-off-by: Evan Quan <evan.quan@amd.com> --- drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++- drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ++++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c index 03ff8bd1fee8..5442df094102 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik.c +++ b/drivers/gpu/drm/amd/amdgpu/cik.c @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device *adev) switch (adev->asic_type) { case CHIP_BONAIRE: - case CHIP_HAWAII: /* disable baco reset until it works */ /* smu7_asic_get_baco_capability(adev, &baco_reset); */ baco_reset = false; break; + case CHIP_HAWAII: + baco_reset = cik_asic_supports_baco(adev); + break; default: baco_reset = false; break; diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c index 3be40114e63d..45f608838f6e 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] = { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK, BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 }, { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 }, { CMD_DELAY_MS, 0, 0, 0, 20, 0 }, - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 0xffffffff, 0x20 }, + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 0xffffffff, 0x200 }, { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK, BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 }, - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c }, + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c00 }, { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0, 0x01 }, { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK, BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 }, - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x10 }, + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x100 }, { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 }, { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 0xffffffff, 0x00 } }; @@ -155,6 +155,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] = static const struct baco_cmd_entry clean_baco_tbl[] = { { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 }, + { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }, { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 } }; -- 2.29.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running 2020-10-27 2:40 [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Evan Quan @ 2020-10-27 2:40 ` Evan Quan 2020-10-27 11:31 ` [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Sandeep 2020-10-27 14:47 ` Alex Deucher 2 siblings, 0 replies; 10+ messages in thread From: Evan Quan @ 2020-10-27 2:40 UTC (permalink / raw) To: amd-gfx; +Cc: Alexander.Deucher, sandy.8925, Evan Quan This reverts commit f87812284172a9809820d10143b573d833cd3f75 "drm/amdgpu: Fix bug where DPM is not enabled after hibernate and resume". It was intended to fix Hawaii S4(hibernation) issue but break S3. As ixFEATURE_STATUS is filled with garbage data on resume which can be only cleared by reloading smc firmware(but that will involve many changes). So, we will revert this S4 fix and seek a new way. Change-Id: If9eed2f5a9c1168fb20be92057b583d854ad779e Signed-off-by: Evan Quan <evan.quan@amd.com> --- drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c index e4d1f3d66ef4..e772e2dc98cc 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c @@ -2726,10 +2726,7 @@ static int ci_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) static bool ci_is_dpm_running(struct pp_hwmgr *hwmgr) { - return (1 == PHM_READ_INDIRECT_FIELD(hwmgr->device, - CGS_IND_REG__SMC, FEATURE_STATUS, - VOLTAGE_CONTROLLER_ON)) - ? true : false; + return ci_is_smc_ram_running(hwmgr); } static int ci_smu_init(struct pp_hwmgr *hwmgr) -- 2.29.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii 2020-10-27 2:40 [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Evan Quan 2020-10-27 2:40 ` [PATCH 2/2] drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running Evan Quan @ 2020-10-27 11:31 ` Sandeep 2020-10-27 11:34 ` Sandeep 2020-10-27 14:47 ` Alex Deucher 2 siblings, 1 reply; 10+ messages in thread From: Sandeep @ 2020-10-27 11:31 UTC (permalink / raw) To: Evan Quan; +Cc: Deucher, Alexander, amd-gfx [-- Attachment #1.1: Type: text/plain, Size: 3410 bytes --] On Tue, 27 Oct, 2020, 08:10 Evan Quan, <evan.quan@amd.com> wrote: > Which can be used for S4(hibernation) support. > > Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34 > Signed-off-by: Evan Quan <evan.quan@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++- > drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ++++--- > 2 files changed, 7 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c > b/drivers/gpu/drm/amd/amdgpu/cik.c > index 03ff8bd1fee8..5442df094102 100644 > --- a/drivers/gpu/drm/amd/amdgpu/cik.c > +++ b/drivers/gpu/drm/amd/amdgpu/cik.c > @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device *adev) > > switch (adev->asic_type) { > case CHIP_BONAIRE: > - case CHIP_HAWAII: > /* disable baco reset until it works */ > /* smu7_asic_get_baco_capability(adev, &baco_reset); */ > baco_reset = false; > break; > + case CHIP_HAWAII: > + baco_reset = cik_asic_supports_baco(adev); > + break; > default: > baco_reset = false; > break; > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c > b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c > index 3be40114e63d..45f608838f6e 100644 > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c > @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] = > { CMD_READMODIFYWRITE, mmBACO_CNTL, > BACO_CNTL__BACO_BCLK_OFF_MASK, BACO_CNTL__BACO_BCLK_OFF__SHIFT, > 0, 0x00 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, > BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, > 0, 0x00 }, > { CMD_DELAY_MS, 0, 0, 0, 20, 0 }, > - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, > 0xffffffff, 0x20 }, > + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, > 0xffffffff, 0x200 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK, > BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 }, > - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c }, > + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c00 > }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, > BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0, > 0x01 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK, > BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 }, > - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, > 0, 5, 0x10 }, > + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, > 0, 5, 0x100 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, > BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 }, > { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, > 0xffffffff, 0x00 } > }; > @@ -155,6 +155,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] = > static const struct baco_cmd_entry clean_baco_tbl[] = > { > { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 }, > + { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }, > { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 } > }; > > -- > 2.29.0 > Not sure why I'm cc'd on this, I'm not a maintainer, nor does this patch seem related to any patches I've contributed. - Sandeep > [-- Attachment #1.2: Type: text/html, Size: 4374 bytes --] [-- Attachment #2: Type: text/plain, Size: 154 bytes --] _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii 2020-10-27 11:31 ` [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Sandeep @ 2020-10-27 11:34 ` Sandeep 2020-10-27 14:32 ` Sandeep 0 siblings, 1 reply; 10+ messages in thread From: Sandeep @ 2020-10-27 11:34 UTC (permalink / raw) To: Evan Quan; +Cc: Deucher, Alexander, amd-gfx [-- Attachment #1.1: Type: text/plain, Size: 3682 bytes --] On Tue, 27 Oct, 2020, 17:01 Sandeep, <sandy.8925@gmail.com> wrote: > > On Tue, 27 Oct, 2020, 08:10 Evan Quan, <evan.quan@amd.com> wrote: > >> Which can be used for S4(hibernation) support. >> >> Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34 >> Signed-off-by: Evan Quan <evan.quan@amd.com> >> --- >> drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++- >> drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ++++--- >> 2 files changed, 7 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c >> b/drivers/gpu/drm/amd/amdgpu/cik.c >> index 03ff8bd1fee8..5442df094102 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/cik.c >> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c >> @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device *adev) >> >> switch (adev->asic_type) { >> case CHIP_BONAIRE: >> - case CHIP_HAWAII: >> /* disable baco reset until it works */ >> /* smu7_asic_get_baco_capability(adev, &baco_reset); */ >> baco_reset = false; >> break; >> + case CHIP_HAWAII: >> + baco_reset = cik_asic_supports_baco(adev); >> + break; >> default: >> baco_reset = false; >> break; >> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >> index 3be40114e63d..45f608838f6e 100644 >> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >> @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] = >> { CMD_READMODIFYWRITE, mmBACO_CNTL, >> BACO_CNTL__BACO_BCLK_OFF_MASK, BACO_CNTL__BACO_BCLK_OFF__SHIFT, >> 0, 0x00 }, >> { CMD_READMODIFYWRITE, mmBACO_CNTL, >> BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, >> 0, 0x00 }, >> { CMD_DELAY_MS, 0, 0, 0, 20, 0 }, >> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, >> 0xffffffff, 0x20 }, >> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, >> 0xffffffff, 0x200 }, >> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK, >> BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 }, >> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c }, >> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c00 >> }, >> { CMD_READMODIFYWRITE, mmBACO_CNTL, >> BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0, >> 0x01 }, >> { CMD_READMODIFYWRITE, mmBACO_CNTL, >> BACO_CNTL__BACO_RESET_EN_MASK, BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 }, >> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, >> 0, 5, 0x10 }, >> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, >> 0, 5, 0x100 }, >> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, >> BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 }, >> { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, >> 0xffffffff, 0x00 } >> }; >> @@ -155,6 +155,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] = >> static const struct baco_cmd_entry clean_baco_tbl[] = >> { >> { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 }, >> + { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }, >> { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 } >> }; >> >> -- >> 2.29.0 >> > > > Not sure why I'm cc'd on this, I'm not a maintainer, nor does this patch > seem related to any patches I've contributed. > > - Sandeep > Ok, I just saw the other email. I'll try testing the patch and see if it fixes the hibernation bug. - Sandeep > [-- Attachment #1.2: Type: text/html, Size: 5163 bytes --] [-- Attachment #2: Type: text/plain, Size: 154 bytes --] _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii 2020-10-27 11:34 ` Sandeep @ 2020-10-27 14:32 ` Sandeep 2020-10-28 1:31 ` Quan, Evan 0 siblings, 1 reply; 10+ messages in thread From: Sandeep @ 2020-10-27 14:32 UTC (permalink / raw) To: Evan Quan; +Cc: Deucher, Alexander, amd-gfx On Tue, 27 Oct 2020 at 17:04, Sandeep <sandy.8925@gmail.com> wrote: > > > > On Tue, 27 Oct, 2020, 17:01 Sandeep, <sandy.8925@gmail.com> wrote: >> >> >> On Tue, 27 Oct, 2020, 08:10 Evan Quan, <evan.quan@amd.com> wrote: >>> >>> Which can be used for S4(hibernation) support. >>> >>> Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34 >>> Signed-off-by: Evan Quan <evan.quan@amd.com> >>> --- >>> drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++- >>> drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ++++--- >>> 2 files changed, 7 insertions(+), 4 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c >>> index 03ff8bd1fee8..5442df094102 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/cik.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c >>> @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device *adev) >>> >>> switch (adev->asic_type) { >>> case CHIP_BONAIRE: >>> - case CHIP_HAWAII: >>> /* disable baco reset until it works */ >>> /* smu7_asic_get_baco_capability(adev, &baco_reset); */ >>> baco_reset = false; >>> break; >>> + case CHIP_HAWAII: >>> + baco_reset = cik_asic_supports_baco(adev); >>> + break; >>> default: >>> baco_reset = false; >>> break; >>> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> index 3be40114e63d..45f608838f6e 100644 >>> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] = >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK, BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 }, >>> { CMD_DELAY_MS, 0, 0, 0, 20, 0 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 0xffffffff, 0x20 }, >>> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 0xffffffff, 0x200 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK, BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c }, >>> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c00 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0, 0x01 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK, BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x10 }, >>> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x100 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 }, >>> { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 0xffffffff, 0x00 } >>> }; >>> @@ -155,6 +155,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] = >>> static const struct baco_cmd_entry clean_baco_tbl[] = >>> { >>> { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 }, >>> + { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }, >>> { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 } >>> }; >>> >>> -- >>> 2.29.0 >> >> >> >> Not sure why I'm cc'd on this, I'm not a maintainer, nor does this patch seem related to any patches I've contributed. >> >> - Sandeep > > > Ok, I just saw the other email. I'll try testing the patch and see if it fixes the hibernation bug. > > - Sandeep I tested and while suspend works correctly, hibernation is completely broken. The system fails to resume from hibernation which is much worse than before. - Sandeep _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii 2020-10-27 14:32 ` Sandeep @ 2020-10-28 1:31 ` Quan, Evan 2020-10-28 8:33 ` Quan, Evan 2020-10-28 14:10 ` Sandeep 0 siblings, 2 replies; 10+ messages in thread From: Quan, Evan @ 2020-10-28 1:31 UTC (permalink / raw) To: Sandeep; +Cc: Deucher, Alexander, amd-gfx [AMD Official Use Only - Internal Distribution Only] Hi Sandeep, Did you run the tests on Hawaii? And can you help to confirm which method is used for gpu reset? "BACO reset" or " PCI CONFIG reset" (you can grep these keywords in dmesg)? BR Evan -----Original Message----- From: Sandeep <sandy.8925@gmail.com> Sent: Tuesday, October 27, 2020 10:33 PM To: Quan, Evan <Evan.Quan@amd.com> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii On Tue, 27 Oct 2020 at 17:04, Sandeep <sandy.8925@gmail.com> wrote: > > > > On Tue, 27 Oct, 2020, 17:01 Sandeep, <sandy.8925@gmail.com> wrote: >> >> >> On Tue, 27 Oct, 2020, 08:10 Evan Quan, <evan.quan@amd.com> wrote: >>> >>> Which can be used for S4(hibernation) support. >>> >>> Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34 >>> Signed-off-by: Evan Quan <evan.quan@amd.com> >>> --- >>> drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++- >>> drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ++++--- >>> 2 files changed, 7 insertions(+), 4 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c >>> b/drivers/gpu/drm/amd/amdgpu/cik.c >>> index 03ff8bd1fee8..5442df094102 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/cik.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c >>> @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device >>> *adev) >>> >>> switch (adev->asic_type) { >>> case CHIP_BONAIRE: >>> - case CHIP_HAWAII: >>> /* disable baco reset until it works */ >>> /* smu7_asic_get_baco_capability(adev, &baco_reset); */ >>> baco_reset = false; >>> break; >>> + case CHIP_HAWAII: >>> + baco_reset = cik_asic_supports_baco(adev); >>> + break; >>> default: >>> baco_reset = false; >>> break; >>> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> index 3be40114e63d..45f608838f6e 100644 >>> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] = >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK, BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 }, >>> { CMD_DELAY_MS, 0, 0, 0, 20, 0 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 0xffffffff, 0x20 }, >>> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, >>> + 0xffffffff, 0x200 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK, BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c }, >>> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, >>> + 0x1c00 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0, 0x01 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK, BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x10 }, >>> + { CMD_WAITFOR, mmBACO_CNTL, >>> + BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x100 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 }, >>> { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, >>> 0xffffffff, 0x00 } }; @@ -155,6 +155,7 @@ static const struct >>> baco_cmd_entry exit_baco_tbl[] = static const struct baco_cmd_entry >>> clean_baco_tbl[] = { >>> { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 }, >>> + { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }, >>> { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 } }; >>> >>> -- >>> 2.29.0 >> >> >> >> Not sure why I'm cc'd on this, I'm not a maintainer, nor does this patch seem related to any patches I've contributed. >> >> - Sandeep > > > Ok, I just saw the other email. I'll try testing the patch and see if it fixes the hibernation bug. > > - Sandeep I tested and while suspend works correctly, hibernation is completely broken. The system fails to resume from hibernation which is much worse than before. - Sandeep _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii 2020-10-28 1:31 ` Quan, Evan @ 2020-10-28 8:33 ` Quan, Evan 2020-10-28 15:06 ` Sandeep 2020-10-28 14:10 ` Sandeep 1 sibling, 1 reply; 10+ messages in thread From: Quan, Evan @ 2020-10-28 8:33 UTC (permalink / raw) To: Sandeep; +Cc: Deucher, Alexander, amd-gfx [AMD Official Use Only - Internal Distribution Only] If it turns out "PCI CONFIG reset" is used, please try the new patch series I just sent. https://lists.freedesktop.org/archives/amd-gfx/2020-October/055327.html https://lists.freedesktop.org/archives/amd-gfx/2020-October/055328.html https://lists.freedesktop.org/archives/amd-gfx/2020-October/055329.html https://lists.freedesktop.org/archives/amd-gfx/2020-October/055330.html https://lists.freedesktop.org/archives/amd-gfx/2020-October/055331.html BR Evan -----Original Message----- From: Quan, Evan Sent: Wednesday, October 28, 2020 9:31 AM To: Sandeep <sandy.8925@gmail.com> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: RE: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Hi Sandeep, Did you run the tests on Hawaii? And can you help to confirm which method is used for gpu reset? "BACO reset" or " PCI CONFIG reset" (you can grep these keywords in dmesg)? BR Evan -----Original Message----- From: Sandeep <sandy.8925@gmail.com> Sent: Tuesday, October 27, 2020 10:33 PM To: Quan, Evan <Evan.Quan@amd.com> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher@amd.com> Subject: Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii On Tue, 27 Oct 2020 at 17:04, Sandeep <sandy.8925@gmail.com> wrote: > > > > On Tue, 27 Oct, 2020, 17:01 Sandeep, <sandy.8925@gmail.com> wrote: >> >> >> On Tue, 27 Oct, 2020, 08:10 Evan Quan, <evan.quan@amd.com> wrote: >>> >>> Which can be used for S4(hibernation) support. >>> >>> Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34 >>> Signed-off-by: Evan Quan <evan.quan@amd.com> >>> --- >>> drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++- >>> drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ++++--- >>> 2 files changed, 7 insertions(+), 4 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c >>> b/drivers/gpu/drm/amd/amdgpu/cik.c >>> index 03ff8bd1fee8..5442df094102 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/cik.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c >>> @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device >>> *adev) >>> >>> switch (adev->asic_type) { >>> case CHIP_BONAIRE: >>> - case CHIP_HAWAII: >>> /* disable baco reset until it works */ >>> /* smu7_asic_get_baco_capability(adev, &baco_reset); */ >>> baco_reset = false; >>> break; >>> + case CHIP_HAWAII: >>> + baco_reset = cik_asic_supports_baco(adev); >>> + break; >>> default: >>> baco_reset = false; >>> break; >>> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> index 3be40114e63d..45f608838f6e 100644 >>> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c >>> @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] = >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK, BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 }, >>> { CMD_DELAY_MS, 0, 0, 0, 20, 0 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 0xffffffff, 0x20 }, >>> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, >>> + 0xffffffff, 0x200 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK, BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c }, >>> + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, >>> + 0x1c00 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0, 0x01 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK, BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 }, >>> - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x10 }, >>> + { CMD_WAITFOR, mmBACO_CNTL, >>> + BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x100 }, >>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 }, >>> { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, >>> 0xffffffff, 0x00 } }; @@ -155,6 +155,7 @@ static const struct >>> baco_cmd_entry exit_baco_tbl[] = static const struct baco_cmd_entry >>> clean_baco_tbl[] = { >>> { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 }, >>> + { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }, >>> { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 } }; >>> >>> -- >>> 2.29.0 >> >> >> >> Not sure why I'm cc'd on this, I'm not a maintainer, nor does this patch seem related to any patches I've contributed. >> >> - Sandeep > > > Ok, I just saw the other email. I'll try testing the patch and see if it fixes the hibernation bug. > > - Sandeep I tested and while suspend works correctly, hibernation is completely broken. The system fails to resume from hibernation which is much worse than before. - Sandeep _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii 2020-10-28 8:33 ` Quan, Evan @ 2020-10-28 15:06 ` Sandeep 0 siblings, 0 replies; 10+ messages in thread From: Sandeep @ 2020-10-28 15:06 UTC (permalink / raw) To: Quan, Evan; +Cc: Deucher, Alexander, amd-gfx On Wed, 28 Oct 2020 at 14:03, Quan, Evan <Evan.Quan@amd.com> wrote: > > [AMD Official Use Only - Internal Distribution Only] > > If it turns out "PCI CONFIG reset" is used, please try the new patch series I just sent. > https://lists.freedesktop.org/archives/amd-gfx/2020-October/055327.html > https://lists.freedesktop.org/archives/amd-gfx/2020-October/055328.html > https://lists.freedesktop.org/archives/amd-gfx/2020-October/055329.html > https://lists.freedesktop.org/archives/amd-gfx/2020-October/055330.html > https://lists.freedesktop.org/archives/amd-gfx/2020-October/055331.html > > BR > Evan I tested out this patchset, and can confirm that both suspend and hibernate work as expected. - Sandeep _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii 2020-10-28 1:31 ` Quan, Evan 2020-10-28 8:33 ` Quan, Evan @ 2020-10-28 14:10 ` Sandeep 1 sibling, 0 replies; 10+ messages in thread From: Sandeep @ 2020-10-28 14:10 UTC (permalink / raw) To: Quan, Evan; +Cc: Deucher, Alexander, amd-gfx On Wed, 28 Oct 2020 at 07:01, Quan, Evan <Evan.Quan@amd.com> wrote: > > [AMD Official Use Only - Internal Distribution Only] > > Hi Sandeep, > > Did you run the tests on Hawaii? > And can you help to confirm which method is used for gpu reset? "BACO reset" or " PCI CONFIG reset" (you can grep these keywords in dmesg)? > > BR > Evan Yes, I ran the tests on Hawaii. The reset method isn't printed out in dmesg. Is it only printed out during hibernate? When I run the kernel with the above patch, the computer hangs when I attempt to hibernate, and kernel logs don't get written to disk, so I'm unable to figure out which method it's using with your patches. However, I did look at the reset method for earlier kernels, and I believe it's using the PCI config reset method. I will try your other patchset to see if it fixes the issue. - Sandeep _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii 2020-10-27 2:40 [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Evan Quan 2020-10-27 2:40 ` [PATCH 2/2] drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running Evan Quan 2020-10-27 11:31 ` [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Sandeep @ 2020-10-27 14:47 ` Alex Deucher 2 siblings, 0 replies; 10+ messages in thread From: Alex Deucher @ 2020-10-27 14:47 UTC (permalink / raw) To: Evan Quan; +Cc: Deucher, Alexander, Sandeep, amd-gfx list On Mon, Oct 26, 2020 at 10:43 PM Evan Quan <evan.quan@amd.com> wrote: > > Which can be used for S4(hibernation) support. > > Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34 > Signed-off-by: Evan Quan <evan.quan@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++- > drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ++++--- > 2 files changed, 7 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c > index 03ff8bd1fee8..5442df094102 100644 > --- a/drivers/gpu/drm/amd/amdgpu/cik.c > +++ b/drivers/gpu/drm/amd/amdgpu/cik.c > @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device *adev) > > switch (adev->asic_type) { > case CHIP_BONAIRE: > - case CHIP_HAWAII: > /* disable baco reset until it works */ > /* smu7_asic_get_baco_capability(adev, &baco_reset); */ > baco_reset = false; > break; > + case CHIP_HAWAII: > + baco_reset = cik_asic_supports_baco(adev); > + break; > default: > baco_reset = false; > break; > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c > index 3be40114e63d..45f608838f6e 100644 > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c > @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] = > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK, BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 }, > { CMD_DELAY_MS, 0, 0, 0, 20, 0 }, > - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 0xffffffff, 0x20 }, > + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 0xffffffff, 0x200 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK, BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 }, > - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c }, > + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c00 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0, 0x01 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK, BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 }, > - { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x10 }, > + { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 5, 0x100 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 }, > { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 0xffffffff, 0x00 } > }; > @@ -155,6 +155,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] = > static const struct baco_cmd_entry clean_baco_tbl[] = > { > { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 }, > + { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 }, > { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 } > }; The changes to this file look like a bug fix. Can you break that out as a separate patch? Alex > > -- > 2.29.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-10-28 15:07 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-10-27 2:40 [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Evan Quan 2020-10-27 2:40 ` [PATCH 2/2] drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running Evan Quan 2020-10-27 11:31 ` [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii Sandeep 2020-10-27 11:34 ` Sandeep 2020-10-27 14:32 ` Sandeep 2020-10-28 1:31 ` Quan, Evan 2020-10-28 8:33 ` Quan, Evan 2020-10-28 15:06 ` Sandeep 2020-10-28 14:10 ` Sandeep 2020-10-27 14:47 ` Alex Deucher
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