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* [PATCH] pinctrl: Remove hole in pinctrl_gpio_range
@ 2020-10-28 14:51 ` Geert Uytterhoeven
  0 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2020-10-28 14:51 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Heiko Stuebner, linux-gpio, linux-rockchip, linux-kernel,
	Geert Uytterhoeven

On 64-bit platforms, pointer size and alignment are 64-bit, hence two
4-byte holes are present before the pins and gc members of the
pinctrl_gpio_range structure.  Get rid of these holes by moving the
pins pointer.

This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Compile-tested only (arm/multi_v7_defconfig and arm64/defconfig).
---
 include/linux/pinctrl/pinctrl.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h
index 2aef59df93d70550..70b45d28e7a9293b 100644
--- a/include/linux/pinctrl/pinctrl.h
+++ b/include/linux/pinctrl/pinctrl.h
@@ -51,8 +51,8 @@ struct pinctrl_pin_desc {
  * @id: an ID number for the chip in this range
  * @base: base offset of the GPIO range
  * @pin_base: base pin number of the GPIO range if pins == NULL
- * @pins: enumeration of pins in GPIO range or NULL
  * @npins: number of pins in the GPIO range, including the base number
+ * @pins: enumeration of pins in GPIO range or NULL
  * @gc: an optional pointer to a gpio_chip
  */
 struct pinctrl_gpio_range {
@@ -61,8 +61,8 @@ struct pinctrl_gpio_range {
 	unsigned int id;
 	unsigned int base;
 	unsigned int pin_base;
-	unsigned const *pins;
 	unsigned int npins;
+	unsigned const *pins;
 	struct gpio_chip *gc;
 };
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH] pinctrl: Remove hole in pinctrl_gpio_range
@ 2020-10-28 14:51 ` Geert Uytterhoeven
  0 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2020-10-28 14:51 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-gpio, Geert Uytterhoeven, Heiko Stuebner, linux-kernel,
	linux-rockchip

On 64-bit platforms, pointer size and alignment are 64-bit, hence two
4-byte holes are present before the pins and gc members of the
pinctrl_gpio_range structure.  Get rid of these holes by moving the
pins pointer.

This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Compile-tested only (arm/multi_v7_defconfig and arm64/defconfig).
---
 include/linux/pinctrl/pinctrl.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h
index 2aef59df93d70550..70b45d28e7a9293b 100644
--- a/include/linux/pinctrl/pinctrl.h
+++ b/include/linux/pinctrl/pinctrl.h
@@ -51,8 +51,8 @@ struct pinctrl_pin_desc {
  * @id: an ID number for the chip in this range
  * @base: base offset of the GPIO range
  * @pin_base: base pin number of the GPIO range if pins == NULL
- * @pins: enumeration of pins in GPIO range or NULL
  * @npins: number of pins in the GPIO range, including the base number
+ * @pins: enumeration of pins in GPIO range or NULL
  * @gc: an optional pointer to a gpio_chip
  */
 struct pinctrl_gpio_range {
@@ -61,8 +61,8 @@ struct pinctrl_gpio_range {
 	unsigned int id;
 	unsigned int base;
 	unsigned int pin_base;
-	unsigned const *pins;
 	unsigned int npins;
+	unsigned const *pins;
 	struct gpio_chip *gc;
 };
 
-- 
2.25.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] pinctrl: Remove hole in pinctrl_gpio_range
  2020-10-28 14:51 ` Geert Uytterhoeven
@ 2020-11-05 13:57   ` Linus Walleij
  -1 siblings, 0 replies; 6+ messages in thread
From: Linus Walleij @ 2020-11-05 13:57 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Heiko Stuebner, open list:GPIO SUBSYSTEM,
	open list:ARM/Rockchip SoC...,
	linux-kernel

On Wed, Oct 28, 2020 at 3:51 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:

> On 64-bit platforms, pointer size and alignment are 64-bit, hence two
> 4-byte holes are present before the pins and gc members of the
> pinctrl_gpio_range structure.  Get rid of these holes by moving the
> pins pointer.
>
> This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Compile-tested only (arm/multi_v7_defconfig and arm64/defconfig).

Patch applied.

Do you think it'd be worth it to add a check to checkpatch to suggest
to move pointers toward the end of any struct?

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] pinctrl: Remove hole in pinctrl_gpio_range
@ 2020-11-05 13:57   ` Linus Walleij
  0 siblings, 0 replies; 6+ messages in thread
From: Linus Walleij @ 2020-11-05 13:57 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: open list:GPIO SUBSYSTEM, Heiko Stuebner, linux-kernel,
	open list:ARM/Rockchip SoC...

On Wed, Oct 28, 2020 at 3:51 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:

> On 64-bit platforms, pointer size and alignment are 64-bit, hence two
> 4-byte holes are present before the pins and gc members of the
> pinctrl_gpio_range structure.  Get rid of these holes by moving the
> pins pointer.
>
> This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Compile-tested only (arm/multi_v7_defconfig and arm64/defconfig).

Patch applied.

Do you think it'd be worth it to add a check to checkpatch to suggest
to move pointers toward the end of any struct?

Yours,
Linus Walleij

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] pinctrl: Remove hole in pinctrl_gpio_range
  2020-11-05 13:57   ` Linus Walleij
@ 2020-11-05 14:54     ` Robin Murphy
  -1 siblings, 0 replies; 6+ messages in thread
From: Robin Murphy @ 2020-11-05 14:54 UTC (permalink / raw)
  To: Linus Walleij, Geert Uytterhoeven
  Cc: open list:GPIO SUBSYSTEM, Heiko Stuebner, linux-kernel,
	open list:ARM/Rockchip SoC...

On 2020-11-05 13:57, Linus Walleij wrote:
> On Wed, Oct 28, 2020 at 3:51 PM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> 
>> On 64-bit platforms, pointer size and alignment are 64-bit, hence two
>> 4-byte holes are present before the pins and gc members of the
>> pinctrl_gpio_range structure.  Get rid of these holes by moving the
>> pins pointer.
>>
>> This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.
>>
>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> ---
>> Compile-tested only (arm/multi_v7_defconfig and arm64/defconfig).
> 
> Patch applied.
> 
> Do you think it'd be worth it to add a check to checkpatch to suggest
> to move pointers toward the end of any struct?

For a general rule, I thought that ordering struct members largest-first 
was the conventional wisdom, since that way no sensible compiler would 
add padding between any members, only at the end?

That said, the trouble with any checkpatch rule is that people will 
inevitably try to apply it indiscriminately. With structure layout, that 
could often end up hurting readability and/or performance (via cache 
effects), while in many cases making no actual difference to the overall 
size anyway.

Robin.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] pinctrl: Remove hole in pinctrl_gpio_range
@ 2020-11-05 14:54     ` Robin Murphy
  0 siblings, 0 replies; 6+ messages in thread
From: Robin Murphy @ 2020-11-05 14:54 UTC (permalink / raw)
  To: Linus Walleij, Geert Uytterhoeven
  Cc: open list:GPIO SUBSYSTEM, open list:ARM/Rockchip SoC...,
	Heiko Stuebner, linux-kernel

On 2020-11-05 13:57, Linus Walleij wrote:
> On Wed, Oct 28, 2020 at 3:51 PM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> 
>> On 64-bit platforms, pointer size and alignment are 64-bit, hence two
>> 4-byte holes are present before the pins and gc members of the
>> pinctrl_gpio_range structure.  Get rid of these holes by moving the
>> pins pointer.
>>
>> This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.
>>
>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> ---
>> Compile-tested only (arm/multi_v7_defconfig and arm64/defconfig).
> 
> Patch applied.
> 
> Do you think it'd be worth it to add a check to checkpatch to suggest
> to move pointers toward the end of any struct?

For a general rule, I thought that ordering struct members largest-first 
was the conventional wisdom, since that way no sensible compiler would 
add padding between any members, only at the end?

That said, the trouble with any checkpatch rule is that people will 
inevitably try to apply it indiscriminately. With structure layout, that 
could often end up hurting readability and/or performance (via cache 
effects), while in many cases making no actual difference to the overall 
size anyway.

Robin.

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2020-11-05 14:54 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-28 14:51 [PATCH] pinctrl: Remove hole in pinctrl_gpio_range Geert Uytterhoeven
2020-10-28 14:51 ` Geert Uytterhoeven
2020-11-05 13:57 ` Linus Walleij
2020-11-05 13:57   ` Linus Walleij
2020-11-05 14:54   ` Robin Murphy
2020-11-05 14:54     ` Robin Murphy

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