From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Peter De Schrijver <pdeschrijver@nvidia.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, Mikko Perttunen <cyndis@kapsi.fi>, Viresh Kumar <vireshk@kernel.org>, Peter Geis <pgwipeout@gmail.com>, Nicolas Chauvet <kwizart@gmail.com>, Krzysztof Kozlowski <krzk@kernel.org> Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v7 19/47] dt-bindings: memory: tegra124: Add memory client IDs Date: Wed, 4 Nov 2020 19:48:55 +0300 [thread overview] Message-ID: <20201104164923.21238-20-digetx@gmail.com> (raw) In-Reply-To: <20201104164923.21238-1-digetx@gmail.com> Each memory client has unique hardware ID, add these IDs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- include/dt-bindings/memory/tegra124-mc.h | 68 ++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/include/dt-bindings/memory/tegra124-mc.h b/include/dt-bindings/memory/tegra124-mc.h index 186e6b7e9b35..7e73bb400eca 100644 --- a/include/dt-bindings/memory/tegra124-mc.h +++ b/include/dt-bindings/memory/tegra124-mc.h @@ -54,4 +54,72 @@ #define TEGRA124_MC_RESET_ISP2B 22 #define TEGRA124_MC_RESET_GPU 23 +#define TEGRA124_MC_PTCR 0 +#define TEGRA124_MC_DISPLAY0A 1 +#define TEGRA124_MC_DISPLAY0AB 2 +#define TEGRA124_MC_DISPLAY0B 3 +#define TEGRA124_MC_DISPLAY0BB 4 +#define TEGRA124_MC_DISPLAY0C 5 +#define TEGRA124_MC_DISPLAY0CB 6 +#define TEGRA124_MC_AFIR 14 +#define TEGRA124_MC_AVPCARM7R 15 +#define TEGRA124_MC_DISPLAYHC 16 +#define TEGRA124_MC_DISPLAYHCB 17 +#define TEGRA124_MC_HDAR 21 +#define TEGRA124_MC_HOST1XDMAR 22 +#define TEGRA124_MC_HOST1XR 23 +#define TEGRA124_MC_MSENCSRD 28 +#define TEGRA124_MC_PPCSAHBDMAR 29 +#define TEGRA124_MC_PPCSAHBSLVR 30 +#define TEGRA124_MC_SATAR 31 +#define TEGRA124_MC_VDEBSEVR 34 +#define TEGRA124_MC_VDEMBER 35 +#define TEGRA124_MC_VDEMCER 36 +#define TEGRA124_MC_VDETPER 37 +#define TEGRA124_MC_MPCORELPR 38 +#define TEGRA124_MC_MPCORER 39 +#define TEGRA124_MC_MSENCSWR 43 +#define TEGRA124_MC_AFIW 49 +#define TEGRA124_MC_AVPCARM7W 50 +#define TEGRA124_MC_HDAW 53 +#define TEGRA124_MC_HOST1XW 54 +#define TEGRA124_MC_MPCORELPW 56 +#define TEGRA124_MC_MPCOREW 57 +#define TEGRA124_MC_PPCSAHBDMAW 59 +#define TEGRA124_MC_PPCSAHBSLVW 60 +#define TEGRA124_MC_SATAW 61 +#define TEGRA124_MC_VDEBSEVW 62 +#define TEGRA124_MC_VDEDBGW 63 +#define TEGRA124_MC_VDEMBEW 64 +#define TEGRA124_MC_VDETPMW 65 +#define TEGRA124_MC_ISPRA 68 +#define TEGRA124_MC_ISPWA 70 +#define TEGRA124_MC_ISPWB 71 +#define TEGRA124_MC_XUSB_HOSTR 74 +#define TEGRA124_MC_XUSB_HOSTW 75 +#define TEGRA124_MC_XUSB_DEVR 76 +#define TEGRA124_MC_XUSB_DEVW 77 +#define TEGRA124_MC_ISPRAB 78 +#define TEGRA124_MC_ISPWAB 80 +#define TEGRA124_MC_ISPWBB 81 +#define TEGRA124_MC_TSECSRD 84 +#define TEGRA124_MC_TSECSWR 85 +#define TEGRA124_MC_A9AVPSCR 86 +#define TEGRA124_MC_A9AVPSCW 87 +#define TEGRA124_MC_GPUSRD 88 +#define TEGRA124_MC_GPUSWR 89 +#define TEGRA124_MC_DISPLAYT 90 +#define TEGRA124_MC_SDMMCRA 96 +#define TEGRA124_MC_SDMMCRAA 97 +#define TEGRA124_MC_SDMMCR 98 +#define TEGRA124_MC_SDMMCRAB 99 +#define TEGRA124_MC_SDMMCWA 100 +#define TEGRA124_MC_SDMMCWAA 101 +#define TEGRA124_MC_SDMMCW 102 +#define TEGRA124_MC_SDMMCWAB 103 +#define TEGRA124_MC_VICSRD 108 +#define TEGRA124_MC_VICSWR 109 +#define TEGRA124_MC_VIW 114 +#define TEGRA124_MC_DISPLAYD 115 + #endif -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Peter De Schrijver <pdeschrijver@nvidia.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, Mikko Perttunen <cyndis@kapsi.fi>, Viresh Kumar <vireshk@kernel.org>, Peter Geis <pgwipeout@gmail.com>, Nicolas Chauvet <kwizart@gmail.com>, Krzysztof Kozlowski <krzk@kernel.org> Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Subject: [PATCH v7 19/47] dt-bindings: memory: tegra124: Add memory client IDs Date: Wed, 4 Nov 2020 19:48:55 +0300 [thread overview] Message-ID: <20201104164923.21238-20-digetx@gmail.com> (raw) In-Reply-To: <20201104164923.21238-1-digetx@gmail.com> Each memory client has unique hardware ID, add these IDs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- include/dt-bindings/memory/tegra124-mc.h | 68 ++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/include/dt-bindings/memory/tegra124-mc.h b/include/dt-bindings/memory/tegra124-mc.h index 186e6b7e9b35..7e73bb400eca 100644 --- a/include/dt-bindings/memory/tegra124-mc.h +++ b/include/dt-bindings/memory/tegra124-mc.h @@ -54,4 +54,72 @@ #define TEGRA124_MC_RESET_ISP2B 22 #define TEGRA124_MC_RESET_GPU 23 +#define TEGRA124_MC_PTCR 0 +#define TEGRA124_MC_DISPLAY0A 1 +#define TEGRA124_MC_DISPLAY0AB 2 +#define TEGRA124_MC_DISPLAY0B 3 +#define TEGRA124_MC_DISPLAY0BB 4 +#define TEGRA124_MC_DISPLAY0C 5 +#define TEGRA124_MC_DISPLAY0CB 6 +#define TEGRA124_MC_AFIR 14 +#define TEGRA124_MC_AVPCARM7R 15 +#define TEGRA124_MC_DISPLAYHC 16 +#define TEGRA124_MC_DISPLAYHCB 17 +#define TEGRA124_MC_HDAR 21 +#define TEGRA124_MC_HOST1XDMAR 22 +#define TEGRA124_MC_HOST1XR 23 +#define TEGRA124_MC_MSENCSRD 28 +#define TEGRA124_MC_PPCSAHBDMAR 29 +#define TEGRA124_MC_PPCSAHBSLVR 30 +#define TEGRA124_MC_SATAR 31 +#define TEGRA124_MC_VDEBSEVR 34 +#define TEGRA124_MC_VDEMBER 35 +#define TEGRA124_MC_VDEMCER 36 +#define TEGRA124_MC_VDETPER 37 +#define TEGRA124_MC_MPCORELPR 38 +#define TEGRA124_MC_MPCORER 39 +#define TEGRA124_MC_MSENCSWR 43 +#define TEGRA124_MC_AFIW 49 +#define TEGRA124_MC_AVPCARM7W 50 +#define TEGRA124_MC_HDAW 53 +#define TEGRA124_MC_HOST1XW 54 +#define TEGRA124_MC_MPCORELPW 56 +#define TEGRA124_MC_MPCOREW 57 +#define TEGRA124_MC_PPCSAHBDMAW 59 +#define TEGRA124_MC_PPCSAHBSLVW 60 +#define TEGRA124_MC_SATAW 61 +#define TEGRA124_MC_VDEBSEVW 62 +#define TEGRA124_MC_VDEDBGW 63 +#define TEGRA124_MC_VDEMBEW 64 +#define TEGRA124_MC_VDETPMW 65 +#define TEGRA124_MC_ISPRA 68 +#define TEGRA124_MC_ISPWA 70 +#define TEGRA124_MC_ISPWB 71 +#define TEGRA124_MC_XUSB_HOSTR 74 +#define TEGRA124_MC_XUSB_HOSTW 75 +#define TEGRA124_MC_XUSB_DEVR 76 +#define TEGRA124_MC_XUSB_DEVW 77 +#define TEGRA124_MC_ISPRAB 78 +#define TEGRA124_MC_ISPWAB 80 +#define TEGRA124_MC_ISPWBB 81 +#define TEGRA124_MC_TSECSRD 84 +#define TEGRA124_MC_TSECSWR 85 +#define TEGRA124_MC_A9AVPSCR 86 +#define TEGRA124_MC_A9AVPSCW 87 +#define TEGRA124_MC_GPUSRD 88 +#define TEGRA124_MC_GPUSWR 89 +#define TEGRA124_MC_DISPLAYT 90 +#define TEGRA124_MC_SDMMCRA 96 +#define TEGRA124_MC_SDMMCRAA 97 +#define TEGRA124_MC_SDMMCR 98 +#define TEGRA124_MC_SDMMCRAB 99 +#define TEGRA124_MC_SDMMCWA 100 +#define TEGRA124_MC_SDMMCWAA 101 +#define TEGRA124_MC_SDMMCW 102 +#define TEGRA124_MC_SDMMCWAB 103 +#define TEGRA124_MC_VICSRD 108 +#define TEGRA124_MC_VICSWR 109 +#define TEGRA124_MC_VIW 114 +#define TEGRA124_MC_DISPLAYD 115 + #endif -- 2.27.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-11-04 16:53 UTC|newest] Thread overview: 188+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-04 16:48 [PATCH v7 00/47] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 01/47] clk: tegra: Export Tegra20 EMC kernel symbols Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:23 ` Krzysztof Kozlowski 2020-11-06 18:23 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 02/47] soc/tegra: fuse: Export tegra_read_ram_code() Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:24 ` Krzysztof Kozlowski 2020-11-06 18:24 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 03/47] soc/tegra: fuse: Add stub for tegra_sku_info Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:25 ` Krzysztof Kozlowski 2020-11-06 18:25 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 04/47] dt-bindings: memory: tegra20: emc: Correct registers range in example Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:28 ` Krzysztof Kozlowski 2020-11-06 18:28 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 05/47] dt-bindings: memory: tegra20: emc: Document nvidia,memory-controller property Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 05/47] dt-bindings: memory: tegra20: emc: Document nvidia, memory-controller property Dmitry Osipenko 2020-11-06 18:29 ` [PATCH v7 05/47] dt-bindings: memory: tegra20: emc: Document nvidia,memory-controller property Krzysztof Kozlowski 2020-11-06 18:29 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 06/47] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:30 ` Krzysztof Kozlowski 2020-11-06 18:30 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 07/47] dt-bindings: memory: tegra20: emc: " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:30 ` Krzysztof Kozlowski 2020-11-06 18:30 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 08/47] dt-bindings: memory: tegra20: emc: Document OPP table and voltage regulator Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-05 19:48 ` Rob Herring 2020-11-05 19:48 ` Rob Herring 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 09/47] dt-bindings: memory: tegra30: mc: Document new interconnect property Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 10/47] dt-bindings: memory: tegra30: emc: " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 11/47] dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:32 ` Krzysztof Kozlowski 2020-11-06 18:32 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 12/47] dt-bindings: memory: tegra124: mc: Document new interconnect property Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-05 19:49 ` Rob Herring 2020-11-05 19:49 ` Rob Herring 2020-11-06 18:33 ` Krzysztof Kozlowski 2020-11-06 18:33 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 13/47] dt-bindings: memory: tegra124: emc: " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:34 ` Krzysztof Kozlowski 2020-11-06 18:34 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 14/47] dt-bindings: memory: tegra124: emc: Document OPP table and voltage regulator Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:36 ` Krzysztof Kozlowski 2020-11-06 18:36 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 15/47] dt-bindings: tegra30-actmon: Document OPP and interconnect properties Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:34 ` Krzysztof Kozlowski 2020-11-06 18:34 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 16/47] dt-bindings: host1x: Document new " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:36 ` Krzysztof Kozlowski 2020-11-06 18:36 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 17/47] dt-bindings: memory: tegra20: Add memory client IDs Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:38 ` Krzysztof Kozlowski 2020-11-06 18:38 ` Krzysztof Kozlowski 2020-11-26 17:26 ` Thierry Reding 2020-11-26 17:26 ` Thierry Reding 2020-11-26 17:39 ` Krzysztof Kozlowski 2020-11-26 17:39 ` Krzysztof Kozlowski 2020-11-26 17:45 ` Krzysztof Kozlowski 2020-11-26 17:45 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-26 17:59 ` Thierry Reding 2020-11-26 17:59 ` Thierry Reding 2020-11-26 18:02 ` Thierry Reding 2020-11-26 18:02 ` Thierry Reding 2020-11-26 18:06 ` Krzysztof Kozlowski 2020-11-26 18:06 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 18/47] dt-bindings: memory: tegra30: " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:38 ` Krzysztof Kozlowski 2020-11-06 18:38 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-04 16:48 ` Dmitry Osipenko [this message] 2020-11-04 16:48 ` [PATCH v7 19/47] dt-bindings: memory: tegra124: " Dmitry Osipenko 2020-11-06 18:39 ` Krzysztof Kozlowski 2020-11-06 18:39 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 20/47] ARM: tegra: Correct EMC registers size in Tegra20 device-tree Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 21/47] ARM: tegra: Add interconnect properties to " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 22/47] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 23/47] ARM: tegra: Add interconnect properties to Tegra124 device-tree Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 24/47] ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 24/47] ARM: tegra: Add nvidia, memory-controller " Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 25/47] ARM: tegra: Add DVFS properties to Tegra20 EMC device-tree node Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 26/47] ARM: tegra: Add DVFS properties to Tegra30 EMC and ACTMON device-tree nodes Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 27/47] ARM: tegra: Add DVFS properties to Tegra124 " Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 28/47] memory: tegra: Add and use devm_tegra_memory_controller_get() Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:02 ` Krzysztof Kozlowski 2020-11-06 19:02 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 29/47] memory: tegra: Use devm_platform_ioremap_resource() Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:03 ` Krzysztof Kozlowski 2020-11-06 19:03 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 30/47] memory: tegra: Remove superfluous error messages around platform_get_irq() Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:04 ` Krzysztof Kozlowski 2020-11-06 19:04 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 31/47] memory: tegra: Add missing latency allowness entry for Page Table Cache Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:05 ` Krzysztof Kozlowski 2020-11-06 19:05 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 32/47] memory: tegra-mc: Add interconnect framework Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:07 ` Krzysztof Kozlowski 2020-11-06 19:07 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 33/47] memory: tegra20-emc: Make driver modular Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:07 ` Krzysztof Kozlowski 2020-11-06 19:07 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 34/47] memory: tegra20-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:08 ` Krzysztof Kozlowski 2020-11-06 19:08 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 35/47] memory: tegra20: Support interconnect framework Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:10 ` Krzysztof Kozlowski 2020-11-06 19:10 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 36/47] memory: tegra20-emc: Add devfreq support Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-05 2:30 ` Chanwoo Choi 2020-11-05 2:30 ` Chanwoo Choi 2020-11-05 13:50 ` Dmitry Osipenko 2020-11-05 13:50 ` Dmitry Osipenko 2020-11-06 19:13 ` Krzysztof Kozlowski 2020-11-06 19:13 ` Krzysztof Kozlowski 2020-11-06 21:53 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 37/47] memory: tegra30: Add FIFO sizes to memory clients Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 38/47] memory: tegra30-emc: Make driver modular Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 39/47] memory: tegra30-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 40/47] memory: tegra30: Support interconnect framework Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 41/47] memory: tegra124-emc: Make driver modular Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 42/47] memory: tegra124: Support interconnect framework Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 43/47] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-09 4:02 ` kernel test robot 2020-11-04 16:49 ` [PATCH v7 44/47] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 45/47] PM / devfreq: tegra30: Support interconnect and OPPs from device-tree Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-05 2:22 ` Chanwoo Choi 2020-11-05 2:22 ` Chanwoo Choi 2020-11-04 16:49 ` [PATCH v7 46/47] PM / devfreq: tegra30: Separate configurations per-SoC generation Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-05 2:23 ` Chanwoo Choi 2020-11-05 2:23 ` Chanwoo Choi 2020-11-04 16:49 ` [PATCH v7 47/47] PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-05 2:25 ` Chanwoo Choi 2020-11-05 2:25 ` Chanwoo Choi 2020-11-05 13:50 ` Dmitry Osipenko 2020-11-05 13:50 ` Dmitry Osipenko
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20201104164923.21238-20-digetx@gmail.com \ --to=digetx@gmail.com \ --cc=cw00.choi@samsung.com \ --cc=cyndis@kapsi.fi \ --cc=devicetree@vger.kernel.org \ --cc=dri-devel@lists.freedesktop.org \ --cc=georgi.djakov@linaro.org \ --cc=jonathanh@nvidia.com \ --cc=krzk@kernel.org \ --cc=kwizart@gmail.com \ --cc=kyungmin.park@samsung.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-pm@vger.kernel.org \ --cc=linux-tegra@vger.kernel.org \ --cc=mturquette@baylibre.com \ --cc=myungjoo.ham@samsung.com \ --cc=pdeschrijver@nvidia.com \ --cc=pgwipeout@gmail.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ --cc=thierry.reding@gmail.com \ --cc=vireshk@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.