* [PATCH 1/4] arm64: tegra: Rename ADMA device nodes for Tegra210
2020-11-05 10:24 [PATCH 0/4] Convert few Tegra docs to json-schema Sameer Pujar
@ 2020-11-05 10:24 ` Sameer Pujar
2020-11-05 10:24 ` [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema Sameer Pujar
` (2 subsequent siblings)
3 siblings, 0 replies; 12+ messages in thread
From: Sameer Pujar @ 2020-11-05 10:24 UTC (permalink / raw)
To: robh+dt, devicetree
Cc: thierry.reding, jonathanh, vkoul, tglx, jason, maz, linux-tegra,
linux-kernel, dmaengine, Sameer Pujar
DMA device nodes should follow regex pattern of "^dma-controller(@.*)?$".
This is a preparatory patch to use YAML doc format for ADMA.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
index dab24b4..e9f8410 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
@@ -120,7 +120,7 @@
aconnect@702c0000 {
status = "okay";
- dma@702e2000 {
+ dma-controller@702e2000 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index 1216b65c8..f8e8bcf 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -630,7 +630,7 @@
aconnect@702c0000 {
status = "okay";
- dma@702e2000 {
+ dma-controller@702e2000 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index bd78378..131c064 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -1717,7 +1717,7 @@
aconnect@702c0000 {
status = "okay";
- dma@702e2000 {
+ dma-controller@702e2000 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index d47c889..d41eb12 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1344,7 +1344,7 @@
ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
status = "disabled";
- adma: dma@702e2000 {
+ adma: dma-controller@702e2000 {
compatible = "nvidia,tegra210-adma";
reg = <0x702e2000 0x2000>;
interrupt-parent = <&agic>;
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema
2020-11-05 10:24 [PATCH 0/4] Convert few Tegra docs to json-schema Sameer Pujar
2020-11-05 10:24 ` [PATCH 1/4] arm64: tegra: Rename ADMA device nodes for Tegra210 Sameer Pujar
@ 2020-11-05 10:24 ` Sameer Pujar
2020-11-05 18:50 ` Rob Herring
2020-11-05 18:56 ` Rob Herring
2020-11-05 10:24 ` [PATCH 3/4] dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles Sameer Pujar
2020-11-05 10:24 ` [PATCH 4/4] dt-bindings: bus: Convert ACONNECT doc to json-schema Sameer Pujar
3 siblings, 2 replies; 12+ messages in thread
From: Sameer Pujar @ 2020-11-05 10:24 UTC (permalink / raw)
To: robh+dt, devicetree
Cc: thierry.reding, jonathanh, vkoul, tglx, jason, maz, linux-tegra,
linux-kernel, dmaengine, Sameer Pujar
Move ADMA documentation to YAML format.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
.../bindings/dma/nvidia,tegra210-adma.txt | 56 -------------
.../bindings/dma/nvidia,tegra210-adma.yaml | 95 ++++++++++++++++++++++
2 files changed, 95 insertions(+), 56 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
deleted file mode 100644
index 245d306..0000000
--- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
+++ /dev/null
@@ -1,56 +0,0 @@
-* NVIDIA Tegra Audio DMA (ADMA) controller
-
-The Tegra Audio DMA controller that is used for transferring data
-between system memory and the Audio Processing Engine (APE).
-
-Required properties:
-- compatible: Should contain one of the following:
- - "nvidia,tegra210-adma": for Tegra210
- - "nvidia,tegra186-adma": for Tegra186 and Tegra194
-- reg: Should contain DMA registers location and length. This should be
- a single entry that includes all of the per-channel registers in one
- contiguous bank.
-- interrupts: Should contain all of the per-channel DMA interrupts in
- ascending order with respect to the DMA channel index.
-- clocks: Must contain one entry for the ADMA module clock
- (TEGRA210_CLK_D_AUDIO).
-- clock-names: Must contain the name "d_audio" for the corresponding
- 'clocks' entry.
-- #dma-cells : Must be 1. The first cell denotes the receive/transmit
- request number and should be between 1 and the maximum number of
- requests supported. This value corresponds to the RX/TX_REQUEST_SELECT
- fields in the ADMA_CHn_CTRL register.
-
-
-Example:
-
-adma: dma@702e2000 {
- compatible = "nvidia,tegra210-adma";
- reg = <0x0 0x702e2000 0x0 0x2000>;
- interrupt-parent = <&tegra_agic>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
- clock-names = "d_audio";
- #dma-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
new file mode 100644
index 0000000..b4e657d
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra Audio DMA (ADMA) controller
+
+description: |
+ The Tegra Audio DMA controller is used for transferring data
+ between system memory and the Audio Processing Engine (APE).
+
+maintainers:
+ - Jon Hunter <jonathanh@nvidia.com>
+
+allOf:
+ - $ref: "dma-controller.yaml#"
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - nvidia,tegra210-adma
+ - nvidia,tegra186-adma
+ - items:
+ - const: nvidia,tegra194-adma
+ - const: nvidia,tegra186-adma
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description: |
+ Should contain all of the per-channel DMA interrupts in
+ ascending order with respect to the DMA channel index.
+
+ clocks:
+ description: Must contain one entry for the ADMA module clock
+
+ clock-names:
+ const: d_audio
+
+ "#dma-cells":
+ description: |
+ The first cell denotes the receive/transmit request number and
+ should be between 1 and the maximum number of requests supported.
+ This value corresponds to the RX/TX_REQUEST_SELECT fields in the
+ ADMA_CHn_CTRL register.
+
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include<dt-bindings/clock/tegra210-car.h>
+
+ dma-controller@702e2000 {
+ compatible = "nvidia,tegra210-adma";
+ reg = <0x702e2000 0x2000>;
+ interrupt-parent = <&tegra_agic>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
+ clock-names = "d_audio";
+ #dma-cells = <1>;
+ };
+
+...
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema
2020-11-05 10:24 ` [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema Sameer Pujar
@ 2020-11-05 18:50 ` Rob Herring
2020-11-05 18:56 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Rob Herring @ 2020-11-05 18:50 UTC (permalink / raw)
To: Sameer Pujar
Cc: vkoul, jonathanh, devicetree, thierry.reding, linux-kernel,
dmaengine, jason, linux-tegra, tglx, robh+dt, maz
On Thu, 05 Nov 2020 15:54:04 +0530, Sameer Pujar wrote:
> Move ADMA documentation to YAML format.
>
> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> ---
> .../bindings/dma/nvidia,tegra210-adma.txt | 56 -------------
> .../bindings/dma/nvidia,tegra210-adma.yaml | 95 ++++++++++++++++++++++
> 2 files changed, 95 insertions(+), 56 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
> create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml: 'oneOf' conditional failed, one must be fixed:
'unevaluatedProperties' is a required property
'additionalProperties' is a required property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml: ignoring, error in schema:
warning: no schema found in file: ./Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
See https://patchwork.ozlabs.org/patch/1394859
The base for the patch is generally the last rc1. Any dependencies
should be noted.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema
2020-11-05 10:24 ` [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema Sameer Pujar
2020-11-05 18:50 ` Rob Herring
@ 2020-11-05 18:56 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Rob Herring @ 2020-11-05 18:56 UTC (permalink / raw)
To: Sameer Pujar
Cc: devicetree, thierry.reding, jonathanh, vkoul, tglx, jason, maz,
linux-tegra, linux-kernel, dmaengine
On Thu, Nov 05, 2020 at 03:54:04PM +0530, Sameer Pujar wrote:
> Move ADMA documentation to YAML format.
>
> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> ---
> .../bindings/dma/nvidia,tegra210-adma.txt | 56 -------------
> .../bindings/dma/nvidia,tegra210-adma.yaml | 95 ++++++++++++++++++++++
> 2 files changed, 95 insertions(+), 56 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
> create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
> deleted file mode 100644
> index 245d306..0000000
> --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -* NVIDIA Tegra Audio DMA (ADMA) controller
> -
> -The Tegra Audio DMA controller that is used for transferring data
> -between system memory and the Audio Processing Engine (APE).
> -
> -Required properties:
> -- compatible: Should contain one of the following:
> - - "nvidia,tegra210-adma": for Tegra210
> - - "nvidia,tegra186-adma": for Tegra186 and Tegra194
> -- reg: Should contain DMA registers location and length. This should be
> - a single entry that includes all of the per-channel registers in one
> - contiguous bank.
> -- interrupts: Should contain all of the per-channel DMA interrupts in
> - ascending order with respect to the DMA channel index.
> -- clocks: Must contain one entry for the ADMA module clock
> - (TEGRA210_CLK_D_AUDIO).
> -- clock-names: Must contain the name "d_audio" for the corresponding
> - 'clocks' entry.
> -- #dma-cells : Must be 1. The first cell denotes the receive/transmit
> - request number and should be between 1 and the maximum number of
> - requests supported. This value corresponds to the RX/TX_REQUEST_SELECT
> - fields in the ADMA_CHn_CTRL register.
> -
> -
> -Example:
> -
> -adma: dma@702e2000 {
> - compatible = "nvidia,tegra210-adma";
> - reg = <0x0 0x702e2000 0x0 0x2000>;
> - interrupt-parent = <&tegra_agic>;
> - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
> - clock-names = "d_audio";
> - #dma-cells = <1>;
> -};
> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
> new file mode 100644
> index 0000000..b4e657d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml
> @@ -0,0 +1,95 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Audio DMA (ADMA) controller
> +
> +description: |
> + The Tegra Audio DMA controller is used for transferring data
> + between system memory and the Audio Processing Engine (APE).
> +
> +maintainers:
> + - Jon Hunter <jonathanh@nvidia.com>
> +
> +allOf:
> + - $ref: "dma-controller.yaml#"
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - nvidia,tegra210-adma
> + - nvidia,tegra186-adma
> + - items:
> + - const: nvidia,tegra194-adma
> + - const: nvidia,tegra186-adma
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + description: |
> + Should contain all of the per-channel DMA interrupts in
> + ascending order with respect to the DMA channel index.
You need to define how many (minItems/maxItems).
> +
> + clocks:
> + description: Must contain one entry for the ADMA module clock
How many?
> +
> + clock-names:
> + const: d_audio
> +
> + "#dma-cells":
> + description: |
> + The first cell denotes the receive/transmit request number and
> + should be between 1 and the maximum number of requests supported.
> + This value corresponds to the RX/TX_REQUEST_SELECT fields in the
> + ADMA_CHn_CTRL register.
> +
Drop the blank line.
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include<dt-bindings/clock/tegra210-car.h>
> +
> + dma-controller@702e2000 {
> + compatible = "nvidia,tegra210-adma";
> + reg = <0x702e2000 0x2000>;
> + interrupt-parent = <&tegra_agic>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
> + clock-names = "d_audio";
> + #dma-cells = <1>;
> + };
> +
> +...
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/4] dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
2020-11-05 10:24 [PATCH 0/4] Convert few Tegra docs to json-schema Sameer Pujar
2020-11-05 10:24 ` [PATCH 1/4] arm64: tegra: Rename ADMA device nodes for Tegra210 Sameer Pujar
2020-11-05 10:24 ` [PATCH 2/4] dt-bindings: dma: Convert ADMA doc to json-schema Sameer Pujar
@ 2020-11-05 10:24 ` Sameer Pujar
2020-11-05 18:57 ` Rob Herring
2020-11-05 18:58 ` Rob Herring
2020-11-05 10:24 ` [PATCH 4/4] dt-bindings: bus: Convert ACONNECT doc to json-schema Sameer Pujar
3 siblings, 2 replies; 12+ messages in thread
From: Sameer Pujar @ 2020-11-05 10:24 UTC (permalink / raw)
To: robh+dt, devicetree
Cc: thierry.reding, jonathanh, vkoul, tglx, jason, maz, linux-tegra,
linux-kernel, dmaengine, Sameer Pujar
Update Tegra compatibles to support newer Tegra chips and required
combinations.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
.../devicetree/bindings/interrupt-controller/arm,gic.yaml | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
index 0688996..614018f 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
@@ -35,7 +35,6 @@ properties:
- arm,gic-400
- arm,pl390
- arm,tc11mp-gic
- - nvidia,tegra210-agic
- qcom,msm-8660-qgic
- qcom,msm-qgic2
@@ -53,6 +52,14 @@ properties:
- const: brcm,brahma-b15-gic
- const: arm,cortex-a15-gic
+ - oneOf:
+ - const: nvidia,tegra210-agic
+ - items:
+ - enum:
+ - nvidia,tegra186-agic
+ - nvidia,tegra194-agic
+ - const: nvidia,tegra210-agic
+
interrupt-controller: true
"#address-cells":
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
2020-11-05 10:24 ` [PATCH 3/4] dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles Sameer Pujar
@ 2020-11-05 18:57 ` Rob Herring
2020-11-05 18:58 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Rob Herring @ 2020-11-05 18:57 UTC (permalink / raw)
To: Sameer Pujar
Cc: devicetree, maz, linux-kernel, jonathanh, robh+dt, tglx,
linux-tegra, thierry.reding, jason, dmaengine, vkoul
On Thu, 05 Nov 2020 15:54:05 +0530, Sameer Pujar wrote:
> Update Tegra compatibles to support newer Tegra chips and required
> combinations.
>
> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> ---
> .../devicetree/bindings/interrupt-controller/arm,gic.yaml | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
./Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml:56:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml:58:11: [warning] wrong indentation: expected 12 but found 10 (indentation)
./Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml:59:13: [warning] wrong indentation: expected 14 but found 12 (indentation)
dtschema/dtc warnings/errors:
See https://patchwork.ozlabs.org/patch/1394860
The base for the patch is generally the last rc1. Any dependencies
should be noted.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/4] dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
2020-11-05 10:24 ` [PATCH 3/4] dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles Sameer Pujar
2020-11-05 18:57 ` Rob Herring
@ 2020-11-05 18:58 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Rob Herring @ 2020-11-05 18:58 UTC (permalink / raw)
To: Sameer Pujar
Cc: jason, thierry.reding, jonathanh, dmaengine, vkoul, robh+dt,
devicetree, tglx, linux-tegra, linux-kernel, maz
On Thu, 05 Nov 2020 15:54:05 +0530, Sameer Pujar wrote:
> Update Tegra compatibles to support newer Tegra chips and required
> combinations.
>
> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> ---
> .../devicetree/bindings/interrupt-controller/arm,gic.yaml | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
With the indentation fixed:
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/4] dt-bindings: bus: Convert ACONNECT doc to json-schema
2020-11-05 10:24 [PATCH 0/4] Convert few Tegra docs to json-schema Sameer Pujar
` (2 preceding siblings ...)
2020-11-05 10:24 ` [PATCH 3/4] dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles Sameer Pujar
@ 2020-11-05 10:24 ` Sameer Pujar
2020-11-05 19:05 ` Rob Herring
3 siblings, 1 reply; 12+ messages in thread
From: Sameer Pujar @ 2020-11-05 10:24 UTC (permalink / raw)
To: robh+dt, devicetree
Cc: thierry.reding, jonathanh, vkoul, tglx, jason, maz, linux-tegra,
linux-kernel, dmaengine, Sameer Pujar
Move ACONNECT documentation to YAML format.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
.../bindings/bus/nvidia,tegra210-aconnect.txt | 44 -----------
.../bindings/bus/nvidia,tegra210-aconnect.yaml | 86 ++++++++++++++++++++++
2 files changed, 86 insertions(+), 44 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
create mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
deleted file mode 100644
index 3108d03..0000000
--- a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
+++ /dev/null
@@ -1,44 +0,0 @@
-NVIDIA Tegra ACONNECT Bus
-
-The Tegra ACONNECT bus is an AXI switch which is used to connnect various
-components inside the Audio Processing Engine (APE). All CPU accesses to
-the APE subsystem go through the ACONNECT via an APB to AXI wrapper.
-
-Required properties:
-- compatible: Must be "nvidia,tegra210-aconnect".
-- clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE),
- and APE interface clock (TEGRA210_CLK_APB2APE).
-- clock-names: Must contain the names "ape" and "apb2ape" for the corresponding
- 'clocks' entries.
-- power-domains: Must contain a phandle that points to the audio powergate
- (namely 'aud') for Tegra210.
-- #address-cells: The number of cells used to represent physical base addresses
- in the aconnect address space. Should be 1.
-- #size-cells: The number of cells used to represent the size of an address
- range in the aconnect address space. Should be 1.
-- ranges: Mapping of the aconnect address space to the CPU address space.
-
-All devices accessed via the ACONNNECT are described by child-nodes.
-
-Example:
-
- aconnect@702c0000 {
- compatible = "nvidia,tegra210-aconnect";
- clocks = <&tegra_car TEGRA210_CLK_APE>,
- <&tegra_car TEGRA210_CLK_APB2APE>;
- clock-names = "ape", "apb2ape";
- power-domains = <&pd_audio>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
-
-
- child1 {
- ...
- };
-
- child2 {
- ...
- };
- };
diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
new file mode 100644
index 0000000..f0161bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra ACONNECT Bus
+
+description: |
+ The Tegra ACONNECT bus is an AXI switch which is used to connnect various
+ components inside the Audio Processing Engine (APE). All CPU accesses to
+ the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
+ devices accessed via the ACONNNECT are described by child-nodes.
+
+maintainers:
+ - Jon Hunter <jonathanh@nvidia.com>
+
+properties:
+ compatible:
+ oneOf:
+ - const: nvidia,tegra210-aconnect
+ - items:
+ - enum:
+ - nvidia,tegra186-aconnect
+ - nvidia,tegra194-aconnect
+ - const: nvidia,tegra210-aconnect
+
+ clocks:
+ items:
+ - description: Must contain the entry for APE clock
+ - description: Must contain the entry for APE interface clock
+
+ clock-names:
+ items:
+ - const: ape
+ - const: apb2ape
+
+ power-domains:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+patternProperties:
+ "^dma-controller(@[0-9a-f]+)?$":
+ $ref: /schemas/dma/nvidia,tegra210-adma.yaml#
+ "^interrupt-controller(@[0-9a-f]+)?$":
+ $ref: /schemas/interrupt-controller/arm,gic.yaml#
+ "^ahub(@[0-9a-f]+)?$":
+ $ref: /schemas/sound/nvidia,tegra210-ahub.yaml#
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - power-domains
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ #include<dt-bindings/clock/tegra210-car.h>
+
+ aconnect@702c0000 {
+ compatible = "nvidia,tegra210-aconnect";
+ clocks = <&tegra_car TEGRA210_CLK_APE>,
+ <&tegra_car TEGRA210_CLK_APB2APE>;
+ clock-names = "ape", "apb2ape";
+ power-domains = <&pd_audio>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x702c0000 0x702c0000 0x00040000>;
+
+ // Child device nodes follow ...
+ };
+
+...
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/4] dt-bindings: bus: Convert ACONNECT doc to json-schema
2020-11-05 10:24 ` [PATCH 4/4] dt-bindings: bus: Convert ACONNECT doc to json-schema Sameer Pujar
@ 2020-11-05 19:05 ` Rob Herring
2020-11-06 6:44 ` Sameer Pujar
0 siblings, 1 reply; 12+ messages in thread
From: Rob Herring @ 2020-11-05 19:05 UTC (permalink / raw)
To: Sameer Pujar
Cc: devicetree, thierry.reding, jonathanh, vkoul, tglx, jason, maz,
linux-tegra, linux-kernel, dmaengine
On Thu, Nov 05, 2020 at 03:54:06PM +0530, Sameer Pujar wrote:
> Move ACONNECT documentation to YAML format.
>
> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> ---
> .../bindings/bus/nvidia,tegra210-aconnect.txt | 44 -----------
> .../bindings/bus/nvidia,tegra210-aconnect.yaml | 86 ++++++++++++++++++++++
> 2 files changed, 86 insertions(+), 44 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
> create mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
>
> diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
> deleted file mode 100644
> index 3108d03..0000000
> --- a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
> +++ /dev/null
> @@ -1,44 +0,0 @@
> -NVIDIA Tegra ACONNECT Bus
> -
> -The Tegra ACONNECT bus is an AXI switch which is used to connnect various
> -components inside the Audio Processing Engine (APE). All CPU accesses to
> -the APE subsystem go through the ACONNECT via an APB to AXI wrapper.
> -
> -Required properties:
> -- compatible: Must be "nvidia,tegra210-aconnect".
> -- clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE),
> - and APE interface clock (TEGRA210_CLK_APB2APE).
> -- clock-names: Must contain the names "ape" and "apb2ape" for the corresponding
> - 'clocks' entries.
> -- power-domains: Must contain a phandle that points to the audio powergate
> - (namely 'aud') for Tegra210.
> -- #address-cells: The number of cells used to represent physical base addresses
> - in the aconnect address space. Should be 1.
> -- #size-cells: The number of cells used to represent the size of an address
> - range in the aconnect address space. Should be 1.
> -- ranges: Mapping of the aconnect address space to the CPU address space.
> -
> -All devices accessed via the ACONNNECT are described by child-nodes.
> -
> -Example:
> -
> - aconnect@702c0000 {
> - compatible = "nvidia,tegra210-aconnect";
> - clocks = <&tegra_car TEGRA210_CLK_APE>,
> - <&tegra_car TEGRA210_CLK_APB2APE>;
> - clock-names = "ape", "apb2ape";
> - power-domains = <&pd_audio>;
> -
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
> -
> -
> - child1 {
> - ...
> - };
> -
> - child2 {
> - ...
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
> new file mode 100644
> index 0000000..f0161bc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
> @@ -0,0 +1,86 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra ACONNECT Bus
> +
> +description: |
> + The Tegra ACONNECT bus is an AXI switch which is used to connnect various
> + components inside the Audio Processing Engine (APE). All CPU accesses to
> + the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
> + devices accessed via the ACONNNECT are described by child-nodes.
> +
> +maintainers:
> + - Jon Hunter <jonathanh@nvidia.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: nvidia,tegra210-aconnect
> + - items:
> + - enum:
> + - nvidia,tegra186-aconnect
> + - nvidia,tegra194-aconnect
> + - const: nvidia,tegra210-aconnect
> +
> + clocks:
> + items:
> + - description: Must contain the entry for APE clock
> + - description: Must contain the entry for APE interface clock
> +
> + clock-names:
> + items:
> + - const: ape
> + - const: apb2ape
> +
> + power-domains:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> + ranges: true
> +
> +patternProperties:
> + "^dma-controller(@[0-9a-f]+)?$":
> + $ref: /schemas/dma/nvidia,tegra210-adma.yaml#
> + "^interrupt-controller(@[0-9a-f]+)?$":
> + $ref: /schemas/interrupt-controller/arm,gic.yaml#
> + "^ahub(@[0-9a-f]+)?$":
> + $ref: /schemas/sound/nvidia,tegra210-ahub.yaml#
These all get applied already since they match on compatible strings. So
having them here means the schema is applied twice. There's maybe some
value to this if it's always going to be these 3 nodes.
Also, the unit-addresses shouldn't be optional.
I'd just do:
"@[0-9a-f]+$":
type: object
> +
> +required:
> + - compatible
> + - clocks
> + - clock-names
> + - power-domains
> + - "#address-cells"
> + - "#size-cells"
> + - ranges
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include<dt-bindings/clock/tegra210-car.h>
> +
> + aconnect@702c0000 {
> + compatible = "nvidia,tegra210-aconnect";
> + clocks = <&tegra_car TEGRA210_CLK_APE>,
> + <&tegra_car TEGRA210_CLK_APB2APE>;
> + clock-names = "ape", "apb2ape";
> + power-domains = <&pd_audio>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x702c0000 0x702c0000 0x00040000>;
> +
> + // Child device nodes follow ...
> + };
> +
> +...
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 4/4] dt-bindings: bus: Convert ACONNECT doc to json-schema
2020-11-05 19:05 ` Rob Herring
@ 2020-11-06 6:44 ` Sameer Pujar
2020-11-06 14:37 ` Rob Herring
0 siblings, 1 reply; 12+ messages in thread
From: Sameer Pujar @ 2020-11-06 6:44 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, thierry.reding, jonathanh, vkoul, tglx, jason, maz,
linux-tegra, linux-kernel, dmaengine
>> Move ACONNECT documentation to YAML format.
>>
>> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
>> ---
>> .../bindings/bus/nvidia,tegra210-aconnect.txt | 44 -----------
>> .../bindings/bus/nvidia,tegra210-aconnect.yaml | 86 ++++++++++++++++++++++
>> 2 files changed, 86 insertions(+), 44 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
>> create mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
>>
...
>> diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
>> new file mode 100644
>> index 0000000..f0161bc
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
>> @@ -0,0 +1,86 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: NVIDIA Tegra ACONNECT Bus
>> +
>> +description: |
>> + The Tegra ACONNECT bus is an AXI switch which is used to connnect various
>> + components inside the Audio Processing Engine (APE). All CPU accesses to
>> + the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
>> + devices accessed via the ACONNNECT are described by child-nodes.
>> +
...
>> +
>> +patternProperties:
>> + "^dma-controller(@[0-9a-f]+)?$":
>> + $ref: /schemas/dma/nvidia,tegra210-adma.yaml#
>> + "^interrupt-controller(@[0-9a-f]+)?$":
>> + $ref: /schemas/interrupt-controller/arm,gic.yaml#
>> + "^ahub(@[0-9a-f]+)?$":
>> + $ref: /schemas/sound/nvidia,tegra210-ahub.yaml#
> These all get applied already since they match on compatible strings. So
> having them here means the schema is applied twice. There's maybe some
> value to this if it's always going to be these 3 nodes.
1) May be this could be dropped with "additionalProperties = true", but
that allows any arbitary property to be added for the device. Without
this 'make dtbs_check' complains about not matching properties in DT files.
2) These may not be the final list of nodes this device can have. In
future if any new device support gets added under this, above needs to
be updated. But it will be limited number of devices.
So is [2] fine or you would suggest [1] would be good enough?
>
> Also, the unit-addresses shouldn't be optional.
>
> I'd just do:
>
> "@[0-9a-f]+$":
> type: object
>
>> +
>> +required:
>> + - compatible
>> + - clocks
>> + - clock-names
>> + - power-domains
>> + - "#address-cells"
>> + - "#size-cells"
>> + - ranges
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include<dt-bindings/clock/tegra210-car.h>
>> +
>> + aconnect@702c0000 {
>> + compatible = "nvidia,tegra210-aconnect";
>> + clocks = <&tegra_car TEGRA210_CLK_APE>,
>> + <&tegra_car TEGRA210_CLK_APB2APE>;
>> + clock-names = "ape", "apb2ape";
>> + power-domains = <&pd_audio>;
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x702c0000 0x702c0000 0x00040000>;
>> +
>> + // Child device nodes follow ...
>> + };
>> +
>> +...
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 4/4] dt-bindings: bus: Convert ACONNECT doc to json-schema
2020-11-06 6:44 ` Sameer Pujar
@ 2020-11-06 14:37 ` Rob Herring
0 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2020-11-06 14:37 UTC (permalink / raw)
To: Sameer Pujar
Cc: devicetree, Thierry Reding, Jon Hunter, Vinod, Thomas Gleixner,
Jason Cooper, Marc Zyngier, linux-tegra, linux-kernel,
open list:DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
On Fri, Nov 6, 2020 at 12:44 AM Sameer Pujar <spujar@nvidia.com> wrote:
>
>
> >> Move ACONNECT documentation to YAML format.
> >>
> >> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> >> ---
> >> .../bindings/bus/nvidia,tegra210-aconnect.txt | 44 -----------
> >> .../bindings/bus/nvidia,tegra210-aconnect.yaml | 86 ++++++++++++++++++++++
> >> 2 files changed, 86 insertions(+), 44 deletions(-)
> >> delete mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.txt
> >> create mode 100644 Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
> >>
>
> ...
>
> >> diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
> >> new file mode 100644
> >> index 0000000..f0161bc
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
> >> @@ -0,0 +1,86 @@
> >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: NVIDIA Tegra ACONNECT Bus
> >> +
> >> +description: |
> >> + The Tegra ACONNECT bus is an AXI switch which is used to connnect various
> >> + components inside the Audio Processing Engine (APE). All CPU accesses to
> >> + the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
> >> + devices accessed via the ACONNNECT are described by child-nodes.
> >> +
>
> ...
>
> >> +
> >> +patternProperties:
> >> + "^dma-controller(@[0-9a-f]+)?$":
> >> + $ref: /schemas/dma/nvidia,tegra210-adma.yaml#
> >> + "^interrupt-controller(@[0-9a-f]+)?$":
> >> + $ref: /schemas/interrupt-controller/arm,gic.yaml#
> >> + "^ahub(@[0-9a-f]+)?$":
> >> + $ref: /schemas/sound/nvidia,tegra210-ahub.yaml#
> > These all get applied already since they match on compatible strings. So
> > having them here means the schema is applied twice. There's maybe some
> > value to this if it's always going to be these 3 nodes.
>
> 1) May be this could be dropped with "additionalProperties = true", but
> that allows any arbitary property to be added for the device. Without
> this 'make dtbs_check' complains about not matching properties in DT files.
Not if you do what I suggested below. Then only arbitrary nodes can be added.
>
> 2) These may not be the final list of nodes this device can have. In
> future if any new device support gets added under this, above needs to
> be updated. But it will be limited number of devices.
>
> So is [2] fine or you would suggest [1] would be good enough?
>
> >
> > Also, the unit-addresses shouldn't be optional.
> >
> > I'd just do:
> >
> > "@[0-9a-f]+$":
> > type: object
> >
> >> +
> >> +required:
> >> + - compatible
> >> + - clocks
> >> + - clock-names
> >> + - power-domains
> >> + - "#address-cells"
> >> + - "#size-cells"
> >> + - ranges
> >> +
> >> +additionalProperties: false
> >> +
> >> +examples:
> >> + - |
> >> + #include<dt-bindings/clock/tegra210-car.h>
> >> +
> >> + aconnect@702c0000 {
> >> + compatible = "nvidia,tegra210-aconnect";
> >> + clocks = <&tegra_car TEGRA210_CLK_APE>,
> >> + <&tegra_car TEGRA210_CLK_APB2APE>;
> >> + clock-names = "ape", "apb2ape";
> >> + power-domains = <&pd_audio>;
> >> +
> >> + #address-cells = <1>;
> >> + #size-cells = <1>;
> >> + ranges = <0x702c0000 0x702c0000 0x00040000>;
> >> +
> >> + // Child device nodes follow ...
> >> + };
> >> +
> >> +...
> >> --
> >> 2.7.4
> >>
>
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